cpu_x86.go

Documentation: internal/cpu

     1  // Copyright 2017 The Go Authors. All rights reserved.
     2  // Use of this source code is governed by a BSD-style
     3  // license that can be found in the LICENSE file.
     4  
     5  // +build 386 amd64 amd64p32
     6  
     7  package cpu
     8  
     9  const CacheLineSize = 64
    10  
    11  // cpuid is implemented in cpu_x86.s.
    12  func cpuid(eaxArg, ecxArg uint32) (eax, ebx, ecx, edx uint32)
    13  
    14  // xgetbv with ecx = 0 is implemented in cpu_x86.s.
    15  func xgetbv() (eax, edx uint32)
    16  
    17  const (
    18  	// edx bits
    19  	cpuid_SSE2 = 1 << 26
    20  
    21  	// ecx bits
    22  	cpuid_SSE3      = 1 << 0
    23  	cpuid_PCLMULQDQ = 1 << 1
    24  	cpuid_SSSE3     = 1 << 9
    25  	cpuid_FMA       = 1 << 12
    26  	cpuid_SSE41     = 1 << 19
    27  	cpuid_SSE42     = 1 << 20
    28  	cpuid_POPCNT    = 1 << 23
    29  	cpuid_AES       = 1 << 25
    30  	cpuid_OSXSAVE   = 1 << 27
    31  	cpuid_AVX       = 1 << 28
    32  
    33  	// ebx bits
    34  	cpuid_BMI1 = 1 << 3
    35  	cpuid_AVX2 = 1 << 5
    36  	cpuid_BMI2 = 1 << 8
    37  	cpuid_ERMS = 1 << 9
    38  	cpuid_ADX  = 1 << 19
    39  )
    40  
    41  func doinit() {
    42  	options = []option{
    43  		{"adx", &X86.HasADX},
    44  		{"aes", &X86.HasAES},
    45  		{"avx", &X86.HasAVX},
    46  		{"avx2", &X86.HasAVX2},
    47  		{"bmi1", &X86.HasBMI1},
    48  		{"bmi2", &X86.HasBMI2},
    49  		{"erms", &X86.HasERMS},
    50  		{"fma", &X86.HasFMA},
    51  		{"pclmulqdq", &X86.HasPCLMULQDQ},
    52  		{"popcnt", &X86.HasPOPCNT},
    53  		{"sse3", &X86.HasSSE3},
    54  		{"sse41", &X86.HasSSE41},
    55  		{"sse42", &X86.HasSSE42},
    56  		{"ssse3", &X86.HasSSSE3},
    57  
    58  		// sse2 set as last element so it can easily be removed again. See code below.
    59  		{"sse2", &X86.HasSSE2},
    60  	}
    61  
    62  	// Remove sse2 from options on amd64(p32) because SSE2 is a mandatory feature for these GOARCHs.
    63  	if GOARCH == "amd64" || GOARCH == "amd64p32" {
    64  		options = options[:len(options)-1]
    65  	}
    66  
    67  	maxID, _, _, _ := cpuid(0, 0)
    68  
    69  	if maxID < 1 {
    70  		return
    71  	}
    72  
    73  	_, _, ecx1, edx1 := cpuid(1, 0)
    74  	X86.HasSSE2 = isSet(edx1, cpuid_SSE2)
    75  
    76  	X86.HasSSE3 = isSet(ecx1, cpuid_SSE3)
    77  	X86.HasPCLMULQDQ = isSet(ecx1, cpuid_PCLMULQDQ)
    78  	X86.HasSSSE3 = isSet(ecx1, cpuid_SSSE3)
    79  	X86.HasFMA = isSet(ecx1, cpuid_FMA)
    80  	X86.HasSSE41 = isSet(ecx1, cpuid_SSE41)
    81  	X86.HasSSE42 = isSet(ecx1, cpuid_SSE42)
    82  	X86.HasPOPCNT = isSet(ecx1, cpuid_POPCNT)
    83  	X86.HasAES = isSet(ecx1, cpuid_AES)
    84  	X86.HasOSXSAVE = isSet(ecx1, cpuid_OSXSAVE)
    85  
    86  	osSupportsAVX := false
    87  	// For XGETBV, OSXSAVE bit is required and sufficient.
    88  	if X86.HasOSXSAVE {
    89  		eax, _ := xgetbv()
    90  		// Check if XMM and YMM registers have OS support.
    91  		osSupportsAVX = isSet(eax, 1<<1) && isSet(eax, 1<<2)
    92  	}
    93  
    94  	X86.HasAVX = isSet(ecx1, cpuid_AVX) && osSupportsAVX
    95  
    96  	if maxID < 7 {
    97  		return
    98  	}
    99  
   100  	_, ebx7, _, _ := cpuid(7, 0)
   101  	X86.HasBMI1 = isSet(ebx7, cpuid_BMI1)
   102  	X86.HasAVX2 = isSet(ebx7, cpuid_AVX2) && osSupportsAVX
   103  	X86.HasBMI2 = isSet(ebx7, cpuid_BMI2)
   104  	X86.HasERMS = isSet(ebx7, cpuid_ERMS)
   105  	X86.HasADX = isSet(ebx7, cpuid_ADX)
   106  }
   107  
   108  func isSet(hwc uint32, value uint32) bool {
   109  	return hwc&value != 0
   110  }
   111
View as plain text