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Source file src/cmd/internal/obj/arm64/a.out.go

Documentation: cmd/internal/obj/arm64

     1  // cmd/7c/7.out.h  from Vita Nuova.
     2  // https://code.google.com/p/ken-cc/source/browse/src/cmd/7c/7.out.h
     3  //
     4  // 	Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
     5  // 	Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
     6  // 	Portions Copyright © 1997-1999 Vita Nuova Limited
     7  // 	Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
     8  // 	Portions Copyright © 2004,2006 Bruce Ellis
     9  // 	Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
    10  // 	Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
    11  // 	Portions Copyright © 2009 The Go Authors. All rights reserved.
    12  //
    13  // Permission is hereby granted, free of charge, to any person obtaining a copy
    14  // of this software and associated documentation files (the "Software"), to deal
    15  // in the Software without restriction, including without limitation the rights
    16  // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
    17  // copies of the Software, and to permit persons to whom the Software is
    18  // furnished to do so, subject to the following conditions:
    19  //
    20  // The above copyright notice and this permission notice shall be included in
    21  // all copies or substantial portions of the Software.
    22  //
    23  // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
    24  // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
    25  // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
    26  // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
    27  // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
    28  // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
    29  // THE SOFTWARE.
    30  
    31  package arm64
    32  
    33  import "cmd/internal/obj"
    34  
    35  const (
    36  	NSNAME = 8
    37  	NSYM   = 50
    38  	NREG   = 32 /* number of general registers */
    39  	NFREG  = 32 /* number of floating point registers */
    40  )
    41  
    42  // General purpose registers, kept in the low bits of Prog.Reg.
    43  const (
    44  	// integer
    45  	REG_R0 = obj.RBaseARM64 + iota
    46  	REG_R1
    47  	REG_R2
    48  	REG_R3
    49  	REG_R4
    50  	REG_R5
    51  	REG_R6
    52  	REG_R7
    53  	REG_R8
    54  	REG_R9
    55  	REG_R10
    56  	REG_R11
    57  	REG_R12
    58  	REG_R13
    59  	REG_R14
    60  	REG_R15
    61  	REG_R16
    62  	REG_R17
    63  	REG_R18
    64  	REG_R19
    65  	REG_R20
    66  	REG_R21
    67  	REG_R22
    68  	REG_R23
    69  	REG_R24
    70  	REG_R25
    71  	REG_R26
    72  	REG_R27
    73  	REG_R28
    74  	REG_R29
    75  	REG_R30
    76  	REG_R31
    77  
    78  	// scalar floating point
    79  	REG_F0
    80  	REG_F1
    81  	REG_F2
    82  	REG_F3
    83  	REG_F4
    84  	REG_F5
    85  	REG_F6
    86  	REG_F7
    87  	REG_F8
    88  	REG_F9
    89  	REG_F10
    90  	REG_F11
    91  	REG_F12
    92  	REG_F13
    93  	REG_F14
    94  	REG_F15
    95  	REG_F16
    96  	REG_F17
    97  	REG_F18
    98  	REG_F19
    99  	REG_F20
   100  	REG_F21
   101  	REG_F22
   102  	REG_F23
   103  	REG_F24
   104  	REG_F25
   105  	REG_F26
   106  	REG_F27
   107  	REG_F28
   108  	REG_F29
   109  	REG_F30
   110  	REG_F31
   111  
   112  	// SIMD
   113  	REG_V0
   114  	REG_V1
   115  	REG_V2
   116  	REG_V3
   117  	REG_V4
   118  	REG_V5
   119  	REG_V6
   120  	REG_V7
   121  	REG_V8
   122  	REG_V9
   123  	REG_V10
   124  	REG_V11
   125  	REG_V12
   126  	REG_V13
   127  	REG_V14
   128  	REG_V15
   129  	REG_V16
   130  	REG_V17
   131  	REG_V18
   132  	REG_V19
   133  	REG_V20
   134  	REG_V21
   135  	REG_V22
   136  	REG_V23
   137  	REG_V24
   138  	REG_V25
   139  	REG_V26
   140  	REG_V27
   141  	REG_V28
   142  	REG_V29
   143  	REG_V30
   144  	REG_V31
   145  
   146  	// The EQ in
   147  	// 	CSET	EQ, R0
   148  	// is encoded as TYPE_REG, even though it's not really a register.
   149  	COND_EQ
   150  	COND_NE
   151  	COND_HS
   152  	COND_LO
   153  	COND_MI
   154  	COND_PL
   155  	COND_VS
   156  	COND_VC
   157  	COND_HI
   158  	COND_LS
   159  	COND_GE
   160  	COND_LT
   161  	COND_GT
   162  	COND_LE
   163  	COND_AL
   164  	COND_NV
   165  
   166  	REG_RSP = REG_V31 + 32 // to differentiate ZR/SP, REG_RSP&0x1f = 31
   167  )
   168  
   169  // bits 0-4 indicates register: Vn
   170  // bits 5-8 indicates arrangement: <T>
   171  const (
   172  	REG_ARNG = obj.RBaseARM64 + 1<<10 + iota<<9 // Vn.<T>
   173  	REG_ELEM                                    // Vn.<T>[index]
   174  	REG_ELEM_END
   175  )
   176  
   177  // Not registers, but flags that can be combined with regular register
   178  // constants to indicate extended register conversion. When checking,
   179  // you should subtract obj.RBaseARM64 first. From this difference, bit 11
   180  // indicates extended register, bits 8-10 select the conversion mode.
   181  // REG_LSL is the index shift specifier, bit 9 indicates shifted offset register.
   182  const REG_LSL = obj.RBaseARM64 + 1<<9
   183  const REG_EXT = obj.RBaseARM64 + 1<<11
   184  
   185  const (
   186  	REG_UXTB = REG_EXT + iota<<8
   187  	REG_UXTH
   188  	REG_UXTW
   189  	REG_UXTX
   190  	REG_SXTB
   191  	REG_SXTH
   192  	REG_SXTW
   193  	REG_SXTX
   194  )
   195  
   196  // Special registers, after subtracting obj.RBaseARM64, bit 12 indicates
   197  // a special register and the low bits select the register.
   198  // SYSREG_END is the last item in the automatically generated system register
   199  // declaration, and it is defined in the sysRegEnc.go file.
   200  const (
   201  	REG_SPECIAL = obj.RBaseARM64 + 1<<12
   202  	REG_DAIFSet = SYSREG_END + iota
   203  	REG_DAIFClr
   204  	REG_PLDL1KEEP
   205  	REG_PLDL1STRM
   206  	REG_PLDL2KEEP
   207  	REG_PLDL2STRM
   208  	REG_PLDL3KEEP
   209  	REG_PLDL3STRM
   210  	REG_PLIL1KEEP
   211  	REG_PLIL1STRM
   212  	REG_PLIL2KEEP
   213  	REG_PLIL2STRM
   214  	REG_PLIL3KEEP
   215  	REG_PLIL3STRM
   216  	REG_PSTL1KEEP
   217  	REG_PSTL1STRM
   218  	REG_PSTL2KEEP
   219  	REG_PSTL2STRM
   220  	REG_PSTL3KEEP
   221  	REG_PSTL3STRM
   222  )
   223  
   224  // Register assignments:
   225  //
   226  // compiler allocates R0 up as temps
   227  // compiler allocates register variables R7-R25
   228  // compiler allocates external registers R26 down
   229  //
   230  // compiler allocates register variables F7-F26
   231  // compiler allocates external registers F26 down
   232  const (
   233  	REGMIN = REG_R7  // register variables allocated from here to REGMAX
   234  	REGRT1 = REG_R16 // ARM64 IP0, external linker may use as a scrach register in trampoline
   235  	REGRT2 = REG_R17 // ARM64 IP1, external linker may use as a scrach register in trampoline
   236  	REGPR  = REG_R18 // ARM64 platform register, unused in the Go toolchain
   237  	REGMAX = REG_R25
   238  
   239  	REGCTXT = REG_R26 // environment for closures
   240  	REGTMP  = REG_R27 // reserved for liblink
   241  	REGG    = REG_R28 // G
   242  	REGFP   = REG_R29 // frame pointer, unused in the Go toolchain
   243  	REGLINK = REG_R30
   244  
   245  	// ARM64 uses R31 as both stack pointer and zero register,
   246  	// depending on the instruction. To differentiate RSP from ZR,
   247  	// we use a different numeric value for REGZERO and REGSP.
   248  	REGZERO = REG_R31
   249  	REGSP   = REG_RSP
   250  
   251  	FREGRET = REG_F0
   252  	FREGMIN = REG_F7  // first register variable
   253  	FREGMAX = REG_F26 // last register variable for 7g only
   254  	FREGEXT = REG_F26 // first external register
   255  )
   256  
   257  // http://infocenter.arm.com/help/topic/com.arm.doc.ecm0665627/abi_sve_aadwarf_100985_0000_00_en.pdf
   258  var ARM64DWARFRegisters = map[int16]int16{
   259  	REG_R0:  0,
   260  	REG_R1:  1,
   261  	REG_R2:  2,
   262  	REG_R3:  3,
   263  	REG_R4:  4,
   264  	REG_R5:  5,
   265  	REG_R6:  6,
   266  	REG_R7:  7,
   267  	REG_R8:  8,
   268  	REG_R9:  9,
   269  	REG_R10: 10,
   270  	REG_R11: 11,
   271  	REG_R12: 12,
   272  	REG_R13: 13,
   273  	REG_R14: 14,
   274  	REG_R15: 15,
   275  	REG_R16: 16,
   276  	REG_R17: 17,
   277  	REG_R18: 18,
   278  	REG_R19: 19,
   279  	REG_R20: 20,
   280  	REG_R21: 21,
   281  	REG_R22: 22,
   282  	REG_R23: 23,
   283  	REG_R24: 24,
   284  	REG_R25: 25,
   285  	REG_R26: 26,
   286  	REG_R27: 27,
   287  	REG_R28: 28,
   288  	REG_R29: 29,
   289  	REG_R30: 30,
   290  
   291  	// floating point
   292  	REG_F0:  64,
   293  	REG_F1:  65,
   294  	REG_F2:  66,
   295  	REG_F3:  67,
   296  	REG_F4:  68,
   297  	REG_F5:  69,
   298  	REG_F6:  70,
   299  	REG_F7:  71,
   300  	REG_F8:  72,
   301  	REG_F9:  73,
   302  	REG_F10: 74,
   303  	REG_F11: 75,
   304  	REG_F12: 76,
   305  	REG_F13: 77,
   306  	REG_F14: 78,
   307  	REG_F15: 79,
   308  	REG_F16: 80,
   309  	REG_F17: 81,
   310  	REG_F18: 82,
   311  	REG_F19: 83,
   312  	REG_F20: 84,
   313  	REG_F21: 85,
   314  	REG_F22: 86,
   315  	REG_F23: 87,
   316  	REG_F24: 88,
   317  	REG_F25: 89,
   318  	REG_F26: 90,
   319  	REG_F27: 91,
   320  	REG_F28: 92,
   321  	REG_F29: 93,
   322  	REG_F30: 94,
   323  	REG_F31: 95,
   324  
   325  	// SIMD
   326  	REG_V0:  64,
   327  	REG_V1:  65,
   328  	REG_V2:  66,
   329  	REG_V3:  67,
   330  	REG_V4:  68,
   331  	REG_V5:  69,
   332  	REG_V6:  70,
   333  	REG_V7:  71,
   334  	REG_V8:  72,
   335  	REG_V9:  73,
   336  	REG_V10: 74,
   337  	REG_V11: 75,
   338  	REG_V12: 76,
   339  	REG_V13: 77,
   340  	REG_V14: 78,
   341  	REG_V15: 79,
   342  	REG_V16: 80,
   343  	REG_V17: 81,
   344  	REG_V18: 82,
   345  	REG_V19: 83,
   346  	REG_V20: 84,
   347  	REG_V21: 85,
   348  	REG_V22: 86,
   349  	REG_V23: 87,
   350  	REG_V24: 88,
   351  	REG_V25: 89,
   352  	REG_V26: 90,
   353  	REG_V27: 91,
   354  	REG_V28: 92,
   355  	REG_V29: 93,
   356  	REG_V30: 94,
   357  	REG_V31: 95,
   358  }
   359  
   360  const (
   361  	BIG = 2048 - 8
   362  )
   363  
   364  const (
   365  	/* mark flags */
   366  	LABEL = 1 << iota
   367  	LEAF
   368  	FLOAT
   369  	BRANCH
   370  	LOAD
   371  	FCMP
   372  	SYNC
   373  	LIST
   374  	FOLL
   375  	NOSCHED
   376  )
   377  
   378  const (
   379  	// optab is sorted based on the order of these constants
   380  	// and the first match is chosen.
   381  	// The more specific class needs to come earlier.
   382  	C_NONE   = iota
   383  	C_REG    // R0..R30
   384  	C_RSP    // R0..R30, RSP
   385  	C_FREG   // F0..F31
   386  	C_VREG   // V0..V31
   387  	C_PAIR   // (Rn, Rm)
   388  	C_SHIFT  // Rn<<2
   389  	C_EXTREG // Rn.UXTB[<<3]
   390  	C_SPR    // REG_NZCV
   391  	C_COND   // EQ, NE, etc
   392  	C_ARNG   // Vn.<T>
   393  	C_ELEM   // Vn.<T>[index]
   394  	C_LIST   // [V1, V2, V3]
   395  
   396  	C_ZCON     // $0 or ZR
   397  	C_ABCON0   // could be C_ADDCON0 or C_BITCON
   398  	C_ADDCON0  // 12-bit unsigned, unshifted
   399  	C_ABCON    // could be C_ADDCON or C_BITCON
   400  	C_AMCON    // could be C_ADDCON or C_MOVCON
   401  	C_ADDCON   // 12-bit unsigned, shifted left by 0 or 12
   402  	C_MBCON    // could be C_MOVCON or C_BITCON
   403  	C_MOVCON   // generated by a 16-bit constant, optionally inverted and/or shifted by multiple of 16
   404  	C_BITCON   // bitfield and logical immediate masks
   405  	C_ADDCON2  // 24-bit constant
   406  	C_LCON     // 32-bit constant
   407  	C_MOVCON2  // a constant that can be loaded with one MOVZ/MOVN and one MOVK
   408  	C_MOVCON3  // a constant that can be loaded with one MOVZ/MOVN and two MOVKs
   409  	C_VCON     // 64-bit constant
   410  	C_FCON     // floating-point constant
   411  	C_VCONADDR // 64-bit memory address
   412  
   413  	C_AACON  // ADDCON offset in auto constant $a(FP)
   414  	C_AACON2 // 24-bit offset in auto constant $a(FP)
   415  	C_LACON  // 32-bit offset in auto constant $a(FP)
   416  	C_AECON  // ADDCON offset in extern constant $e(SB)
   417  
   418  	// TODO(aram): only one branch class should be enough
   419  	C_SBRA // for TYPE_BRANCH
   420  	C_LBRA
   421  
   422  	C_ZAUTO       // 0(RSP)
   423  	C_NSAUTO_8    // -256 <= x < 0, 0 mod 8
   424  	C_NSAUTO_4    // -256 <= x < 0, 0 mod 4
   425  	C_NSAUTO      // -256 <= x < 0
   426  	C_NPAUTO      // -512 <= x < 0, 0 mod 8
   427  	C_NAUTO4K     // -4095 <= x < 0
   428  	C_PSAUTO_8    // 0 to 255, 0 mod 8
   429  	C_PSAUTO_4    // 0 to 255, 0 mod 4
   430  	C_PSAUTO      // 0 to 255
   431  	C_PPAUTO_16   // 0 to 504, 0 mod 16
   432  	C_PPAUTO      // 0 to 504, 0 mod 8
   433  	C_UAUTO4K_16  // 0 to 4095, 0 mod 16
   434  	C_UAUTO4K_8   // 0 to 4095, 0 mod 8
   435  	C_UAUTO4K_4   // 0 to 4095, 0 mod 4
   436  	C_UAUTO4K_2   // 0 to 4095, 0 mod 2
   437  	C_UAUTO4K     // 0 to 4095
   438  	C_UAUTO8K_16  // 0 to 8190, 0 mod 16
   439  	C_UAUTO8K_8   // 0 to 8190, 0 mod 8
   440  	C_UAUTO8K_4   // 0 to 8190, 0 mod 4
   441  	C_UAUTO8K     // 0 to 8190, 0 mod 2  + C_PSAUTO
   442  	C_UAUTO16K_16 // 0 to 16380, 0 mod 16
   443  	C_UAUTO16K_8  // 0 to 16380, 0 mod 8
   444  	C_UAUTO16K    // 0 to 16380, 0 mod 4 + C_PSAUTO
   445  	C_UAUTO32K_16 // 0 to 32760, 0 mod 16 + C_PSAUTO
   446  	C_UAUTO32K    // 0 to 32760, 0 mod 8 + C_PSAUTO
   447  	C_UAUTO64K    // 0 to 65520, 0 mod 16 + C_PSAUTO
   448  	C_LAUTO       // any other 32-bit constant
   449  
   450  	C_SEXT1  // 0 to 4095, direct
   451  	C_SEXT2  // 0 to 8190
   452  	C_SEXT4  // 0 to 16380
   453  	C_SEXT8  // 0 to 32760
   454  	C_SEXT16 // 0 to 65520
   455  	C_LEXT
   456  
   457  	C_ZOREG    // 0(R)
   458  	C_NSOREG_8 // must mirror C_NSAUTO_8, etc
   459  	C_NSOREG_4
   460  	C_NSOREG
   461  	C_NPOREG
   462  	C_NOREG4K
   463  	C_PSOREG_8
   464  	C_PSOREG_4
   465  	C_PSOREG
   466  	C_PPOREG_16
   467  	C_PPOREG
   468  	C_UOREG4K_16
   469  	C_UOREG4K_8
   470  	C_UOREG4K_4
   471  	C_UOREG4K_2
   472  	C_UOREG4K
   473  	C_UOREG8K_16
   474  	C_UOREG8K_8
   475  	C_UOREG8K_4
   476  	C_UOREG8K
   477  	C_UOREG16K_16
   478  	C_UOREG16K_8
   479  	C_UOREG16K
   480  	C_UOREG32K_16
   481  	C_UOREG32K
   482  	C_UOREG64K
   483  	C_LOREG
   484  
   485  	C_ADDR // TODO(aram): explain difference from C_VCONADDR
   486  
   487  	// The GOT slot for a symbol in -dynlink mode.
   488  	C_GOTADDR
   489  
   490  	// TLS "var" in local exec mode: will become a constant offset from
   491  	// thread local base that is ultimately chosen by the program linker.
   492  	C_TLS_LE
   493  
   494  	// TLS "var" in initial exec mode: will become a memory address (chosen
   495  	// by the program linker) that the dynamic linker will fill with the
   496  	// offset from the thread local base.
   497  	C_TLS_IE
   498  
   499  	C_ROFF // register offset (including register extended)
   500  
   501  	C_GOK
   502  	C_TEXTSIZE
   503  	C_NCLASS // must be last
   504  )
   505  
   506  const (
   507  	C_XPRE  = 1 << 6 // match arm.C_WBIT, so Prog.String know how to print it
   508  	C_XPOST = 1 << 5 // match arm.C_PBIT, so Prog.String know how to print it
   509  )
   510  
   511  //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p arm64
   512  
   513  const (
   514  	AADC = obj.ABaseARM64 + obj.A_ARCHSPECIFIC + iota
   515  	AADCS
   516  	AADCSW
   517  	AADCW
   518  	AADD
   519  	AADDS
   520  	AADDSW
   521  	AADDW
   522  	AADR
   523  	AADRP
   524  	AAND
   525  	AANDS
   526  	AANDSW
   527  	AANDW
   528  	AASR
   529  	AASRW
   530  	AAT
   531  	ABFI
   532  	ABFIW
   533  	ABFM
   534  	ABFMW
   535  	ABFXIL
   536  	ABFXILW
   537  	ABIC
   538  	ABICS
   539  	ABICSW
   540  	ABICW
   541  	ABRK
   542  	ACBNZ
   543  	ACBNZW
   544  	ACBZ
   545  	ACBZW
   546  	ACCMN
   547  	ACCMNW
   548  	ACCMP
   549  	ACCMPW
   550  	ACINC
   551  	ACINCW
   552  	ACINV
   553  	ACINVW
   554  	ACLREX
   555  	ACLS
   556  	ACLSW
   557  	ACLZ
   558  	ACLZW
   559  	ACMN
   560  	ACMNW
   561  	ACMP
   562  	ACMPW
   563  	ACNEG
   564  	ACNEGW
   565  	ACRC32B
   566  	ACRC32CB
   567  	ACRC32CH
   568  	ACRC32CW
   569  	ACRC32CX
   570  	ACRC32H
   571  	ACRC32W
   572  	ACRC32X
   573  	ACSEL
   574  	ACSELW
   575  	ACSET
   576  	ACSETM
   577  	ACSETMW
   578  	ACSETW
   579  	ACSINC
   580  	ACSINCW
   581  	ACSINV
   582  	ACSINVW
   583  	ACSNEG
   584  	ACSNEGW
   585  	ADC
   586  	ADCPS1
   587  	ADCPS2
   588  	ADCPS3
   589  	ADMB
   590  	ADRPS
   591  	ADSB
   592  	AEON
   593  	AEONW
   594  	AEOR
   595  	AEORW
   596  	AERET
   597  	AEXTR
   598  	AEXTRW
   599  	AHINT
   600  	AHLT
   601  	AHVC
   602  	AIC
   603  	AISB
   604  	ALDADDAB
   605  	ALDADDAD
   606  	ALDADDAH
   607  	ALDADDAW
   608  	ALDADDALB
   609  	ALDADDALD
   610  	ALDADDALH
   611  	ALDADDALW
   612  	ALDADDB
   613  	ALDADDD
   614  	ALDADDH
   615  	ALDADDW
   616  	ALDADDLB
   617  	ALDADDLD
   618  	ALDADDLH
   619  	ALDADDLW
   620  	ALDAR
   621  	ALDARB
   622  	ALDARH
   623  	ALDARW
   624  	ALDAXP
   625  	ALDAXPW
   626  	ALDAXR
   627  	ALDAXRB
   628  	ALDAXRH
   629  	ALDAXRW
   630  	ALDCLRAB
   631  	ALDCLRAD
   632  	ALDCLRAH
   633  	ALDCLRAW
   634  	ALDCLRALB
   635  	ALDCLRALD
   636  	ALDCLRALH
   637  	ALDCLRALW
   638  	ALDCLRB
   639  	ALDCLRD
   640  	ALDCLRH
   641  	ALDCLRW
   642  	ALDCLRLB
   643  	ALDCLRLD
   644  	ALDCLRLH
   645  	ALDCLRLW
   646  	ALDEORAB
   647  	ALDEORAD
   648  	ALDEORAH
   649  	ALDEORAW
   650  	ALDEORALB
   651  	ALDEORALD
   652  	ALDEORALH
   653  	ALDEORALW
   654  	ALDEORB
   655  	ALDEORD
   656  	ALDEORH
   657  	ALDEORW
   658  	ALDEORLB
   659  	ALDEORLD
   660  	ALDEORLH
   661  	ALDEORLW
   662  	ALDORAB
   663  	ALDORAD
   664  	ALDORAH
   665  	ALDORAW
   666  	ALDORALB
   667  	ALDORALD
   668  	ALDORALH
   669  	ALDORALW
   670  	ALDORB
   671  	ALDORD
   672  	ALDORH
   673  	ALDORW
   674  	ALDORLB
   675  	ALDORLD
   676  	ALDORLH
   677  	ALDORLW
   678  	ALDP
   679  	ALDPW
   680  	ALDPSW
   681  	ALDXR
   682  	ALDXRB
   683  	ALDXRH
   684  	ALDXRW
   685  	ALDXP
   686  	ALDXPW
   687  	ALSL
   688  	ALSLW
   689  	ALSR
   690  	ALSRW
   691  	AMADD
   692  	AMADDW
   693  	AMNEG
   694  	AMNEGW
   695  	AMOVK
   696  	AMOVKW
   697  	AMOVN
   698  	AMOVNW
   699  	AMOVZ
   700  	AMOVZW
   701  	AMRS
   702  	AMSR
   703  	AMSUB
   704  	AMSUBW
   705  	AMUL
   706  	AMULW
   707  	AMVN
   708  	AMVNW
   709  	ANEG
   710  	ANEGS
   711  	ANEGSW
   712  	ANEGW
   713  	ANGC
   714  	ANGCS
   715  	ANGCSW
   716  	ANGCW
   717  	ANOOP
   718  	AORN
   719  	AORNW
   720  	AORR
   721  	AORRW
   722  	APRFM
   723  	APRFUM
   724  	ARBIT
   725  	ARBITW
   726  	AREM
   727  	AREMW
   728  	AREV
   729  	AREV16
   730  	AREV16W
   731  	AREV32
   732  	AREVW
   733  	AROR
   734  	ARORW
   735  	ASBC
   736  	ASBCS
   737  	ASBCSW
   738  	ASBCW
   739  	ASBFIZ
   740  	ASBFIZW
   741  	ASBFM
   742  	ASBFMW
   743  	ASBFX
   744  	ASBFXW
   745  	ASDIV
   746  	ASDIVW
   747  	ASEV
   748  	ASEVL
   749  	ASMADDL
   750  	ASMC
   751  	ASMNEGL
   752  	ASMSUBL
   753  	ASMULH
   754  	ASMULL
   755  	ASTXR
   756  	ASTXRB
   757  	ASTXRH
   758  	ASTXP
   759  	ASTXPW
   760  	ASTXRW
   761  	ASTLP
   762  	ASTLPW
   763  	ASTLR
   764  	ASTLRB
   765  	ASTLRH
   766  	ASTLRW
   767  	ASTLXP
   768  	ASTLXPW
   769  	ASTLXR
   770  	ASTLXRB
   771  	ASTLXRH
   772  	ASTLXRW
   773  	ASTP
   774  	ASTPW
   775  	ASUB
   776  	ASUBS
   777  	ASUBSW
   778  	ASUBW
   779  	ASVC
   780  	ASXTB
   781  	ASXTBW
   782  	ASXTH
   783  	ASXTHW
   784  	ASXTW
   785  	ASYS
   786  	ASYSL
   787  	ATBNZ
   788  	ATBZ
   789  	ATLBI
   790  	ATST
   791  	ATSTW
   792  	AUBFIZ
   793  	AUBFIZW
   794  	AUBFM
   795  	AUBFMW
   796  	AUBFX
   797  	AUBFXW
   798  	AUDIV
   799  	AUDIVW
   800  	AUMADDL
   801  	AUMNEGL
   802  	AUMSUBL
   803  	AUMULH
   804  	AUMULL
   805  	AUREM
   806  	AUREMW
   807  	AUXTB
   808  	AUXTH
   809  	AUXTW
   810  	AUXTBW
   811  	AUXTHW
   812  	AWFE
   813  	AWFI
   814  	AYIELD
   815  	AMOVB
   816  	AMOVBU
   817  	AMOVH
   818  	AMOVHU
   819  	AMOVW
   820  	AMOVWU
   821  	AMOVD
   822  	AMOVNP
   823  	AMOVNPW
   824  	AMOVP
   825  	AMOVPD
   826  	AMOVPQ
   827  	AMOVPS
   828  	AMOVPSW
   829  	AMOVPW
   830  	ASWPAD
   831  	ASWPAW
   832  	ASWPAH
   833  	ASWPAB
   834  	ASWPALD
   835  	ASWPALW
   836  	ASWPALH
   837  	ASWPALB
   838  	ASWPD
   839  	ASWPW
   840  	ASWPH
   841  	ASWPB
   842  	ASWPLD
   843  	ASWPLW
   844  	ASWPLH
   845  	ASWPLB
   846  	ACASD
   847  	ACASW
   848  	ACASH
   849  	ACASB
   850  	ACASAD
   851  	ACASAW
   852  	ACASLD
   853  	ACASLW
   854  	ACASALD
   855  	ACASALW
   856  	ACASALH
   857  	ACASALB
   858  	ACASPD
   859  	ACASPW
   860  	ABEQ
   861  	ABNE
   862  	ABCS
   863  	ABHS
   864  	ABCC
   865  	ABLO
   866  	ABMI
   867  	ABPL
   868  	ABVS
   869  	ABVC
   870  	ABHI
   871  	ABLS
   872  	ABGE
   873  	ABLT
   874  	ABGT
   875  	ABLE
   876  	AFABSD
   877  	AFABSS
   878  	AFADDD
   879  	AFADDS
   880  	AFCCMPD
   881  	AFCCMPED
   882  	AFCCMPS
   883  	AFCCMPES
   884  	AFCMPD
   885  	AFCMPED
   886  	AFCMPES
   887  	AFCMPS
   888  	AFCVTSD
   889  	AFCVTDS
   890  	AFCVTZSD
   891  	AFCVTZSDW
   892  	AFCVTZSS
   893  	AFCVTZSSW
   894  	AFCVTZUD
   895  	AFCVTZUDW
   896  	AFCVTZUS
   897  	AFCVTZUSW
   898  	AFDIVD
   899  	AFDIVS
   900  	AFLDPD
   901  	AFLDPS
   902  	AFMOVQ
   903  	AFMOVD
   904  	AFMOVS
   905  	AVMOVQ
   906  	AVMOVD
   907  	AVMOVS
   908  	AFMULD
   909  	AFMULS
   910  	AFNEGD
   911  	AFNEGS
   912  	AFSQRTD
   913  	AFSQRTS
   914  	AFSTPD
   915  	AFSTPS
   916  	AFSUBD
   917  	AFSUBS
   918  	ASCVTFD
   919  	ASCVTFS
   920  	ASCVTFWD
   921  	ASCVTFWS
   922  	AUCVTFD
   923  	AUCVTFS
   924  	AUCVTFWD
   925  	AUCVTFWS
   926  	AWORD
   927  	ADWORD
   928  	AFCSELS
   929  	AFCSELD
   930  	AFMAXS
   931  	AFMINS
   932  	AFMAXD
   933  	AFMIND
   934  	AFMAXNMS
   935  	AFMAXNMD
   936  	AFNMULS
   937  	AFNMULD
   938  	AFRINTNS
   939  	AFRINTND
   940  	AFRINTPS
   941  	AFRINTPD
   942  	AFRINTMS
   943  	AFRINTMD
   944  	AFRINTZS
   945  	AFRINTZD
   946  	AFRINTAS
   947  	AFRINTAD
   948  	AFRINTXS
   949  	AFRINTXD
   950  	AFRINTIS
   951  	AFRINTID
   952  	AFMADDS
   953  	AFMADDD
   954  	AFMSUBS
   955  	AFMSUBD
   956  	AFNMADDS
   957  	AFNMADDD
   958  	AFNMSUBS
   959  	AFNMSUBD
   960  	AFMINNMS
   961  	AFMINNMD
   962  	AFCVTDH
   963  	AFCVTHS
   964  	AFCVTHD
   965  	AFCVTSH
   966  	AAESD
   967  	AAESE
   968  	AAESIMC
   969  	AAESMC
   970  	ASHA1C
   971  	ASHA1H
   972  	ASHA1M
   973  	ASHA1P
   974  	ASHA1SU0
   975  	ASHA1SU1
   976  	ASHA256H
   977  	ASHA256H2
   978  	ASHA256SU0
   979  	ASHA256SU1
   980  	ASHA512H
   981  	ASHA512H2
   982  	ASHA512SU0
   983  	ASHA512SU1
   984  	AVADD
   985  	AVADDP
   986  	AVAND
   987  	AVBIF
   988  	AVBCAX
   989  	AVCMEQ
   990  	AVCNT
   991  	AVEOR
   992  	AVEOR3
   993  	AVMOV
   994  	AVLD1
   995  	AVLD2
   996  	AVLD3
   997  	AVLD4
   998  	AVLD1R
   999  	AVLD2R
  1000  	AVLD3R
  1001  	AVLD4R
  1002  	AVORR
  1003  	AVREV16
  1004  	AVREV32
  1005  	AVREV64
  1006  	AVST1
  1007  	AVST2
  1008  	AVST3
  1009  	AVST4
  1010  	AVDUP
  1011  	AVADDV
  1012  	AVMOVI
  1013  	AVUADDLV
  1014  	AVSUB
  1015  	AVFMLA
  1016  	AVFMLS
  1017  	AVPMULL
  1018  	AVPMULL2
  1019  	AVEXT
  1020  	AVRBIT
  1021  	AVRAX1
  1022  	AVUSHR
  1023  	AVUSHLL
  1024  	AVUSHLL2
  1025  	AVUXTL
  1026  	AVUXTL2
  1027  	AVUZP1
  1028  	AVUZP2
  1029  	AVSHL
  1030  	AVSRI
  1031  	AVSLI
  1032  	AVBSL
  1033  	AVBIT
  1034  	AVTBL
  1035  	AVXAR
  1036  	AVZIP1
  1037  	AVZIP2
  1038  	AVCMTST
  1039  	AVUADDW2
  1040  	AVUADDW
  1041  	AVUSRA
  1042  	ALAST
  1043  	AB  = obj.AJMP
  1044  	ABL = obj.ACALL
  1045  )
  1046  
  1047  const (
  1048  	// shift types
  1049  	SHIFT_LL = 0 << 22
  1050  	SHIFT_LR = 1 << 22
  1051  	SHIFT_AR = 2 << 22
  1052  )
  1053  
  1054  // Arrangement for ARM64 SIMD instructions
  1055  const (
  1056  	// arrangement types
  1057  	ARNG_8B = iota
  1058  	ARNG_16B
  1059  	ARNG_1D
  1060  	ARNG_4H
  1061  	ARNG_8H
  1062  	ARNG_2S
  1063  	ARNG_4S
  1064  	ARNG_2D
  1065  	ARNG_1Q
  1066  	ARNG_B
  1067  	ARNG_H
  1068  	ARNG_S
  1069  	ARNG_D
  1070  )
  1071  

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