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Source file src/cmd/compile/internal/ssa/rewriteMIPS.go

Documentation: cmd/compile/internal/ssa

     1  // Code generated from gen/MIPS.rules; DO NOT EDIT.
     2  // generated with: cd gen; go run *.go
     3  
     4  package ssa
     5  
     6  import "cmd/compile/internal/types"
     7  
     8  func rewriteValueMIPS(v *Value) bool {
     9  	switch v.Op {
    10  	case OpAdd16:
    11  		v.Op = OpMIPSADD
    12  		return true
    13  	case OpAdd32:
    14  		v.Op = OpMIPSADD
    15  		return true
    16  	case OpAdd32F:
    17  		v.Op = OpMIPSADDF
    18  		return true
    19  	case OpAdd32withcarry:
    20  		return rewriteValueMIPS_OpAdd32withcarry(v)
    21  	case OpAdd64F:
    22  		v.Op = OpMIPSADDD
    23  		return true
    24  	case OpAdd8:
    25  		v.Op = OpMIPSADD
    26  		return true
    27  	case OpAddPtr:
    28  		v.Op = OpMIPSADD
    29  		return true
    30  	case OpAddr:
    31  		return rewriteValueMIPS_OpAddr(v)
    32  	case OpAnd16:
    33  		v.Op = OpMIPSAND
    34  		return true
    35  	case OpAnd32:
    36  		v.Op = OpMIPSAND
    37  		return true
    38  	case OpAnd8:
    39  		v.Op = OpMIPSAND
    40  		return true
    41  	case OpAndB:
    42  		v.Op = OpMIPSAND
    43  		return true
    44  	case OpAtomicAdd32:
    45  		v.Op = OpMIPSLoweredAtomicAdd
    46  		return true
    47  	case OpAtomicAnd32:
    48  		v.Op = OpMIPSLoweredAtomicAnd
    49  		return true
    50  	case OpAtomicAnd8:
    51  		return rewriteValueMIPS_OpAtomicAnd8(v)
    52  	case OpAtomicCompareAndSwap32:
    53  		v.Op = OpMIPSLoweredAtomicCas
    54  		return true
    55  	case OpAtomicExchange32:
    56  		v.Op = OpMIPSLoweredAtomicExchange
    57  		return true
    58  	case OpAtomicLoad32:
    59  		v.Op = OpMIPSLoweredAtomicLoad32
    60  		return true
    61  	case OpAtomicLoad8:
    62  		v.Op = OpMIPSLoweredAtomicLoad8
    63  		return true
    64  	case OpAtomicLoadPtr:
    65  		v.Op = OpMIPSLoweredAtomicLoad32
    66  		return true
    67  	case OpAtomicOr32:
    68  		v.Op = OpMIPSLoweredAtomicOr
    69  		return true
    70  	case OpAtomicOr8:
    71  		return rewriteValueMIPS_OpAtomicOr8(v)
    72  	case OpAtomicStore32:
    73  		v.Op = OpMIPSLoweredAtomicStore32
    74  		return true
    75  	case OpAtomicStore8:
    76  		v.Op = OpMIPSLoweredAtomicStore8
    77  		return true
    78  	case OpAtomicStorePtrNoWB:
    79  		v.Op = OpMIPSLoweredAtomicStore32
    80  		return true
    81  	case OpAvg32u:
    82  		return rewriteValueMIPS_OpAvg32u(v)
    83  	case OpBitLen32:
    84  		return rewriteValueMIPS_OpBitLen32(v)
    85  	case OpClosureCall:
    86  		v.Op = OpMIPSCALLclosure
    87  		return true
    88  	case OpCom16:
    89  		return rewriteValueMIPS_OpCom16(v)
    90  	case OpCom32:
    91  		return rewriteValueMIPS_OpCom32(v)
    92  	case OpCom8:
    93  		return rewriteValueMIPS_OpCom8(v)
    94  	case OpConst16:
    95  		return rewriteValueMIPS_OpConst16(v)
    96  	case OpConst32:
    97  		return rewriteValueMIPS_OpConst32(v)
    98  	case OpConst32F:
    99  		v.Op = OpMIPSMOVFconst
   100  		return true
   101  	case OpConst64F:
   102  		v.Op = OpMIPSMOVDconst
   103  		return true
   104  	case OpConst8:
   105  		return rewriteValueMIPS_OpConst8(v)
   106  	case OpConstBool:
   107  		return rewriteValueMIPS_OpConstBool(v)
   108  	case OpConstNil:
   109  		return rewriteValueMIPS_OpConstNil(v)
   110  	case OpCtz32:
   111  		return rewriteValueMIPS_OpCtz32(v)
   112  	case OpCtz32NonZero:
   113  		v.Op = OpCtz32
   114  		return true
   115  	case OpCvt32Fto32:
   116  		v.Op = OpMIPSTRUNCFW
   117  		return true
   118  	case OpCvt32Fto64F:
   119  		v.Op = OpMIPSMOVFD
   120  		return true
   121  	case OpCvt32to32F:
   122  		v.Op = OpMIPSMOVWF
   123  		return true
   124  	case OpCvt32to64F:
   125  		v.Op = OpMIPSMOVWD
   126  		return true
   127  	case OpCvt64Fto32:
   128  		v.Op = OpMIPSTRUNCDW
   129  		return true
   130  	case OpCvt64Fto32F:
   131  		v.Op = OpMIPSMOVDF
   132  		return true
   133  	case OpCvtBoolToUint8:
   134  		v.Op = OpCopy
   135  		return true
   136  	case OpDiv16:
   137  		return rewriteValueMIPS_OpDiv16(v)
   138  	case OpDiv16u:
   139  		return rewriteValueMIPS_OpDiv16u(v)
   140  	case OpDiv32:
   141  		return rewriteValueMIPS_OpDiv32(v)
   142  	case OpDiv32F:
   143  		v.Op = OpMIPSDIVF
   144  		return true
   145  	case OpDiv32u:
   146  		return rewriteValueMIPS_OpDiv32u(v)
   147  	case OpDiv64F:
   148  		v.Op = OpMIPSDIVD
   149  		return true
   150  	case OpDiv8:
   151  		return rewriteValueMIPS_OpDiv8(v)
   152  	case OpDiv8u:
   153  		return rewriteValueMIPS_OpDiv8u(v)
   154  	case OpEq16:
   155  		return rewriteValueMIPS_OpEq16(v)
   156  	case OpEq32:
   157  		return rewriteValueMIPS_OpEq32(v)
   158  	case OpEq32F:
   159  		return rewriteValueMIPS_OpEq32F(v)
   160  	case OpEq64F:
   161  		return rewriteValueMIPS_OpEq64F(v)
   162  	case OpEq8:
   163  		return rewriteValueMIPS_OpEq8(v)
   164  	case OpEqB:
   165  		return rewriteValueMIPS_OpEqB(v)
   166  	case OpEqPtr:
   167  		return rewriteValueMIPS_OpEqPtr(v)
   168  	case OpGetCallerPC:
   169  		v.Op = OpMIPSLoweredGetCallerPC
   170  		return true
   171  	case OpGetCallerSP:
   172  		v.Op = OpMIPSLoweredGetCallerSP
   173  		return true
   174  	case OpGetClosurePtr:
   175  		v.Op = OpMIPSLoweredGetClosurePtr
   176  		return true
   177  	case OpHmul32:
   178  		return rewriteValueMIPS_OpHmul32(v)
   179  	case OpHmul32u:
   180  		return rewriteValueMIPS_OpHmul32u(v)
   181  	case OpInterCall:
   182  		v.Op = OpMIPSCALLinter
   183  		return true
   184  	case OpIsInBounds:
   185  		return rewriteValueMIPS_OpIsInBounds(v)
   186  	case OpIsNonNil:
   187  		return rewriteValueMIPS_OpIsNonNil(v)
   188  	case OpIsSliceInBounds:
   189  		return rewriteValueMIPS_OpIsSliceInBounds(v)
   190  	case OpLeq16:
   191  		return rewriteValueMIPS_OpLeq16(v)
   192  	case OpLeq16U:
   193  		return rewriteValueMIPS_OpLeq16U(v)
   194  	case OpLeq32:
   195  		return rewriteValueMIPS_OpLeq32(v)
   196  	case OpLeq32F:
   197  		return rewriteValueMIPS_OpLeq32F(v)
   198  	case OpLeq32U:
   199  		return rewriteValueMIPS_OpLeq32U(v)
   200  	case OpLeq64F:
   201  		return rewriteValueMIPS_OpLeq64F(v)
   202  	case OpLeq8:
   203  		return rewriteValueMIPS_OpLeq8(v)
   204  	case OpLeq8U:
   205  		return rewriteValueMIPS_OpLeq8U(v)
   206  	case OpLess16:
   207  		return rewriteValueMIPS_OpLess16(v)
   208  	case OpLess16U:
   209  		return rewriteValueMIPS_OpLess16U(v)
   210  	case OpLess32:
   211  		return rewriteValueMIPS_OpLess32(v)
   212  	case OpLess32F:
   213  		return rewriteValueMIPS_OpLess32F(v)
   214  	case OpLess32U:
   215  		return rewriteValueMIPS_OpLess32U(v)
   216  	case OpLess64F:
   217  		return rewriteValueMIPS_OpLess64F(v)
   218  	case OpLess8:
   219  		return rewriteValueMIPS_OpLess8(v)
   220  	case OpLess8U:
   221  		return rewriteValueMIPS_OpLess8U(v)
   222  	case OpLoad:
   223  		return rewriteValueMIPS_OpLoad(v)
   224  	case OpLocalAddr:
   225  		return rewriteValueMIPS_OpLocalAddr(v)
   226  	case OpLsh16x16:
   227  		return rewriteValueMIPS_OpLsh16x16(v)
   228  	case OpLsh16x32:
   229  		return rewriteValueMIPS_OpLsh16x32(v)
   230  	case OpLsh16x64:
   231  		return rewriteValueMIPS_OpLsh16x64(v)
   232  	case OpLsh16x8:
   233  		return rewriteValueMIPS_OpLsh16x8(v)
   234  	case OpLsh32x16:
   235  		return rewriteValueMIPS_OpLsh32x16(v)
   236  	case OpLsh32x32:
   237  		return rewriteValueMIPS_OpLsh32x32(v)
   238  	case OpLsh32x64:
   239  		return rewriteValueMIPS_OpLsh32x64(v)
   240  	case OpLsh32x8:
   241  		return rewriteValueMIPS_OpLsh32x8(v)
   242  	case OpLsh8x16:
   243  		return rewriteValueMIPS_OpLsh8x16(v)
   244  	case OpLsh8x32:
   245  		return rewriteValueMIPS_OpLsh8x32(v)
   246  	case OpLsh8x64:
   247  		return rewriteValueMIPS_OpLsh8x64(v)
   248  	case OpLsh8x8:
   249  		return rewriteValueMIPS_OpLsh8x8(v)
   250  	case OpMIPSADD:
   251  		return rewriteValueMIPS_OpMIPSADD(v)
   252  	case OpMIPSADDconst:
   253  		return rewriteValueMIPS_OpMIPSADDconst(v)
   254  	case OpMIPSAND:
   255  		return rewriteValueMIPS_OpMIPSAND(v)
   256  	case OpMIPSANDconst:
   257  		return rewriteValueMIPS_OpMIPSANDconst(v)
   258  	case OpMIPSCMOVZ:
   259  		return rewriteValueMIPS_OpMIPSCMOVZ(v)
   260  	case OpMIPSCMOVZzero:
   261  		return rewriteValueMIPS_OpMIPSCMOVZzero(v)
   262  	case OpMIPSLoweredAtomicAdd:
   263  		return rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v)
   264  	case OpMIPSLoweredAtomicStore32:
   265  		return rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v)
   266  	case OpMIPSMOVBUload:
   267  		return rewriteValueMIPS_OpMIPSMOVBUload(v)
   268  	case OpMIPSMOVBUreg:
   269  		return rewriteValueMIPS_OpMIPSMOVBUreg(v)
   270  	case OpMIPSMOVBload:
   271  		return rewriteValueMIPS_OpMIPSMOVBload(v)
   272  	case OpMIPSMOVBreg:
   273  		return rewriteValueMIPS_OpMIPSMOVBreg(v)
   274  	case OpMIPSMOVBstore:
   275  		return rewriteValueMIPS_OpMIPSMOVBstore(v)
   276  	case OpMIPSMOVBstorezero:
   277  		return rewriteValueMIPS_OpMIPSMOVBstorezero(v)
   278  	case OpMIPSMOVDload:
   279  		return rewriteValueMIPS_OpMIPSMOVDload(v)
   280  	case OpMIPSMOVDstore:
   281  		return rewriteValueMIPS_OpMIPSMOVDstore(v)
   282  	case OpMIPSMOVFload:
   283  		return rewriteValueMIPS_OpMIPSMOVFload(v)
   284  	case OpMIPSMOVFstore:
   285  		return rewriteValueMIPS_OpMIPSMOVFstore(v)
   286  	case OpMIPSMOVHUload:
   287  		return rewriteValueMIPS_OpMIPSMOVHUload(v)
   288  	case OpMIPSMOVHUreg:
   289  		return rewriteValueMIPS_OpMIPSMOVHUreg(v)
   290  	case OpMIPSMOVHload:
   291  		return rewriteValueMIPS_OpMIPSMOVHload(v)
   292  	case OpMIPSMOVHreg:
   293  		return rewriteValueMIPS_OpMIPSMOVHreg(v)
   294  	case OpMIPSMOVHstore:
   295  		return rewriteValueMIPS_OpMIPSMOVHstore(v)
   296  	case OpMIPSMOVHstorezero:
   297  		return rewriteValueMIPS_OpMIPSMOVHstorezero(v)
   298  	case OpMIPSMOVWload:
   299  		return rewriteValueMIPS_OpMIPSMOVWload(v)
   300  	case OpMIPSMOVWreg:
   301  		return rewriteValueMIPS_OpMIPSMOVWreg(v)
   302  	case OpMIPSMOVWstore:
   303  		return rewriteValueMIPS_OpMIPSMOVWstore(v)
   304  	case OpMIPSMOVWstorezero:
   305  		return rewriteValueMIPS_OpMIPSMOVWstorezero(v)
   306  	case OpMIPSMUL:
   307  		return rewriteValueMIPS_OpMIPSMUL(v)
   308  	case OpMIPSNEG:
   309  		return rewriteValueMIPS_OpMIPSNEG(v)
   310  	case OpMIPSNOR:
   311  		return rewriteValueMIPS_OpMIPSNOR(v)
   312  	case OpMIPSNORconst:
   313  		return rewriteValueMIPS_OpMIPSNORconst(v)
   314  	case OpMIPSOR:
   315  		return rewriteValueMIPS_OpMIPSOR(v)
   316  	case OpMIPSORconst:
   317  		return rewriteValueMIPS_OpMIPSORconst(v)
   318  	case OpMIPSSGT:
   319  		return rewriteValueMIPS_OpMIPSSGT(v)
   320  	case OpMIPSSGTU:
   321  		return rewriteValueMIPS_OpMIPSSGTU(v)
   322  	case OpMIPSSGTUconst:
   323  		return rewriteValueMIPS_OpMIPSSGTUconst(v)
   324  	case OpMIPSSGTUzero:
   325  		return rewriteValueMIPS_OpMIPSSGTUzero(v)
   326  	case OpMIPSSGTconst:
   327  		return rewriteValueMIPS_OpMIPSSGTconst(v)
   328  	case OpMIPSSGTzero:
   329  		return rewriteValueMIPS_OpMIPSSGTzero(v)
   330  	case OpMIPSSLL:
   331  		return rewriteValueMIPS_OpMIPSSLL(v)
   332  	case OpMIPSSLLconst:
   333  		return rewriteValueMIPS_OpMIPSSLLconst(v)
   334  	case OpMIPSSRA:
   335  		return rewriteValueMIPS_OpMIPSSRA(v)
   336  	case OpMIPSSRAconst:
   337  		return rewriteValueMIPS_OpMIPSSRAconst(v)
   338  	case OpMIPSSRL:
   339  		return rewriteValueMIPS_OpMIPSSRL(v)
   340  	case OpMIPSSRLconst:
   341  		return rewriteValueMIPS_OpMIPSSRLconst(v)
   342  	case OpMIPSSUB:
   343  		return rewriteValueMIPS_OpMIPSSUB(v)
   344  	case OpMIPSSUBconst:
   345  		return rewriteValueMIPS_OpMIPSSUBconst(v)
   346  	case OpMIPSXOR:
   347  		return rewriteValueMIPS_OpMIPSXOR(v)
   348  	case OpMIPSXORconst:
   349  		return rewriteValueMIPS_OpMIPSXORconst(v)
   350  	case OpMod16:
   351  		return rewriteValueMIPS_OpMod16(v)
   352  	case OpMod16u:
   353  		return rewriteValueMIPS_OpMod16u(v)
   354  	case OpMod32:
   355  		return rewriteValueMIPS_OpMod32(v)
   356  	case OpMod32u:
   357  		return rewriteValueMIPS_OpMod32u(v)
   358  	case OpMod8:
   359  		return rewriteValueMIPS_OpMod8(v)
   360  	case OpMod8u:
   361  		return rewriteValueMIPS_OpMod8u(v)
   362  	case OpMove:
   363  		return rewriteValueMIPS_OpMove(v)
   364  	case OpMul16:
   365  		v.Op = OpMIPSMUL
   366  		return true
   367  	case OpMul32:
   368  		v.Op = OpMIPSMUL
   369  		return true
   370  	case OpMul32F:
   371  		v.Op = OpMIPSMULF
   372  		return true
   373  	case OpMul32uhilo:
   374  		v.Op = OpMIPSMULTU
   375  		return true
   376  	case OpMul64F:
   377  		v.Op = OpMIPSMULD
   378  		return true
   379  	case OpMul8:
   380  		v.Op = OpMIPSMUL
   381  		return true
   382  	case OpNeg16:
   383  		v.Op = OpMIPSNEG
   384  		return true
   385  	case OpNeg32:
   386  		v.Op = OpMIPSNEG
   387  		return true
   388  	case OpNeg32F:
   389  		v.Op = OpMIPSNEGF
   390  		return true
   391  	case OpNeg64F:
   392  		v.Op = OpMIPSNEGD
   393  		return true
   394  	case OpNeg8:
   395  		v.Op = OpMIPSNEG
   396  		return true
   397  	case OpNeq16:
   398  		return rewriteValueMIPS_OpNeq16(v)
   399  	case OpNeq32:
   400  		return rewriteValueMIPS_OpNeq32(v)
   401  	case OpNeq32F:
   402  		return rewriteValueMIPS_OpNeq32F(v)
   403  	case OpNeq64F:
   404  		return rewriteValueMIPS_OpNeq64F(v)
   405  	case OpNeq8:
   406  		return rewriteValueMIPS_OpNeq8(v)
   407  	case OpNeqB:
   408  		v.Op = OpMIPSXOR
   409  		return true
   410  	case OpNeqPtr:
   411  		return rewriteValueMIPS_OpNeqPtr(v)
   412  	case OpNilCheck:
   413  		v.Op = OpMIPSLoweredNilCheck
   414  		return true
   415  	case OpNot:
   416  		return rewriteValueMIPS_OpNot(v)
   417  	case OpOffPtr:
   418  		return rewriteValueMIPS_OpOffPtr(v)
   419  	case OpOr16:
   420  		v.Op = OpMIPSOR
   421  		return true
   422  	case OpOr32:
   423  		v.Op = OpMIPSOR
   424  		return true
   425  	case OpOr8:
   426  		v.Op = OpMIPSOR
   427  		return true
   428  	case OpOrB:
   429  		v.Op = OpMIPSOR
   430  		return true
   431  	case OpPanicBounds:
   432  		return rewriteValueMIPS_OpPanicBounds(v)
   433  	case OpPanicExtend:
   434  		return rewriteValueMIPS_OpPanicExtend(v)
   435  	case OpRotateLeft16:
   436  		return rewriteValueMIPS_OpRotateLeft16(v)
   437  	case OpRotateLeft32:
   438  		return rewriteValueMIPS_OpRotateLeft32(v)
   439  	case OpRotateLeft64:
   440  		return rewriteValueMIPS_OpRotateLeft64(v)
   441  	case OpRotateLeft8:
   442  		return rewriteValueMIPS_OpRotateLeft8(v)
   443  	case OpRound32F:
   444  		v.Op = OpCopy
   445  		return true
   446  	case OpRound64F:
   447  		v.Op = OpCopy
   448  		return true
   449  	case OpRsh16Ux16:
   450  		return rewriteValueMIPS_OpRsh16Ux16(v)
   451  	case OpRsh16Ux32:
   452  		return rewriteValueMIPS_OpRsh16Ux32(v)
   453  	case OpRsh16Ux64:
   454  		return rewriteValueMIPS_OpRsh16Ux64(v)
   455  	case OpRsh16Ux8:
   456  		return rewriteValueMIPS_OpRsh16Ux8(v)
   457  	case OpRsh16x16:
   458  		return rewriteValueMIPS_OpRsh16x16(v)
   459  	case OpRsh16x32:
   460  		return rewriteValueMIPS_OpRsh16x32(v)
   461  	case OpRsh16x64:
   462  		return rewriteValueMIPS_OpRsh16x64(v)
   463  	case OpRsh16x8:
   464  		return rewriteValueMIPS_OpRsh16x8(v)
   465  	case OpRsh32Ux16:
   466  		return rewriteValueMIPS_OpRsh32Ux16(v)
   467  	case OpRsh32Ux32:
   468  		return rewriteValueMIPS_OpRsh32Ux32(v)
   469  	case OpRsh32Ux64:
   470  		return rewriteValueMIPS_OpRsh32Ux64(v)
   471  	case OpRsh32Ux8:
   472  		return rewriteValueMIPS_OpRsh32Ux8(v)
   473  	case OpRsh32x16:
   474  		return rewriteValueMIPS_OpRsh32x16(v)
   475  	case OpRsh32x32:
   476  		return rewriteValueMIPS_OpRsh32x32(v)
   477  	case OpRsh32x64:
   478  		return rewriteValueMIPS_OpRsh32x64(v)
   479  	case OpRsh32x8:
   480  		return rewriteValueMIPS_OpRsh32x8(v)
   481  	case OpRsh8Ux16:
   482  		return rewriteValueMIPS_OpRsh8Ux16(v)
   483  	case OpRsh8Ux32:
   484  		return rewriteValueMIPS_OpRsh8Ux32(v)
   485  	case OpRsh8Ux64:
   486  		return rewriteValueMIPS_OpRsh8Ux64(v)
   487  	case OpRsh8Ux8:
   488  		return rewriteValueMIPS_OpRsh8Ux8(v)
   489  	case OpRsh8x16:
   490  		return rewriteValueMIPS_OpRsh8x16(v)
   491  	case OpRsh8x32:
   492  		return rewriteValueMIPS_OpRsh8x32(v)
   493  	case OpRsh8x64:
   494  		return rewriteValueMIPS_OpRsh8x64(v)
   495  	case OpRsh8x8:
   496  		return rewriteValueMIPS_OpRsh8x8(v)
   497  	case OpSelect0:
   498  		return rewriteValueMIPS_OpSelect0(v)
   499  	case OpSelect1:
   500  		return rewriteValueMIPS_OpSelect1(v)
   501  	case OpSignExt16to32:
   502  		v.Op = OpMIPSMOVHreg
   503  		return true
   504  	case OpSignExt8to16:
   505  		v.Op = OpMIPSMOVBreg
   506  		return true
   507  	case OpSignExt8to32:
   508  		v.Op = OpMIPSMOVBreg
   509  		return true
   510  	case OpSignmask:
   511  		return rewriteValueMIPS_OpSignmask(v)
   512  	case OpSlicemask:
   513  		return rewriteValueMIPS_OpSlicemask(v)
   514  	case OpSqrt:
   515  		v.Op = OpMIPSSQRTD
   516  		return true
   517  	case OpStaticCall:
   518  		v.Op = OpMIPSCALLstatic
   519  		return true
   520  	case OpStore:
   521  		return rewriteValueMIPS_OpStore(v)
   522  	case OpSub16:
   523  		v.Op = OpMIPSSUB
   524  		return true
   525  	case OpSub32:
   526  		v.Op = OpMIPSSUB
   527  		return true
   528  	case OpSub32F:
   529  		v.Op = OpMIPSSUBF
   530  		return true
   531  	case OpSub32withcarry:
   532  		return rewriteValueMIPS_OpSub32withcarry(v)
   533  	case OpSub64F:
   534  		v.Op = OpMIPSSUBD
   535  		return true
   536  	case OpSub8:
   537  		v.Op = OpMIPSSUB
   538  		return true
   539  	case OpSubPtr:
   540  		v.Op = OpMIPSSUB
   541  		return true
   542  	case OpTrunc16to8:
   543  		v.Op = OpCopy
   544  		return true
   545  	case OpTrunc32to16:
   546  		v.Op = OpCopy
   547  		return true
   548  	case OpTrunc32to8:
   549  		v.Op = OpCopy
   550  		return true
   551  	case OpWB:
   552  		v.Op = OpMIPSLoweredWB
   553  		return true
   554  	case OpXor16:
   555  		v.Op = OpMIPSXOR
   556  		return true
   557  	case OpXor32:
   558  		v.Op = OpMIPSXOR
   559  		return true
   560  	case OpXor8:
   561  		v.Op = OpMIPSXOR
   562  		return true
   563  	case OpZero:
   564  		return rewriteValueMIPS_OpZero(v)
   565  	case OpZeroExt16to32:
   566  		v.Op = OpMIPSMOVHUreg
   567  		return true
   568  	case OpZeroExt8to16:
   569  		v.Op = OpMIPSMOVBUreg
   570  		return true
   571  	case OpZeroExt8to32:
   572  		v.Op = OpMIPSMOVBUreg
   573  		return true
   574  	case OpZeromask:
   575  		return rewriteValueMIPS_OpZeromask(v)
   576  	}
   577  	return false
   578  }
   579  func rewriteValueMIPS_OpAdd32withcarry(v *Value) bool {
   580  	v_2 := v.Args[2]
   581  	v_1 := v.Args[1]
   582  	v_0 := v.Args[0]
   583  	b := v.Block
   584  	// match: (Add32withcarry <t> x y c)
   585  	// result: (ADD c (ADD <t> x y))
   586  	for {
   587  		t := v.Type
   588  		x := v_0
   589  		y := v_1
   590  		c := v_2
   591  		v.reset(OpMIPSADD)
   592  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t)
   593  		v0.AddArg2(x, y)
   594  		v.AddArg2(c, v0)
   595  		return true
   596  	}
   597  }
   598  func rewriteValueMIPS_OpAddr(v *Value) bool {
   599  	v_0 := v.Args[0]
   600  	// match: (Addr {sym} base)
   601  	// result: (MOVWaddr {sym} base)
   602  	for {
   603  		sym := auxToSym(v.Aux)
   604  		base := v_0
   605  		v.reset(OpMIPSMOVWaddr)
   606  		v.Aux = symToAux(sym)
   607  		v.AddArg(base)
   608  		return true
   609  	}
   610  }
   611  func rewriteValueMIPS_OpAtomicAnd8(v *Value) bool {
   612  	v_2 := v.Args[2]
   613  	v_1 := v.Args[1]
   614  	v_0 := v.Args[0]
   615  	b := v.Block
   616  	config := b.Func.Config
   617  	typ := &b.Func.Config.Types
   618  	// match: (AtomicAnd8 ptr val mem)
   619  	// cond: !config.BigEndian
   620  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))))) mem)
   621  	for {
   622  		ptr := v_0
   623  		val := v_1
   624  		mem := v_2
   625  		if !(!config.BigEndian) {
   626  			break
   627  		}
   628  		v.reset(OpMIPSLoweredAtomicAnd)
   629  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   630  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   631  		v1.AuxInt = int32ToAuxInt(^3)
   632  		v0.AddArg2(v1, ptr)
   633  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   634  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   635  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   636  		v4.AddArg(val)
   637  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   638  		v5.AuxInt = int32ToAuxInt(3)
   639  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   640  		v6.AuxInt = int32ToAuxInt(3)
   641  		v6.AddArg(ptr)
   642  		v5.AddArg(v6)
   643  		v3.AddArg2(v4, v5)
   644  		v7 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32)
   645  		v7.AuxInt = int32ToAuxInt(0)
   646  		v8 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   647  		v9 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   648  		v9.AuxInt = int32ToAuxInt(0xff)
   649  		v8.AddArg2(v9, v5)
   650  		v7.AddArg(v8)
   651  		v2.AddArg2(v3, v7)
   652  		v.AddArg3(v0, v2, mem)
   653  		return true
   654  	}
   655  	// match: (AtomicAnd8 ptr val mem)
   656  	// cond: config.BigEndian
   657  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))))) mem)
   658  	for {
   659  		ptr := v_0
   660  		val := v_1
   661  		mem := v_2
   662  		if !(config.BigEndian) {
   663  			break
   664  		}
   665  		v.reset(OpMIPSLoweredAtomicAnd)
   666  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   667  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   668  		v1.AuxInt = int32ToAuxInt(^3)
   669  		v0.AddArg2(v1, ptr)
   670  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   671  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   672  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   673  		v4.AddArg(val)
   674  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   675  		v5.AuxInt = int32ToAuxInt(3)
   676  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   677  		v6.AuxInt = int32ToAuxInt(3)
   678  		v7 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   679  		v7.AuxInt = int32ToAuxInt(3)
   680  		v7.AddArg(ptr)
   681  		v6.AddArg(v7)
   682  		v5.AddArg(v6)
   683  		v3.AddArg2(v4, v5)
   684  		v8 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32)
   685  		v8.AuxInt = int32ToAuxInt(0)
   686  		v9 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   687  		v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   688  		v10.AuxInt = int32ToAuxInt(0xff)
   689  		v9.AddArg2(v10, v5)
   690  		v8.AddArg(v9)
   691  		v2.AddArg2(v3, v8)
   692  		v.AddArg3(v0, v2, mem)
   693  		return true
   694  	}
   695  	return false
   696  }
   697  func rewriteValueMIPS_OpAtomicOr8(v *Value) bool {
   698  	v_2 := v.Args[2]
   699  	v_1 := v.Args[1]
   700  	v_0 := v.Args[0]
   701  	b := v.Block
   702  	config := b.Func.Config
   703  	typ := &b.Func.Config.Types
   704  	// match: (AtomicOr8 ptr val mem)
   705  	// cond: !config.BigEndian
   706  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) mem)
   707  	for {
   708  		ptr := v_0
   709  		val := v_1
   710  		mem := v_2
   711  		if !(!config.BigEndian) {
   712  			break
   713  		}
   714  		v.reset(OpMIPSLoweredAtomicOr)
   715  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   716  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   717  		v1.AuxInt = int32ToAuxInt(^3)
   718  		v0.AddArg2(v1, ptr)
   719  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   720  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   721  		v3.AddArg(val)
   722  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   723  		v4.AuxInt = int32ToAuxInt(3)
   724  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   725  		v5.AuxInt = int32ToAuxInt(3)
   726  		v5.AddArg(ptr)
   727  		v4.AddArg(v5)
   728  		v2.AddArg2(v3, v4)
   729  		v.AddArg3(v0, v2, mem)
   730  		return true
   731  	}
   732  	// match: (AtomicOr8 ptr val mem)
   733  	// cond: config.BigEndian
   734  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) mem)
   735  	for {
   736  		ptr := v_0
   737  		val := v_1
   738  		mem := v_2
   739  		if !(config.BigEndian) {
   740  			break
   741  		}
   742  		v.reset(OpMIPSLoweredAtomicOr)
   743  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   744  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   745  		v1.AuxInt = int32ToAuxInt(^3)
   746  		v0.AddArg2(v1, ptr)
   747  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   748  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   749  		v3.AddArg(val)
   750  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   751  		v4.AuxInt = int32ToAuxInt(3)
   752  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   753  		v5.AuxInt = int32ToAuxInt(3)
   754  		v6 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   755  		v6.AuxInt = int32ToAuxInt(3)
   756  		v6.AddArg(ptr)
   757  		v5.AddArg(v6)
   758  		v4.AddArg(v5)
   759  		v2.AddArg2(v3, v4)
   760  		v.AddArg3(v0, v2, mem)
   761  		return true
   762  	}
   763  	return false
   764  }
   765  func rewriteValueMIPS_OpAvg32u(v *Value) bool {
   766  	v_1 := v.Args[1]
   767  	v_0 := v.Args[0]
   768  	b := v.Block
   769  	// match: (Avg32u <t> x y)
   770  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
   771  	for {
   772  		t := v.Type
   773  		x := v_0
   774  		y := v_1
   775  		v.reset(OpMIPSADD)
   776  		v0 := b.NewValue0(v.Pos, OpMIPSSRLconst, t)
   777  		v0.AuxInt = int32ToAuxInt(1)
   778  		v1 := b.NewValue0(v.Pos, OpMIPSSUB, t)
   779  		v1.AddArg2(x, y)
   780  		v0.AddArg(v1)
   781  		v.AddArg2(v0, y)
   782  		return true
   783  	}
   784  }
   785  func rewriteValueMIPS_OpBitLen32(v *Value) bool {
   786  	v_0 := v.Args[0]
   787  	b := v.Block
   788  	typ := &b.Func.Config.Types
   789  	// match: (BitLen32 <t> x)
   790  	// result: (SUB (MOVWconst [32]) (CLZ <t> x))
   791  	for {
   792  		t := v.Type
   793  		x := v_0
   794  		v.reset(OpMIPSSUB)
   795  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   796  		v0.AuxInt = int32ToAuxInt(32)
   797  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   798  		v1.AddArg(x)
   799  		v.AddArg2(v0, v1)
   800  		return true
   801  	}
   802  }
   803  func rewriteValueMIPS_OpCom16(v *Value) bool {
   804  	v_0 := v.Args[0]
   805  	// match: (Com16 x)
   806  	// result: (NORconst [0] x)
   807  	for {
   808  		x := v_0
   809  		v.reset(OpMIPSNORconst)
   810  		v.AuxInt = int32ToAuxInt(0)
   811  		v.AddArg(x)
   812  		return true
   813  	}
   814  }
   815  func rewriteValueMIPS_OpCom32(v *Value) bool {
   816  	v_0 := v.Args[0]
   817  	// match: (Com32 x)
   818  	// result: (NORconst [0] x)
   819  	for {
   820  		x := v_0
   821  		v.reset(OpMIPSNORconst)
   822  		v.AuxInt = int32ToAuxInt(0)
   823  		v.AddArg(x)
   824  		return true
   825  	}
   826  }
   827  func rewriteValueMIPS_OpCom8(v *Value) bool {
   828  	v_0 := v.Args[0]
   829  	// match: (Com8 x)
   830  	// result: (NORconst [0] x)
   831  	for {
   832  		x := v_0
   833  		v.reset(OpMIPSNORconst)
   834  		v.AuxInt = int32ToAuxInt(0)
   835  		v.AddArg(x)
   836  		return true
   837  	}
   838  }
   839  func rewriteValueMIPS_OpConst16(v *Value) bool {
   840  	// match: (Const16 [val])
   841  	// result: (MOVWconst [int32(val)])
   842  	for {
   843  		val := auxIntToInt16(v.AuxInt)
   844  		v.reset(OpMIPSMOVWconst)
   845  		v.AuxInt = int32ToAuxInt(int32(val))
   846  		return true
   847  	}
   848  }
   849  func rewriteValueMIPS_OpConst32(v *Value) bool {
   850  	// match: (Const32 [val])
   851  	// result: (MOVWconst [int32(val)])
   852  	for {
   853  		val := auxIntToInt32(v.AuxInt)
   854  		v.reset(OpMIPSMOVWconst)
   855  		v.AuxInt = int32ToAuxInt(int32(val))
   856  		return true
   857  	}
   858  }
   859  func rewriteValueMIPS_OpConst8(v *Value) bool {
   860  	// match: (Const8 [val])
   861  	// result: (MOVWconst [int32(val)])
   862  	for {
   863  		val := auxIntToInt8(v.AuxInt)
   864  		v.reset(OpMIPSMOVWconst)
   865  		v.AuxInt = int32ToAuxInt(int32(val))
   866  		return true
   867  	}
   868  }
   869  func rewriteValueMIPS_OpConstBool(v *Value) bool {
   870  	// match: (ConstBool [b])
   871  	// result: (MOVWconst [b2i32(b)])
   872  	for {
   873  		b := auxIntToBool(v.AuxInt)
   874  		v.reset(OpMIPSMOVWconst)
   875  		v.AuxInt = int32ToAuxInt(b2i32(b))
   876  		return true
   877  	}
   878  }
   879  func rewriteValueMIPS_OpConstNil(v *Value) bool {
   880  	// match: (ConstNil)
   881  	// result: (MOVWconst [0])
   882  	for {
   883  		v.reset(OpMIPSMOVWconst)
   884  		v.AuxInt = int32ToAuxInt(0)
   885  		return true
   886  	}
   887  }
   888  func rewriteValueMIPS_OpCtz32(v *Value) bool {
   889  	v_0 := v.Args[0]
   890  	b := v.Block
   891  	typ := &b.Func.Config.Types
   892  	// match: (Ctz32 <t> x)
   893  	// result: (SUB (MOVWconst [32]) (CLZ <t> (SUBconst <t> [1] (AND <t> x (NEG <t> x)))))
   894  	for {
   895  		t := v.Type
   896  		x := v_0
   897  		v.reset(OpMIPSSUB)
   898  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   899  		v0.AuxInt = int32ToAuxInt(32)
   900  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   901  		v2 := b.NewValue0(v.Pos, OpMIPSSUBconst, t)
   902  		v2.AuxInt = int32ToAuxInt(1)
   903  		v3 := b.NewValue0(v.Pos, OpMIPSAND, t)
   904  		v4 := b.NewValue0(v.Pos, OpMIPSNEG, t)
   905  		v4.AddArg(x)
   906  		v3.AddArg2(x, v4)
   907  		v2.AddArg(v3)
   908  		v1.AddArg(v2)
   909  		v.AddArg2(v0, v1)
   910  		return true
   911  	}
   912  }
   913  func rewriteValueMIPS_OpDiv16(v *Value) bool {
   914  	v_1 := v.Args[1]
   915  	v_0 := v.Args[0]
   916  	b := v.Block
   917  	typ := &b.Func.Config.Types
   918  	// match: (Div16 x y)
   919  	// result: (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
   920  	for {
   921  		x := v_0
   922  		y := v_1
   923  		v.reset(OpSelect1)
   924  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
   925  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
   926  		v1.AddArg(x)
   927  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
   928  		v2.AddArg(y)
   929  		v0.AddArg2(v1, v2)
   930  		v.AddArg(v0)
   931  		return true
   932  	}
   933  }
   934  func rewriteValueMIPS_OpDiv16u(v *Value) bool {
   935  	v_1 := v.Args[1]
   936  	v_0 := v.Args[0]
   937  	b := v.Block
   938  	typ := &b.Func.Config.Types
   939  	// match: (Div16u x y)
   940  	// result: (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
   941  	for {
   942  		x := v_0
   943  		y := v_1
   944  		v.reset(OpSelect1)
   945  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
   946  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
   947  		v1.AddArg(x)
   948  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
   949  		v2.AddArg(y)
   950  		v0.AddArg2(v1, v2)
   951  		v.AddArg(v0)
   952  		return true
   953  	}
   954  }
   955  func rewriteValueMIPS_OpDiv32(v *Value) bool {
   956  	v_1 := v.Args[1]
   957  	v_0 := v.Args[0]
   958  	b := v.Block
   959  	typ := &b.Func.Config.Types
   960  	// match: (Div32 x y)
   961  	// result: (Select1 (DIV x y))
   962  	for {
   963  		x := v_0
   964  		y := v_1
   965  		v.reset(OpSelect1)
   966  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
   967  		v0.AddArg2(x, y)
   968  		v.AddArg(v0)
   969  		return true
   970  	}
   971  }
   972  func rewriteValueMIPS_OpDiv32u(v *Value) bool {
   973  	v_1 := v.Args[1]
   974  	v_0 := v.Args[0]
   975  	b := v.Block
   976  	typ := &b.Func.Config.Types
   977  	// match: (Div32u x y)
   978  	// result: (Select1 (DIVU x y))
   979  	for {
   980  		x := v_0
   981  		y := v_1
   982  		v.reset(OpSelect1)
   983  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
   984  		v0.AddArg2(x, y)
   985  		v.AddArg(v0)
   986  		return true
   987  	}
   988  }
   989  func rewriteValueMIPS_OpDiv8(v *Value) bool {
   990  	v_1 := v.Args[1]
   991  	v_0 := v.Args[0]
   992  	b := v.Block
   993  	typ := &b.Func.Config.Types
   994  	// match: (Div8 x y)
   995  	// result: (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
   996  	for {
   997  		x := v_0
   998  		y := v_1
   999  		v.reset(OpSelect1)
  1000  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1001  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1002  		v1.AddArg(x)
  1003  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1004  		v2.AddArg(y)
  1005  		v0.AddArg2(v1, v2)
  1006  		v.AddArg(v0)
  1007  		return true
  1008  	}
  1009  }
  1010  func rewriteValueMIPS_OpDiv8u(v *Value) bool {
  1011  	v_1 := v.Args[1]
  1012  	v_0 := v.Args[0]
  1013  	b := v.Block
  1014  	typ := &b.Func.Config.Types
  1015  	// match: (Div8u x y)
  1016  	// result: (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1017  	for {
  1018  		x := v_0
  1019  		y := v_1
  1020  		v.reset(OpSelect1)
  1021  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1022  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1023  		v1.AddArg(x)
  1024  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1025  		v2.AddArg(y)
  1026  		v0.AddArg2(v1, v2)
  1027  		v.AddArg(v0)
  1028  		return true
  1029  	}
  1030  }
  1031  func rewriteValueMIPS_OpEq16(v *Value) bool {
  1032  	v_1 := v.Args[1]
  1033  	v_0 := v.Args[0]
  1034  	b := v.Block
  1035  	typ := &b.Func.Config.Types
  1036  	// match: (Eq16 x y)
  1037  	// result: (SGTUconst [1] (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1038  	for {
  1039  		x := v_0
  1040  		y := v_1
  1041  		v.reset(OpMIPSSGTUconst)
  1042  		v.AuxInt = int32ToAuxInt(1)
  1043  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1044  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1045  		v1.AddArg(x)
  1046  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1047  		v2.AddArg(y)
  1048  		v0.AddArg2(v1, v2)
  1049  		v.AddArg(v0)
  1050  		return true
  1051  	}
  1052  }
  1053  func rewriteValueMIPS_OpEq32(v *Value) bool {
  1054  	v_1 := v.Args[1]
  1055  	v_0 := v.Args[0]
  1056  	b := v.Block
  1057  	typ := &b.Func.Config.Types
  1058  	// match: (Eq32 x y)
  1059  	// result: (SGTUconst [1] (XOR x y))
  1060  	for {
  1061  		x := v_0
  1062  		y := v_1
  1063  		v.reset(OpMIPSSGTUconst)
  1064  		v.AuxInt = int32ToAuxInt(1)
  1065  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1066  		v0.AddArg2(x, y)
  1067  		v.AddArg(v0)
  1068  		return true
  1069  	}
  1070  }
  1071  func rewriteValueMIPS_OpEq32F(v *Value) bool {
  1072  	v_1 := v.Args[1]
  1073  	v_0 := v.Args[0]
  1074  	b := v.Block
  1075  	// match: (Eq32F x y)
  1076  	// result: (FPFlagTrue (CMPEQF x y))
  1077  	for {
  1078  		x := v_0
  1079  		y := v_1
  1080  		v.reset(OpMIPSFPFlagTrue)
  1081  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  1082  		v0.AddArg2(x, y)
  1083  		v.AddArg(v0)
  1084  		return true
  1085  	}
  1086  }
  1087  func rewriteValueMIPS_OpEq64F(v *Value) bool {
  1088  	v_1 := v.Args[1]
  1089  	v_0 := v.Args[0]
  1090  	b := v.Block
  1091  	// match: (Eq64F x y)
  1092  	// result: (FPFlagTrue (CMPEQD x y))
  1093  	for {
  1094  		x := v_0
  1095  		y := v_1
  1096  		v.reset(OpMIPSFPFlagTrue)
  1097  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  1098  		v0.AddArg2(x, y)
  1099  		v.AddArg(v0)
  1100  		return true
  1101  	}
  1102  }
  1103  func rewriteValueMIPS_OpEq8(v *Value) bool {
  1104  	v_1 := v.Args[1]
  1105  	v_0 := v.Args[0]
  1106  	b := v.Block
  1107  	typ := &b.Func.Config.Types
  1108  	// match: (Eq8 x y)
  1109  	// result: (SGTUconst [1] (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1110  	for {
  1111  		x := v_0
  1112  		y := v_1
  1113  		v.reset(OpMIPSSGTUconst)
  1114  		v.AuxInt = int32ToAuxInt(1)
  1115  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1116  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1117  		v1.AddArg(x)
  1118  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1119  		v2.AddArg(y)
  1120  		v0.AddArg2(v1, v2)
  1121  		v.AddArg(v0)
  1122  		return true
  1123  	}
  1124  }
  1125  func rewriteValueMIPS_OpEqB(v *Value) bool {
  1126  	v_1 := v.Args[1]
  1127  	v_0 := v.Args[0]
  1128  	b := v.Block
  1129  	typ := &b.Func.Config.Types
  1130  	// match: (EqB x y)
  1131  	// result: (XORconst [1] (XOR <typ.Bool> x y))
  1132  	for {
  1133  		x := v_0
  1134  		y := v_1
  1135  		v.reset(OpMIPSXORconst)
  1136  		v.AuxInt = int32ToAuxInt(1)
  1137  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.Bool)
  1138  		v0.AddArg2(x, y)
  1139  		v.AddArg(v0)
  1140  		return true
  1141  	}
  1142  }
  1143  func rewriteValueMIPS_OpEqPtr(v *Value) bool {
  1144  	v_1 := v.Args[1]
  1145  	v_0 := v.Args[0]
  1146  	b := v.Block
  1147  	typ := &b.Func.Config.Types
  1148  	// match: (EqPtr x y)
  1149  	// result: (SGTUconst [1] (XOR x y))
  1150  	for {
  1151  		x := v_0
  1152  		y := v_1
  1153  		v.reset(OpMIPSSGTUconst)
  1154  		v.AuxInt = int32ToAuxInt(1)
  1155  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1156  		v0.AddArg2(x, y)
  1157  		v.AddArg(v0)
  1158  		return true
  1159  	}
  1160  }
  1161  func rewriteValueMIPS_OpHmul32(v *Value) bool {
  1162  	v_1 := v.Args[1]
  1163  	v_0 := v.Args[0]
  1164  	b := v.Block
  1165  	typ := &b.Func.Config.Types
  1166  	// match: (Hmul32 x y)
  1167  	// result: (Select0 (MULT x y))
  1168  	for {
  1169  		x := v_0
  1170  		y := v_1
  1171  		v.reset(OpSelect0)
  1172  		v0 := b.NewValue0(v.Pos, OpMIPSMULT, types.NewTuple(typ.Int32, typ.Int32))
  1173  		v0.AddArg2(x, y)
  1174  		v.AddArg(v0)
  1175  		return true
  1176  	}
  1177  }
  1178  func rewriteValueMIPS_OpHmul32u(v *Value) bool {
  1179  	v_1 := v.Args[1]
  1180  	v_0 := v.Args[0]
  1181  	b := v.Block
  1182  	typ := &b.Func.Config.Types
  1183  	// match: (Hmul32u x y)
  1184  	// result: (Select0 (MULTU x y))
  1185  	for {
  1186  		x := v_0
  1187  		y := v_1
  1188  		v.reset(OpSelect0)
  1189  		v0 := b.NewValue0(v.Pos, OpMIPSMULTU, types.NewTuple(typ.UInt32, typ.UInt32))
  1190  		v0.AddArg2(x, y)
  1191  		v.AddArg(v0)
  1192  		return true
  1193  	}
  1194  }
  1195  func rewriteValueMIPS_OpIsInBounds(v *Value) bool {
  1196  	v_1 := v.Args[1]
  1197  	v_0 := v.Args[0]
  1198  	// match: (IsInBounds idx len)
  1199  	// result: (SGTU len idx)
  1200  	for {
  1201  		idx := v_0
  1202  		len := v_1
  1203  		v.reset(OpMIPSSGTU)
  1204  		v.AddArg2(len, idx)
  1205  		return true
  1206  	}
  1207  }
  1208  func rewriteValueMIPS_OpIsNonNil(v *Value) bool {
  1209  	v_0 := v.Args[0]
  1210  	b := v.Block
  1211  	typ := &b.Func.Config.Types
  1212  	// match: (IsNonNil ptr)
  1213  	// result: (SGTU ptr (MOVWconst [0]))
  1214  	for {
  1215  		ptr := v_0
  1216  		v.reset(OpMIPSSGTU)
  1217  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1218  		v0.AuxInt = int32ToAuxInt(0)
  1219  		v.AddArg2(ptr, v0)
  1220  		return true
  1221  	}
  1222  }
  1223  func rewriteValueMIPS_OpIsSliceInBounds(v *Value) bool {
  1224  	v_1 := v.Args[1]
  1225  	v_0 := v.Args[0]
  1226  	b := v.Block
  1227  	typ := &b.Func.Config.Types
  1228  	// match: (IsSliceInBounds idx len)
  1229  	// result: (XORconst [1] (SGTU idx len))
  1230  	for {
  1231  		idx := v_0
  1232  		len := v_1
  1233  		v.reset(OpMIPSXORconst)
  1234  		v.AuxInt = int32ToAuxInt(1)
  1235  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1236  		v0.AddArg2(idx, len)
  1237  		v.AddArg(v0)
  1238  		return true
  1239  	}
  1240  }
  1241  func rewriteValueMIPS_OpLeq16(v *Value) bool {
  1242  	v_1 := v.Args[1]
  1243  	v_0 := v.Args[0]
  1244  	b := v.Block
  1245  	typ := &b.Func.Config.Types
  1246  	// match: (Leq16 x y)
  1247  	// result: (XORconst [1] (SGT (SignExt16to32 x) (SignExt16to32 y)))
  1248  	for {
  1249  		x := v_0
  1250  		y := v_1
  1251  		v.reset(OpMIPSXORconst)
  1252  		v.AuxInt = int32ToAuxInt(1)
  1253  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1254  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1255  		v1.AddArg(x)
  1256  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1257  		v2.AddArg(y)
  1258  		v0.AddArg2(v1, v2)
  1259  		v.AddArg(v0)
  1260  		return true
  1261  	}
  1262  }
  1263  func rewriteValueMIPS_OpLeq16U(v *Value) bool {
  1264  	v_1 := v.Args[1]
  1265  	v_0 := v.Args[0]
  1266  	b := v.Block
  1267  	typ := &b.Func.Config.Types
  1268  	// match: (Leq16U x y)
  1269  	// result: (XORconst [1] (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1270  	for {
  1271  		x := v_0
  1272  		y := v_1
  1273  		v.reset(OpMIPSXORconst)
  1274  		v.AuxInt = int32ToAuxInt(1)
  1275  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1276  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1277  		v1.AddArg(x)
  1278  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1279  		v2.AddArg(y)
  1280  		v0.AddArg2(v1, v2)
  1281  		v.AddArg(v0)
  1282  		return true
  1283  	}
  1284  }
  1285  func rewriteValueMIPS_OpLeq32(v *Value) bool {
  1286  	v_1 := v.Args[1]
  1287  	v_0 := v.Args[0]
  1288  	b := v.Block
  1289  	typ := &b.Func.Config.Types
  1290  	// match: (Leq32 x y)
  1291  	// result: (XORconst [1] (SGT x y))
  1292  	for {
  1293  		x := v_0
  1294  		y := v_1
  1295  		v.reset(OpMIPSXORconst)
  1296  		v.AuxInt = int32ToAuxInt(1)
  1297  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1298  		v0.AddArg2(x, y)
  1299  		v.AddArg(v0)
  1300  		return true
  1301  	}
  1302  }
  1303  func rewriteValueMIPS_OpLeq32F(v *Value) bool {
  1304  	v_1 := v.Args[1]
  1305  	v_0 := v.Args[0]
  1306  	b := v.Block
  1307  	// match: (Leq32F x y)
  1308  	// result: (FPFlagTrue (CMPGEF y x))
  1309  	for {
  1310  		x := v_0
  1311  		y := v_1
  1312  		v.reset(OpMIPSFPFlagTrue)
  1313  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGEF, types.TypeFlags)
  1314  		v0.AddArg2(y, x)
  1315  		v.AddArg(v0)
  1316  		return true
  1317  	}
  1318  }
  1319  func rewriteValueMIPS_OpLeq32U(v *Value) bool {
  1320  	v_1 := v.Args[1]
  1321  	v_0 := v.Args[0]
  1322  	b := v.Block
  1323  	typ := &b.Func.Config.Types
  1324  	// match: (Leq32U x y)
  1325  	// result: (XORconst [1] (SGTU x y))
  1326  	for {
  1327  		x := v_0
  1328  		y := v_1
  1329  		v.reset(OpMIPSXORconst)
  1330  		v.AuxInt = int32ToAuxInt(1)
  1331  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1332  		v0.AddArg2(x, y)
  1333  		v.AddArg(v0)
  1334  		return true
  1335  	}
  1336  }
  1337  func rewriteValueMIPS_OpLeq64F(v *Value) bool {
  1338  	v_1 := v.Args[1]
  1339  	v_0 := v.Args[0]
  1340  	b := v.Block
  1341  	// match: (Leq64F x y)
  1342  	// result: (FPFlagTrue (CMPGED y x))
  1343  	for {
  1344  		x := v_0
  1345  		y := v_1
  1346  		v.reset(OpMIPSFPFlagTrue)
  1347  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGED, types.TypeFlags)
  1348  		v0.AddArg2(y, x)
  1349  		v.AddArg(v0)
  1350  		return true
  1351  	}
  1352  }
  1353  func rewriteValueMIPS_OpLeq8(v *Value) bool {
  1354  	v_1 := v.Args[1]
  1355  	v_0 := v.Args[0]
  1356  	b := v.Block
  1357  	typ := &b.Func.Config.Types
  1358  	// match: (Leq8 x y)
  1359  	// result: (XORconst [1] (SGT (SignExt8to32 x) (SignExt8to32 y)))
  1360  	for {
  1361  		x := v_0
  1362  		y := v_1
  1363  		v.reset(OpMIPSXORconst)
  1364  		v.AuxInt = int32ToAuxInt(1)
  1365  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1366  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1367  		v1.AddArg(x)
  1368  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1369  		v2.AddArg(y)
  1370  		v0.AddArg2(v1, v2)
  1371  		v.AddArg(v0)
  1372  		return true
  1373  	}
  1374  }
  1375  func rewriteValueMIPS_OpLeq8U(v *Value) bool {
  1376  	v_1 := v.Args[1]
  1377  	v_0 := v.Args[0]
  1378  	b := v.Block
  1379  	typ := &b.Func.Config.Types
  1380  	// match: (Leq8U x y)
  1381  	// result: (XORconst [1] (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1382  	for {
  1383  		x := v_0
  1384  		y := v_1
  1385  		v.reset(OpMIPSXORconst)
  1386  		v.AuxInt = int32ToAuxInt(1)
  1387  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1388  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1389  		v1.AddArg(x)
  1390  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1391  		v2.AddArg(y)
  1392  		v0.AddArg2(v1, v2)
  1393  		v.AddArg(v0)
  1394  		return true
  1395  	}
  1396  }
  1397  func rewriteValueMIPS_OpLess16(v *Value) bool {
  1398  	v_1 := v.Args[1]
  1399  	v_0 := v.Args[0]
  1400  	b := v.Block
  1401  	typ := &b.Func.Config.Types
  1402  	// match: (Less16 x y)
  1403  	// result: (SGT (SignExt16to32 y) (SignExt16to32 x))
  1404  	for {
  1405  		x := v_0
  1406  		y := v_1
  1407  		v.reset(OpMIPSSGT)
  1408  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1409  		v0.AddArg(y)
  1410  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1411  		v1.AddArg(x)
  1412  		v.AddArg2(v0, v1)
  1413  		return true
  1414  	}
  1415  }
  1416  func rewriteValueMIPS_OpLess16U(v *Value) bool {
  1417  	v_1 := v.Args[1]
  1418  	v_0 := v.Args[0]
  1419  	b := v.Block
  1420  	typ := &b.Func.Config.Types
  1421  	// match: (Less16U x y)
  1422  	// result: (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x))
  1423  	for {
  1424  		x := v_0
  1425  		y := v_1
  1426  		v.reset(OpMIPSSGTU)
  1427  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1428  		v0.AddArg(y)
  1429  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1430  		v1.AddArg(x)
  1431  		v.AddArg2(v0, v1)
  1432  		return true
  1433  	}
  1434  }
  1435  func rewriteValueMIPS_OpLess32(v *Value) bool {
  1436  	v_1 := v.Args[1]
  1437  	v_0 := v.Args[0]
  1438  	// match: (Less32 x y)
  1439  	// result: (SGT y x)
  1440  	for {
  1441  		x := v_0
  1442  		y := v_1
  1443  		v.reset(OpMIPSSGT)
  1444  		v.AddArg2(y, x)
  1445  		return true
  1446  	}
  1447  }
  1448  func rewriteValueMIPS_OpLess32F(v *Value) bool {
  1449  	v_1 := v.Args[1]
  1450  	v_0 := v.Args[0]
  1451  	b := v.Block
  1452  	// match: (Less32F x y)
  1453  	// result: (FPFlagTrue (CMPGTF y x))
  1454  	for {
  1455  		x := v_0
  1456  		y := v_1
  1457  		v.reset(OpMIPSFPFlagTrue)
  1458  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTF, types.TypeFlags)
  1459  		v0.AddArg2(y, x)
  1460  		v.AddArg(v0)
  1461  		return true
  1462  	}
  1463  }
  1464  func rewriteValueMIPS_OpLess32U(v *Value) bool {
  1465  	v_1 := v.Args[1]
  1466  	v_0 := v.Args[0]
  1467  	// match: (Less32U x y)
  1468  	// result: (SGTU y x)
  1469  	for {
  1470  		x := v_0
  1471  		y := v_1
  1472  		v.reset(OpMIPSSGTU)
  1473  		v.AddArg2(y, x)
  1474  		return true
  1475  	}
  1476  }
  1477  func rewriteValueMIPS_OpLess64F(v *Value) bool {
  1478  	v_1 := v.Args[1]
  1479  	v_0 := v.Args[0]
  1480  	b := v.Block
  1481  	// match: (Less64F x y)
  1482  	// result: (FPFlagTrue (CMPGTD y x))
  1483  	for {
  1484  		x := v_0
  1485  		y := v_1
  1486  		v.reset(OpMIPSFPFlagTrue)
  1487  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTD, types.TypeFlags)
  1488  		v0.AddArg2(y, x)
  1489  		v.AddArg(v0)
  1490  		return true
  1491  	}
  1492  }
  1493  func rewriteValueMIPS_OpLess8(v *Value) bool {
  1494  	v_1 := v.Args[1]
  1495  	v_0 := v.Args[0]
  1496  	b := v.Block
  1497  	typ := &b.Func.Config.Types
  1498  	// match: (Less8 x y)
  1499  	// result: (SGT (SignExt8to32 y) (SignExt8to32 x))
  1500  	for {
  1501  		x := v_0
  1502  		y := v_1
  1503  		v.reset(OpMIPSSGT)
  1504  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1505  		v0.AddArg(y)
  1506  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1507  		v1.AddArg(x)
  1508  		v.AddArg2(v0, v1)
  1509  		return true
  1510  	}
  1511  }
  1512  func rewriteValueMIPS_OpLess8U(v *Value) bool {
  1513  	v_1 := v.Args[1]
  1514  	v_0 := v.Args[0]
  1515  	b := v.Block
  1516  	typ := &b.Func.Config.Types
  1517  	// match: (Less8U x y)
  1518  	// result: (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x))
  1519  	for {
  1520  		x := v_0
  1521  		y := v_1
  1522  		v.reset(OpMIPSSGTU)
  1523  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1524  		v0.AddArg(y)
  1525  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1526  		v1.AddArg(x)
  1527  		v.AddArg2(v0, v1)
  1528  		return true
  1529  	}
  1530  }
  1531  func rewriteValueMIPS_OpLoad(v *Value) bool {
  1532  	v_1 := v.Args[1]
  1533  	v_0 := v.Args[0]
  1534  	// match: (Load <t> ptr mem)
  1535  	// cond: t.IsBoolean()
  1536  	// result: (MOVBUload ptr mem)
  1537  	for {
  1538  		t := v.Type
  1539  		ptr := v_0
  1540  		mem := v_1
  1541  		if !(t.IsBoolean()) {
  1542  			break
  1543  		}
  1544  		v.reset(OpMIPSMOVBUload)
  1545  		v.AddArg2(ptr, mem)
  1546  		return true
  1547  	}
  1548  	// match: (Load <t> ptr mem)
  1549  	// cond: (is8BitInt(t) && isSigned(t))
  1550  	// result: (MOVBload ptr mem)
  1551  	for {
  1552  		t := v.Type
  1553  		ptr := v_0
  1554  		mem := v_1
  1555  		if !(is8BitInt(t) && isSigned(t)) {
  1556  			break
  1557  		}
  1558  		v.reset(OpMIPSMOVBload)
  1559  		v.AddArg2(ptr, mem)
  1560  		return true
  1561  	}
  1562  	// match: (Load <t> ptr mem)
  1563  	// cond: (is8BitInt(t) && !isSigned(t))
  1564  	// result: (MOVBUload ptr mem)
  1565  	for {
  1566  		t := v.Type
  1567  		ptr := v_0
  1568  		mem := v_1
  1569  		if !(is8BitInt(t) && !isSigned(t)) {
  1570  			break
  1571  		}
  1572  		v.reset(OpMIPSMOVBUload)
  1573  		v.AddArg2(ptr, mem)
  1574  		return true
  1575  	}
  1576  	// match: (Load <t> ptr mem)
  1577  	// cond: (is16BitInt(t) && isSigned(t))
  1578  	// result: (MOVHload ptr mem)
  1579  	for {
  1580  		t := v.Type
  1581  		ptr := v_0
  1582  		mem := v_1
  1583  		if !(is16BitInt(t) && isSigned(t)) {
  1584  			break
  1585  		}
  1586  		v.reset(OpMIPSMOVHload)
  1587  		v.AddArg2(ptr, mem)
  1588  		return true
  1589  	}
  1590  	// match: (Load <t> ptr mem)
  1591  	// cond: (is16BitInt(t) && !isSigned(t))
  1592  	// result: (MOVHUload ptr mem)
  1593  	for {
  1594  		t := v.Type
  1595  		ptr := v_0
  1596  		mem := v_1
  1597  		if !(is16BitInt(t) && !isSigned(t)) {
  1598  			break
  1599  		}
  1600  		v.reset(OpMIPSMOVHUload)
  1601  		v.AddArg2(ptr, mem)
  1602  		return true
  1603  	}
  1604  	// match: (Load <t> ptr mem)
  1605  	// cond: (is32BitInt(t) || isPtr(t))
  1606  	// result: (MOVWload ptr mem)
  1607  	for {
  1608  		t := v.Type
  1609  		ptr := v_0
  1610  		mem := v_1
  1611  		if !(is32BitInt(t) || isPtr(t)) {
  1612  			break
  1613  		}
  1614  		v.reset(OpMIPSMOVWload)
  1615  		v.AddArg2(ptr, mem)
  1616  		return true
  1617  	}
  1618  	// match: (Load <t> ptr mem)
  1619  	// cond: is32BitFloat(t)
  1620  	// result: (MOVFload ptr mem)
  1621  	for {
  1622  		t := v.Type
  1623  		ptr := v_0
  1624  		mem := v_1
  1625  		if !(is32BitFloat(t)) {
  1626  			break
  1627  		}
  1628  		v.reset(OpMIPSMOVFload)
  1629  		v.AddArg2(ptr, mem)
  1630  		return true
  1631  	}
  1632  	// match: (Load <t> ptr mem)
  1633  	// cond: is64BitFloat(t)
  1634  	// result: (MOVDload ptr mem)
  1635  	for {
  1636  		t := v.Type
  1637  		ptr := v_0
  1638  		mem := v_1
  1639  		if !(is64BitFloat(t)) {
  1640  			break
  1641  		}
  1642  		v.reset(OpMIPSMOVDload)
  1643  		v.AddArg2(ptr, mem)
  1644  		return true
  1645  	}
  1646  	return false
  1647  }
  1648  func rewriteValueMIPS_OpLocalAddr(v *Value) bool {
  1649  	v_0 := v.Args[0]
  1650  	// match: (LocalAddr {sym} base _)
  1651  	// result: (MOVWaddr {sym} base)
  1652  	for {
  1653  		sym := auxToSym(v.Aux)
  1654  		base := v_0
  1655  		v.reset(OpMIPSMOVWaddr)
  1656  		v.Aux = symToAux(sym)
  1657  		v.AddArg(base)
  1658  		return true
  1659  	}
  1660  }
  1661  func rewriteValueMIPS_OpLsh16x16(v *Value) bool {
  1662  	v_1 := v.Args[1]
  1663  	v_0 := v.Args[0]
  1664  	b := v.Block
  1665  	typ := &b.Func.Config.Types
  1666  	// match: (Lsh16x16 <t> x y)
  1667  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1668  	for {
  1669  		t := v.Type
  1670  		x := v_0
  1671  		y := v_1
  1672  		v.reset(OpMIPSCMOVZ)
  1673  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1674  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1675  		v1.AddArg(y)
  1676  		v0.AddArg2(x, v1)
  1677  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1678  		v2.AuxInt = int32ToAuxInt(0)
  1679  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1680  		v3.AuxInt = int32ToAuxInt(32)
  1681  		v3.AddArg(v1)
  1682  		v.AddArg3(v0, v2, v3)
  1683  		return true
  1684  	}
  1685  }
  1686  func rewriteValueMIPS_OpLsh16x32(v *Value) bool {
  1687  	v_1 := v.Args[1]
  1688  	v_0 := v.Args[0]
  1689  	b := v.Block
  1690  	typ := &b.Func.Config.Types
  1691  	// match: (Lsh16x32 <t> x y)
  1692  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1693  	for {
  1694  		t := v.Type
  1695  		x := v_0
  1696  		y := v_1
  1697  		v.reset(OpMIPSCMOVZ)
  1698  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1699  		v0.AddArg2(x, y)
  1700  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1701  		v1.AuxInt = int32ToAuxInt(0)
  1702  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1703  		v2.AuxInt = int32ToAuxInt(32)
  1704  		v2.AddArg(y)
  1705  		v.AddArg3(v0, v1, v2)
  1706  		return true
  1707  	}
  1708  }
  1709  func rewriteValueMIPS_OpLsh16x64(v *Value) bool {
  1710  	v_1 := v.Args[1]
  1711  	v_0 := v.Args[0]
  1712  	// match: (Lsh16x64 x (Const64 [c]))
  1713  	// cond: uint32(c) < 16
  1714  	// result: (SLLconst x [int32(c)])
  1715  	for {
  1716  		x := v_0
  1717  		if v_1.Op != OpConst64 {
  1718  			break
  1719  		}
  1720  		c := auxIntToInt64(v_1.AuxInt)
  1721  		if !(uint32(c) < 16) {
  1722  			break
  1723  		}
  1724  		v.reset(OpMIPSSLLconst)
  1725  		v.AuxInt = int32ToAuxInt(int32(c))
  1726  		v.AddArg(x)
  1727  		return true
  1728  	}
  1729  	// match: (Lsh16x64 _ (Const64 [c]))
  1730  	// cond: uint32(c) >= 16
  1731  	// result: (MOVWconst [0])
  1732  	for {
  1733  		if v_1.Op != OpConst64 {
  1734  			break
  1735  		}
  1736  		c := auxIntToInt64(v_1.AuxInt)
  1737  		if !(uint32(c) >= 16) {
  1738  			break
  1739  		}
  1740  		v.reset(OpMIPSMOVWconst)
  1741  		v.AuxInt = int32ToAuxInt(0)
  1742  		return true
  1743  	}
  1744  	return false
  1745  }
  1746  func rewriteValueMIPS_OpLsh16x8(v *Value) bool {
  1747  	v_1 := v.Args[1]
  1748  	v_0 := v.Args[0]
  1749  	b := v.Block
  1750  	typ := &b.Func.Config.Types
  1751  	// match: (Lsh16x8 <t> x y)
  1752  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1753  	for {
  1754  		t := v.Type
  1755  		x := v_0
  1756  		y := v_1
  1757  		v.reset(OpMIPSCMOVZ)
  1758  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1759  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1760  		v1.AddArg(y)
  1761  		v0.AddArg2(x, v1)
  1762  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1763  		v2.AuxInt = int32ToAuxInt(0)
  1764  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1765  		v3.AuxInt = int32ToAuxInt(32)
  1766  		v3.AddArg(v1)
  1767  		v.AddArg3(v0, v2, v3)
  1768  		return true
  1769  	}
  1770  }
  1771  func rewriteValueMIPS_OpLsh32x16(v *Value) bool {
  1772  	v_1 := v.Args[1]
  1773  	v_0 := v.Args[0]
  1774  	b := v.Block
  1775  	typ := &b.Func.Config.Types
  1776  	// match: (Lsh32x16 <t> x y)
  1777  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1778  	for {
  1779  		t := v.Type
  1780  		x := v_0
  1781  		y := v_1
  1782  		v.reset(OpMIPSCMOVZ)
  1783  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1784  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1785  		v1.AddArg(y)
  1786  		v0.AddArg2(x, v1)
  1787  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1788  		v2.AuxInt = int32ToAuxInt(0)
  1789  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1790  		v3.AuxInt = int32ToAuxInt(32)
  1791  		v3.AddArg(v1)
  1792  		v.AddArg3(v0, v2, v3)
  1793  		return true
  1794  	}
  1795  }
  1796  func rewriteValueMIPS_OpLsh32x32(v *Value) bool {
  1797  	v_1 := v.Args[1]
  1798  	v_0 := v.Args[0]
  1799  	b := v.Block
  1800  	typ := &b.Func.Config.Types
  1801  	// match: (Lsh32x32 <t> x y)
  1802  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1803  	for {
  1804  		t := v.Type
  1805  		x := v_0
  1806  		y := v_1
  1807  		v.reset(OpMIPSCMOVZ)
  1808  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1809  		v0.AddArg2(x, y)
  1810  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1811  		v1.AuxInt = int32ToAuxInt(0)
  1812  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1813  		v2.AuxInt = int32ToAuxInt(32)
  1814  		v2.AddArg(y)
  1815  		v.AddArg3(v0, v1, v2)
  1816  		return true
  1817  	}
  1818  }
  1819  func rewriteValueMIPS_OpLsh32x64(v *Value) bool {
  1820  	v_1 := v.Args[1]
  1821  	v_0 := v.Args[0]
  1822  	// match: (Lsh32x64 x (Const64 [c]))
  1823  	// cond: uint32(c) < 32
  1824  	// result: (SLLconst x [int32(c)])
  1825  	for {
  1826  		x := v_0
  1827  		if v_1.Op != OpConst64 {
  1828  			break
  1829  		}
  1830  		c := auxIntToInt64(v_1.AuxInt)
  1831  		if !(uint32(c) < 32) {
  1832  			break
  1833  		}
  1834  		v.reset(OpMIPSSLLconst)
  1835  		v.AuxInt = int32ToAuxInt(int32(c))
  1836  		v.AddArg(x)
  1837  		return true
  1838  	}
  1839  	// match: (Lsh32x64 _ (Const64 [c]))
  1840  	// cond: uint32(c) >= 32
  1841  	// result: (MOVWconst [0])
  1842  	for {
  1843  		if v_1.Op != OpConst64 {
  1844  			break
  1845  		}
  1846  		c := auxIntToInt64(v_1.AuxInt)
  1847  		if !(uint32(c) >= 32) {
  1848  			break
  1849  		}
  1850  		v.reset(OpMIPSMOVWconst)
  1851  		v.AuxInt = int32ToAuxInt(0)
  1852  		return true
  1853  	}
  1854  	return false
  1855  }
  1856  func rewriteValueMIPS_OpLsh32x8(v *Value) bool {
  1857  	v_1 := v.Args[1]
  1858  	v_0 := v.Args[0]
  1859  	b := v.Block
  1860  	typ := &b.Func.Config.Types
  1861  	// match: (Lsh32x8 <t> x y)
  1862  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1863  	for {
  1864  		t := v.Type
  1865  		x := v_0
  1866  		y := v_1
  1867  		v.reset(OpMIPSCMOVZ)
  1868  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1869  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1870  		v1.AddArg(y)
  1871  		v0.AddArg2(x, v1)
  1872  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1873  		v2.AuxInt = int32ToAuxInt(0)
  1874  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1875  		v3.AuxInt = int32ToAuxInt(32)
  1876  		v3.AddArg(v1)
  1877  		v.AddArg3(v0, v2, v3)
  1878  		return true
  1879  	}
  1880  }
  1881  func rewriteValueMIPS_OpLsh8x16(v *Value) bool {
  1882  	v_1 := v.Args[1]
  1883  	v_0 := v.Args[0]
  1884  	b := v.Block
  1885  	typ := &b.Func.Config.Types
  1886  	// match: (Lsh8x16 <t> x y)
  1887  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1888  	for {
  1889  		t := v.Type
  1890  		x := v_0
  1891  		y := v_1
  1892  		v.reset(OpMIPSCMOVZ)
  1893  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1894  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1895  		v1.AddArg(y)
  1896  		v0.AddArg2(x, v1)
  1897  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1898  		v2.AuxInt = int32ToAuxInt(0)
  1899  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1900  		v3.AuxInt = int32ToAuxInt(32)
  1901  		v3.AddArg(v1)
  1902  		v.AddArg3(v0, v2, v3)
  1903  		return true
  1904  	}
  1905  }
  1906  func rewriteValueMIPS_OpLsh8x32(v *Value) bool {
  1907  	v_1 := v.Args[1]
  1908  	v_0 := v.Args[0]
  1909  	b := v.Block
  1910  	typ := &b.Func.Config.Types
  1911  	// match: (Lsh8x32 <t> x y)
  1912  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1913  	for {
  1914  		t := v.Type
  1915  		x := v_0
  1916  		y := v_1
  1917  		v.reset(OpMIPSCMOVZ)
  1918  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1919  		v0.AddArg2(x, y)
  1920  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1921  		v1.AuxInt = int32ToAuxInt(0)
  1922  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1923  		v2.AuxInt = int32ToAuxInt(32)
  1924  		v2.AddArg(y)
  1925  		v.AddArg3(v0, v1, v2)
  1926  		return true
  1927  	}
  1928  }
  1929  func rewriteValueMIPS_OpLsh8x64(v *Value) bool {
  1930  	v_1 := v.Args[1]
  1931  	v_0 := v.Args[0]
  1932  	// match: (Lsh8x64 x (Const64 [c]))
  1933  	// cond: uint32(c) < 8
  1934  	// result: (SLLconst x [int32(c)])
  1935  	for {
  1936  		x := v_0
  1937  		if v_1.Op != OpConst64 {
  1938  			break
  1939  		}
  1940  		c := auxIntToInt64(v_1.AuxInt)
  1941  		if !(uint32(c) < 8) {
  1942  			break
  1943  		}
  1944  		v.reset(OpMIPSSLLconst)
  1945  		v.AuxInt = int32ToAuxInt(int32(c))
  1946  		v.AddArg(x)
  1947  		return true
  1948  	}
  1949  	// match: (Lsh8x64 _ (Const64 [c]))
  1950  	// cond: uint32(c) >= 8
  1951  	// result: (MOVWconst [0])
  1952  	for {
  1953  		if v_1.Op != OpConst64 {
  1954  			break
  1955  		}
  1956  		c := auxIntToInt64(v_1.AuxInt)
  1957  		if !(uint32(c) >= 8) {
  1958  			break
  1959  		}
  1960  		v.reset(OpMIPSMOVWconst)
  1961  		v.AuxInt = int32ToAuxInt(0)
  1962  		return true
  1963  	}
  1964  	return false
  1965  }
  1966  func rewriteValueMIPS_OpLsh8x8(v *Value) bool {
  1967  	v_1 := v.Args[1]
  1968  	v_0 := v.Args[0]
  1969  	b := v.Block
  1970  	typ := &b.Func.Config.Types
  1971  	// match: (Lsh8x8 <t> x y)
  1972  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1973  	for {
  1974  		t := v.Type
  1975  		x := v_0
  1976  		y := v_1
  1977  		v.reset(OpMIPSCMOVZ)
  1978  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1979  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1980  		v1.AddArg(y)
  1981  		v0.AddArg2(x, v1)
  1982  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1983  		v2.AuxInt = int32ToAuxInt(0)
  1984  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1985  		v3.AuxInt = int32ToAuxInt(32)
  1986  		v3.AddArg(v1)
  1987  		v.AddArg3(v0, v2, v3)
  1988  		return true
  1989  	}
  1990  }
  1991  func rewriteValueMIPS_OpMIPSADD(v *Value) bool {
  1992  	v_1 := v.Args[1]
  1993  	v_0 := v.Args[0]
  1994  	// match: (ADD x (MOVWconst [c]))
  1995  	// result: (ADDconst [c] x)
  1996  	for {
  1997  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1998  			x := v_0
  1999  			if v_1.Op != OpMIPSMOVWconst {
  2000  				continue
  2001  			}
  2002  			c := auxIntToInt32(v_1.AuxInt)
  2003  			v.reset(OpMIPSADDconst)
  2004  			v.AuxInt = int32ToAuxInt(c)
  2005  			v.AddArg(x)
  2006  			return true
  2007  		}
  2008  		break
  2009  	}
  2010  	// match: (ADD x (NEG y))
  2011  	// result: (SUB x y)
  2012  	for {
  2013  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2014  			x := v_0
  2015  			if v_1.Op != OpMIPSNEG {
  2016  				continue
  2017  			}
  2018  			y := v_1.Args[0]
  2019  			v.reset(OpMIPSSUB)
  2020  			v.AddArg2(x, y)
  2021  			return true
  2022  		}
  2023  		break
  2024  	}
  2025  	return false
  2026  }
  2027  func rewriteValueMIPS_OpMIPSADDconst(v *Value) bool {
  2028  	v_0 := v.Args[0]
  2029  	// match: (ADDconst [off1] (MOVWaddr [off2] {sym} ptr))
  2030  	// result: (MOVWaddr [off1+off2] {sym} ptr)
  2031  	for {
  2032  		off1 := auxIntToInt32(v.AuxInt)
  2033  		if v_0.Op != OpMIPSMOVWaddr {
  2034  			break
  2035  		}
  2036  		off2 := auxIntToInt32(v_0.AuxInt)
  2037  		sym := auxToSym(v_0.Aux)
  2038  		ptr := v_0.Args[0]
  2039  		v.reset(OpMIPSMOVWaddr)
  2040  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2041  		v.Aux = symToAux(sym)
  2042  		v.AddArg(ptr)
  2043  		return true
  2044  	}
  2045  	// match: (ADDconst [0] x)
  2046  	// result: x
  2047  	for {
  2048  		if auxIntToInt32(v.AuxInt) != 0 {
  2049  			break
  2050  		}
  2051  		x := v_0
  2052  		v.copyOf(x)
  2053  		return true
  2054  	}
  2055  	// match: (ADDconst [c] (MOVWconst [d]))
  2056  	// result: (MOVWconst [int32(c+d)])
  2057  	for {
  2058  		c := auxIntToInt32(v.AuxInt)
  2059  		if v_0.Op != OpMIPSMOVWconst {
  2060  			break
  2061  		}
  2062  		d := auxIntToInt32(v_0.AuxInt)
  2063  		v.reset(OpMIPSMOVWconst)
  2064  		v.AuxInt = int32ToAuxInt(int32(c + d))
  2065  		return true
  2066  	}
  2067  	// match: (ADDconst [c] (ADDconst [d] x))
  2068  	// result: (ADDconst [c+d] x)
  2069  	for {
  2070  		c := auxIntToInt32(v.AuxInt)
  2071  		if v_0.Op != OpMIPSADDconst {
  2072  			break
  2073  		}
  2074  		d := auxIntToInt32(v_0.AuxInt)
  2075  		x := v_0.Args[0]
  2076  		v.reset(OpMIPSADDconst)
  2077  		v.AuxInt = int32ToAuxInt(c + d)
  2078  		v.AddArg(x)
  2079  		return true
  2080  	}
  2081  	// match: (ADDconst [c] (SUBconst [d] x))
  2082  	// result: (ADDconst [c-d] x)
  2083  	for {
  2084  		c := auxIntToInt32(v.AuxInt)
  2085  		if v_0.Op != OpMIPSSUBconst {
  2086  			break
  2087  		}
  2088  		d := auxIntToInt32(v_0.AuxInt)
  2089  		x := v_0.Args[0]
  2090  		v.reset(OpMIPSADDconst)
  2091  		v.AuxInt = int32ToAuxInt(c - d)
  2092  		v.AddArg(x)
  2093  		return true
  2094  	}
  2095  	return false
  2096  }
  2097  func rewriteValueMIPS_OpMIPSAND(v *Value) bool {
  2098  	v_1 := v.Args[1]
  2099  	v_0 := v.Args[0]
  2100  	b := v.Block
  2101  	// match: (AND x (MOVWconst [c]))
  2102  	// result: (ANDconst [c] x)
  2103  	for {
  2104  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2105  			x := v_0
  2106  			if v_1.Op != OpMIPSMOVWconst {
  2107  				continue
  2108  			}
  2109  			c := auxIntToInt32(v_1.AuxInt)
  2110  			v.reset(OpMIPSANDconst)
  2111  			v.AuxInt = int32ToAuxInt(c)
  2112  			v.AddArg(x)
  2113  			return true
  2114  		}
  2115  		break
  2116  	}
  2117  	// match: (AND x x)
  2118  	// result: x
  2119  	for {
  2120  		x := v_0
  2121  		if x != v_1 {
  2122  			break
  2123  		}
  2124  		v.copyOf(x)
  2125  		return true
  2126  	}
  2127  	// match: (AND (SGTUconst [1] x) (SGTUconst [1] y))
  2128  	// result: (SGTUconst [1] (OR <x.Type> x y))
  2129  	for {
  2130  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2131  			if v_0.Op != OpMIPSSGTUconst || auxIntToInt32(v_0.AuxInt) != 1 {
  2132  				continue
  2133  			}
  2134  			x := v_0.Args[0]
  2135  			if v_1.Op != OpMIPSSGTUconst || auxIntToInt32(v_1.AuxInt) != 1 {
  2136  				continue
  2137  			}
  2138  			y := v_1.Args[0]
  2139  			v.reset(OpMIPSSGTUconst)
  2140  			v.AuxInt = int32ToAuxInt(1)
  2141  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  2142  			v0.AddArg2(x, y)
  2143  			v.AddArg(v0)
  2144  			return true
  2145  		}
  2146  		break
  2147  	}
  2148  	return false
  2149  }
  2150  func rewriteValueMIPS_OpMIPSANDconst(v *Value) bool {
  2151  	v_0 := v.Args[0]
  2152  	// match: (ANDconst [0] _)
  2153  	// result: (MOVWconst [0])
  2154  	for {
  2155  		if auxIntToInt32(v.AuxInt) != 0 {
  2156  			break
  2157  		}
  2158  		v.reset(OpMIPSMOVWconst)
  2159  		v.AuxInt = int32ToAuxInt(0)
  2160  		return true
  2161  	}
  2162  	// match: (ANDconst [-1] x)
  2163  	// result: x
  2164  	for {
  2165  		if auxIntToInt32(v.AuxInt) != -1 {
  2166  			break
  2167  		}
  2168  		x := v_0
  2169  		v.copyOf(x)
  2170  		return true
  2171  	}
  2172  	// match: (ANDconst [c] (MOVWconst [d]))
  2173  	// result: (MOVWconst [c&d])
  2174  	for {
  2175  		c := auxIntToInt32(v.AuxInt)
  2176  		if v_0.Op != OpMIPSMOVWconst {
  2177  			break
  2178  		}
  2179  		d := auxIntToInt32(v_0.AuxInt)
  2180  		v.reset(OpMIPSMOVWconst)
  2181  		v.AuxInt = int32ToAuxInt(c & d)
  2182  		return true
  2183  	}
  2184  	// match: (ANDconst [c] (ANDconst [d] x))
  2185  	// result: (ANDconst [c&d] x)
  2186  	for {
  2187  		c := auxIntToInt32(v.AuxInt)
  2188  		if v_0.Op != OpMIPSANDconst {
  2189  			break
  2190  		}
  2191  		d := auxIntToInt32(v_0.AuxInt)
  2192  		x := v_0.Args[0]
  2193  		v.reset(OpMIPSANDconst)
  2194  		v.AuxInt = int32ToAuxInt(c & d)
  2195  		v.AddArg(x)
  2196  		return true
  2197  	}
  2198  	return false
  2199  }
  2200  func rewriteValueMIPS_OpMIPSCMOVZ(v *Value) bool {
  2201  	v_2 := v.Args[2]
  2202  	v_1 := v.Args[1]
  2203  	v_0 := v.Args[0]
  2204  	// match: (CMOVZ _ f (MOVWconst [0]))
  2205  	// result: f
  2206  	for {
  2207  		f := v_1
  2208  		if v_2.Op != OpMIPSMOVWconst || auxIntToInt32(v_2.AuxInt) != 0 {
  2209  			break
  2210  		}
  2211  		v.copyOf(f)
  2212  		return true
  2213  	}
  2214  	// match: (CMOVZ a _ (MOVWconst [c]))
  2215  	// cond: c!=0
  2216  	// result: a
  2217  	for {
  2218  		a := v_0
  2219  		if v_2.Op != OpMIPSMOVWconst {
  2220  			break
  2221  		}
  2222  		c := auxIntToInt32(v_2.AuxInt)
  2223  		if !(c != 0) {
  2224  			break
  2225  		}
  2226  		v.copyOf(a)
  2227  		return true
  2228  	}
  2229  	// match: (CMOVZ a (MOVWconst [0]) c)
  2230  	// result: (CMOVZzero a c)
  2231  	for {
  2232  		a := v_0
  2233  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2234  			break
  2235  		}
  2236  		c := v_2
  2237  		v.reset(OpMIPSCMOVZzero)
  2238  		v.AddArg2(a, c)
  2239  		return true
  2240  	}
  2241  	return false
  2242  }
  2243  func rewriteValueMIPS_OpMIPSCMOVZzero(v *Value) bool {
  2244  	v_1 := v.Args[1]
  2245  	v_0 := v.Args[0]
  2246  	// match: (CMOVZzero _ (MOVWconst [0]))
  2247  	// result: (MOVWconst [0])
  2248  	for {
  2249  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2250  			break
  2251  		}
  2252  		v.reset(OpMIPSMOVWconst)
  2253  		v.AuxInt = int32ToAuxInt(0)
  2254  		return true
  2255  	}
  2256  	// match: (CMOVZzero a (MOVWconst [c]))
  2257  	// cond: c!=0
  2258  	// result: a
  2259  	for {
  2260  		a := v_0
  2261  		if v_1.Op != OpMIPSMOVWconst {
  2262  			break
  2263  		}
  2264  		c := auxIntToInt32(v_1.AuxInt)
  2265  		if !(c != 0) {
  2266  			break
  2267  		}
  2268  		v.copyOf(a)
  2269  		return true
  2270  	}
  2271  	return false
  2272  }
  2273  func rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v *Value) bool {
  2274  	v_2 := v.Args[2]
  2275  	v_1 := v.Args[1]
  2276  	v_0 := v.Args[0]
  2277  	// match: (LoweredAtomicAdd ptr (MOVWconst [c]) mem)
  2278  	// cond: is16Bit(int64(c))
  2279  	// result: (LoweredAtomicAddconst [c] ptr mem)
  2280  	for {
  2281  		ptr := v_0
  2282  		if v_1.Op != OpMIPSMOVWconst {
  2283  			break
  2284  		}
  2285  		c := auxIntToInt32(v_1.AuxInt)
  2286  		mem := v_2
  2287  		if !(is16Bit(int64(c))) {
  2288  			break
  2289  		}
  2290  		v.reset(OpMIPSLoweredAtomicAddconst)
  2291  		v.AuxInt = int32ToAuxInt(c)
  2292  		v.AddArg2(ptr, mem)
  2293  		return true
  2294  	}
  2295  	return false
  2296  }
  2297  func rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v *Value) bool {
  2298  	v_2 := v.Args[2]
  2299  	v_1 := v.Args[1]
  2300  	v_0 := v.Args[0]
  2301  	// match: (LoweredAtomicStore32 ptr (MOVWconst [0]) mem)
  2302  	// result: (LoweredAtomicStorezero ptr mem)
  2303  	for {
  2304  		ptr := v_0
  2305  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2306  			break
  2307  		}
  2308  		mem := v_2
  2309  		v.reset(OpMIPSLoweredAtomicStorezero)
  2310  		v.AddArg2(ptr, mem)
  2311  		return true
  2312  	}
  2313  	return false
  2314  }
  2315  func rewriteValueMIPS_OpMIPSMOVBUload(v *Value) bool {
  2316  	v_1 := v.Args[1]
  2317  	v_0 := v.Args[0]
  2318  	// match: (MOVBUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2319  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2320  	// result: (MOVBUload [off1+off2] {sym} ptr mem)
  2321  	for {
  2322  		off1 := auxIntToInt32(v.AuxInt)
  2323  		sym := auxToSym(v.Aux)
  2324  		x := v_0
  2325  		if x.Op != OpMIPSADDconst {
  2326  			break
  2327  		}
  2328  		off2 := auxIntToInt32(x.AuxInt)
  2329  		ptr := x.Args[0]
  2330  		mem := v_1
  2331  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2332  			break
  2333  		}
  2334  		v.reset(OpMIPSMOVBUload)
  2335  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2336  		v.Aux = symToAux(sym)
  2337  		v.AddArg2(ptr, mem)
  2338  		return true
  2339  	}
  2340  	// match: (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2341  	// cond: canMergeSym(sym1,sym2)
  2342  	// result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2343  	for {
  2344  		off1 := auxIntToInt32(v.AuxInt)
  2345  		sym1 := auxToSym(v.Aux)
  2346  		if v_0.Op != OpMIPSMOVWaddr {
  2347  			break
  2348  		}
  2349  		off2 := auxIntToInt32(v_0.AuxInt)
  2350  		sym2 := auxToSym(v_0.Aux)
  2351  		ptr := v_0.Args[0]
  2352  		mem := v_1
  2353  		if !(canMergeSym(sym1, sym2)) {
  2354  			break
  2355  		}
  2356  		v.reset(OpMIPSMOVBUload)
  2357  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2358  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2359  		v.AddArg2(ptr, mem)
  2360  		return true
  2361  	}
  2362  	// match: (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2363  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2364  	// result: (MOVBUreg x)
  2365  	for {
  2366  		off := auxIntToInt32(v.AuxInt)
  2367  		sym := auxToSym(v.Aux)
  2368  		ptr := v_0
  2369  		if v_1.Op != OpMIPSMOVBstore {
  2370  			break
  2371  		}
  2372  		off2 := auxIntToInt32(v_1.AuxInt)
  2373  		sym2 := auxToSym(v_1.Aux)
  2374  		x := v_1.Args[1]
  2375  		ptr2 := v_1.Args[0]
  2376  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2377  			break
  2378  		}
  2379  		v.reset(OpMIPSMOVBUreg)
  2380  		v.AddArg(x)
  2381  		return true
  2382  	}
  2383  	return false
  2384  }
  2385  func rewriteValueMIPS_OpMIPSMOVBUreg(v *Value) bool {
  2386  	v_0 := v.Args[0]
  2387  	b := v.Block
  2388  	// match: (MOVBUreg x:(MOVBUload _ _))
  2389  	// result: (MOVWreg x)
  2390  	for {
  2391  		x := v_0
  2392  		if x.Op != OpMIPSMOVBUload {
  2393  			break
  2394  		}
  2395  		v.reset(OpMIPSMOVWreg)
  2396  		v.AddArg(x)
  2397  		return true
  2398  	}
  2399  	// match: (MOVBUreg x:(MOVBUreg _))
  2400  	// result: (MOVWreg x)
  2401  	for {
  2402  		x := v_0
  2403  		if x.Op != OpMIPSMOVBUreg {
  2404  			break
  2405  		}
  2406  		v.reset(OpMIPSMOVWreg)
  2407  		v.AddArg(x)
  2408  		return true
  2409  	}
  2410  	// match: (MOVBUreg <t> x:(MOVBload [off] {sym} ptr mem))
  2411  	// cond: x.Uses == 1 && clobber(x)
  2412  	// result: @x.Block (MOVBUload <t> [off] {sym} ptr mem)
  2413  	for {
  2414  		t := v.Type
  2415  		x := v_0
  2416  		if x.Op != OpMIPSMOVBload {
  2417  			break
  2418  		}
  2419  		off := auxIntToInt32(x.AuxInt)
  2420  		sym := auxToSym(x.Aux)
  2421  		mem := x.Args[1]
  2422  		ptr := x.Args[0]
  2423  		if !(x.Uses == 1 && clobber(x)) {
  2424  			break
  2425  		}
  2426  		b = x.Block
  2427  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBUload, t)
  2428  		v.copyOf(v0)
  2429  		v0.AuxInt = int32ToAuxInt(off)
  2430  		v0.Aux = symToAux(sym)
  2431  		v0.AddArg2(ptr, mem)
  2432  		return true
  2433  	}
  2434  	// match: (MOVBUreg (ANDconst [c] x))
  2435  	// result: (ANDconst [c&0xff] x)
  2436  	for {
  2437  		if v_0.Op != OpMIPSANDconst {
  2438  			break
  2439  		}
  2440  		c := auxIntToInt32(v_0.AuxInt)
  2441  		x := v_0.Args[0]
  2442  		v.reset(OpMIPSANDconst)
  2443  		v.AuxInt = int32ToAuxInt(c & 0xff)
  2444  		v.AddArg(x)
  2445  		return true
  2446  	}
  2447  	// match: (MOVBUreg (MOVWconst [c]))
  2448  	// result: (MOVWconst [int32(uint8(c))])
  2449  	for {
  2450  		if v_0.Op != OpMIPSMOVWconst {
  2451  			break
  2452  		}
  2453  		c := auxIntToInt32(v_0.AuxInt)
  2454  		v.reset(OpMIPSMOVWconst)
  2455  		v.AuxInt = int32ToAuxInt(int32(uint8(c)))
  2456  		return true
  2457  	}
  2458  	return false
  2459  }
  2460  func rewriteValueMIPS_OpMIPSMOVBload(v *Value) bool {
  2461  	v_1 := v.Args[1]
  2462  	v_0 := v.Args[0]
  2463  	// match: (MOVBload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2464  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2465  	// result: (MOVBload [off1+off2] {sym} ptr mem)
  2466  	for {
  2467  		off1 := auxIntToInt32(v.AuxInt)
  2468  		sym := auxToSym(v.Aux)
  2469  		x := v_0
  2470  		if x.Op != OpMIPSADDconst {
  2471  			break
  2472  		}
  2473  		off2 := auxIntToInt32(x.AuxInt)
  2474  		ptr := x.Args[0]
  2475  		mem := v_1
  2476  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2477  			break
  2478  		}
  2479  		v.reset(OpMIPSMOVBload)
  2480  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2481  		v.Aux = symToAux(sym)
  2482  		v.AddArg2(ptr, mem)
  2483  		return true
  2484  	}
  2485  	// match: (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2486  	// cond: canMergeSym(sym1,sym2)
  2487  	// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2488  	for {
  2489  		off1 := auxIntToInt32(v.AuxInt)
  2490  		sym1 := auxToSym(v.Aux)
  2491  		if v_0.Op != OpMIPSMOVWaddr {
  2492  			break
  2493  		}
  2494  		off2 := auxIntToInt32(v_0.AuxInt)
  2495  		sym2 := auxToSym(v_0.Aux)
  2496  		ptr := v_0.Args[0]
  2497  		mem := v_1
  2498  		if !(canMergeSym(sym1, sym2)) {
  2499  			break
  2500  		}
  2501  		v.reset(OpMIPSMOVBload)
  2502  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2503  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2504  		v.AddArg2(ptr, mem)
  2505  		return true
  2506  	}
  2507  	// match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2508  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2509  	// result: (MOVBreg x)
  2510  	for {
  2511  		off := auxIntToInt32(v.AuxInt)
  2512  		sym := auxToSym(v.Aux)
  2513  		ptr := v_0
  2514  		if v_1.Op != OpMIPSMOVBstore {
  2515  			break
  2516  		}
  2517  		off2 := auxIntToInt32(v_1.AuxInt)
  2518  		sym2 := auxToSym(v_1.Aux)
  2519  		x := v_1.Args[1]
  2520  		ptr2 := v_1.Args[0]
  2521  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2522  			break
  2523  		}
  2524  		v.reset(OpMIPSMOVBreg)
  2525  		v.AddArg(x)
  2526  		return true
  2527  	}
  2528  	return false
  2529  }
  2530  func rewriteValueMIPS_OpMIPSMOVBreg(v *Value) bool {
  2531  	v_0 := v.Args[0]
  2532  	b := v.Block
  2533  	// match: (MOVBreg x:(MOVBload _ _))
  2534  	// result: (MOVWreg x)
  2535  	for {
  2536  		x := v_0
  2537  		if x.Op != OpMIPSMOVBload {
  2538  			break
  2539  		}
  2540  		v.reset(OpMIPSMOVWreg)
  2541  		v.AddArg(x)
  2542  		return true
  2543  	}
  2544  	// match: (MOVBreg x:(MOVBreg _))
  2545  	// result: (MOVWreg x)
  2546  	for {
  2547  		x := v_0
  2548  		if x.Op != OpMIPSMOVBreg {
  2549  			break
  2550  		}
  2551  		v.reset(OpMIPSMOVWreg)
  2552  		v.AddArg(x)
  2553  		return true
  2554  	}
  2555  	// match: (MOVBreg <t> x:(MOVBUload [off] {sym} ptr mem))
  2556  	// cond: x.Uses == 1 && clobber(x)
  2557  	// result: @x.Block (MOVBload <t> [off] {sym} ptr mem)
  2558  	for {
  2559  		t := v.Type
  2560  		x := v_0
  2561  		if x.Op != OpMIPSMOVBUload {
  2562  			break
  2563  		}
  2564  		off := auxIntToInt32(x.AuxInt)
  2565  		sym := auxToSym(x.Aux)
  2566  		mem := x.Args[1]
  2567  		ptr := x.Args[0]
  2568  		if !(x.Uses == 1 && clobber(x)) {
  2569  			break
  2570  		}
  2571  		b = x.Block
  2572  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBload, t)
  2573  		v.copyOf(v0)
  2574  		v0.AuxInt = int32ToAuxInt(off)
  2575  		v0.Aux = symToAux(sym)
  2576  		v0.AddArg2(ptr, mem)
  2577  		return true
  2578  	}
  2579  	// match: (MOVBreg (ANDconst [c] x))
  2580  	// cond: c & 0x80 == 0
  2581  	// result: (ANDconst [c&0x7f] x)
  2582  	for {
  2583  		if v_0.Op != OpMIPSANDconst {
  2584  			break
  2585  		}
  2586  		c := auxIntToInt32(v_0.AuxInt)
  2587  		x := v_0.Args[0]
  2588  		if !(c&0x80 == 0) {
  2589  			break
  2590  		}
  2591  		v.reset(OpMIPSANDconst)
  2592  		v.AuxInt = int32ToAuxInt(c & 0x7f)
  2593  		v.AddArg(x)
  2594  		return true
  2595  	}
  2596  	// match: (MOVBreg (MOVWconst [c]))
  2597  	// result: (MOVWconst [int32(int8(c))])
  2598  	for {
  2599  		if v_0.Op != OpMIPSMOVWconst {
  2600  			break
  2601  		}
  2602  		c := auxIntToInt32(v_0.AuxInt)
  2603  		v.reset(OpMIPSMOVWconst)
  2604  		v.AuxInt = int32ToAuxInt(int32(int8(c)))
  2605  		return true
  2606  	}
  2607  	return false
  2608  }
  2609  func rewriteValueMIPS_OpMIPSMOVBstore(v *Value) bool {
  2610  	v_2 := v.Args[2]
  2611  	v_1 := v.Args[1]
  2612  	v_0 := v.Args[0]
  2613  	// match: (MOVBstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  2614  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2615  	// result: (MOVBstore [off1+off2] {sym} ptr val mem)
  2616  	for {
  2617  		off1 := auxIntToInt32(v.AuxInt)
  2618  		sym := auxToSym(v.Aux)
  2619  		x := v_0
  2620  		if x.Op != OpMIPSADDconst {
  2621  			break
  2622  		}
  2623  		off2 := auxIntToInt32(x.AuxInt)
  2624  		ptr := x.Args[0]
  2625  		val := v_1
  2626  		mem := v_2
  2627  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2628  			break
  2629  		}
  2630  		v.reset(OpMIPSMOVBstore)
  2631  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2632  		v.Aux = symToAux(sym)
  2633  		v.AddArg3(ptr, val, mem)
  2634  		return true
  2635  	}
  2636  	// match: (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  2637  	// cond: canMergeSym(sym1,sym2)
  2638  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  2639  	for {
  2640  		off1 := auxIntToInt32(v.AuxInt)
  2641  		sym1 := auxToSym(v.Aux)
  2642  		if v_0.Op != OpMIPSMOVWaddr {
  2643  			break
  2644  		}
  2645  		off2 := auxIntToInt32(v_0.AuxInt)
  2646  		sym2 := auxToSym(v_0.Aux)
  2647  		ptr := v_0.Args[0]
  2648  		val := v_1
  2649  		mem := v_2
  2650  		if !(canMergeSym(sym1, sym2)) {
  2651  			break
  2652  		}
  2653  		v.reset(OpMIPSMOVBstore)
  2654  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2655  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2656  		v.AddArg3(ptr, val, mem)
  2657  		return true
  2658  	}
  2659  	// match: (MOVBstore [off] {sym} ptr (MOVWconst [0]) mem)
  2660  	// result: (MOVBstorezero [off] {sym} ptr mem)
  2661  	for {
  2662  		off := auxIntToInt32(v.AuxInt)
  2663  		sym := auxToSym(v.Aux)
  2664  		ptr := v_0
  2665  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2666  			break
  2667  		}
  2668  		mem := v_2
  2669  		v.reset(OpMIPSMOVBstorezero)
  2670  		v.AuxInt = int32ToAuxInt(off)
  2671  		v.Aux = symToAux(sym)
  2672  		v.AddArg2(ptr, mem)
  2673  		return true
  2674  	}
  2675  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  2676  	// result: (MOVBstore [off] {sym} ptr x mem)
  2677  	for {
  2678  		off := auxIntToInt32(v.AuxInt)
  2679  		sym := auxToSym(v.Aux)
  2680  		ptr := v_0
  2681  		if v_1.Op != OpMIPSMOVBreg {
  2682  			break
  2683  		}
  2684  		x := v_1.Args[0]
  2685  		mem := v_2
  2686  		v.reset(OpMIPSMOVBstore)
  2687  		v.AuxInt = int32ToAuxInt(off)
  2688  		v.Aux = symToAux(sym)
  2689  		v.AddArg3(ptr, x, mem)
  2690  		return true
  2691  	}
  2692  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  2693  	// result: (MOVBstore [off] {sym} ptr x mem)
  2694  	for {
  2695  		off := auxIntToInt32(v.AuxInt)
  2696  		sym := auxToSym(v.Aux)
  2697  		ptr := v_0
  2698  		if v_1.Op != OpMIPSMOVBUreg {
  2699  			break
  2700  		}
  2701  		x := v_1.Args[0]
  2702  		mem := v_2
  2703  		v.reset(OpMIPSMOVBstore)
  2704  		v.AuxInt = int32ToAuxInt(off)
  2705  		v.Aux = symToAux(sym)
  2706  		v.AddArg3(ptr, x, mem)
  2707  		return true
  2708  	}
  2709  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  2710  	// result: (MOVBstore [off] {sym} ptr x mem)
  2711  	for {
  2712  		off := auxIntToInt32(v.AuxInt)
  2713  		sym := auxToSym(v.Aux)
  2714  		ptr := v_0
  2715  		if v_1.Op != OpMIPSMOVHreg {
  2716  			break
  2717  		}
  2718  		x := v_1.Args[0]
  2719  		mem := v_2
  2720  		v.reset(OpMIPSMOVBstore)
  2721  		v.AuxInt = int32ToAuxInt(off)
  2722  		v.Aux = symToAux(sym)
  2723  		v.AddArg3(ptr, x, mem)
  2724  		return true
  2725  	}
  2726  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  2727  	// result: (MOVBstore [off] {sym} ptr x mem)
  2728  	for {
  2729  		off := auxIntToInt32(v.AuxInt)
  2730  		sym := auxToSym(v.Aux)
  2731  		ptr := v_0
  2732  		if v_1.Op != OpMIPSMOVHUreg {
  2733  			break
  2734  		}
  2735  		x := v_1.Args[0]
  2736  		mem := v_2
  2737  		v.reset(OpMIPSMOVBstore)
  2738  		v.AuxInt = int32ToAuxInt(off)
  2739  		v.Aux = symToAux(sym)
  2740  		v.AddArg3(ptr, x, mem)
  2741  		return true
  2742  	}
  2743  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  2744  	// result: (MOVBstore [off] {sym} ptr x mem)
  2745  	for {
  2746  		off := auxIntToInt32(v.AuxInt)
  2747  		sym := auxToSym(v.Aux)
  2748  		ptr := v_0
  2749  		if v_1.Op != OpMIPSMOVWreg {
  2750  			break
  2751  		}
  2752  		x := v_1.Args[0]
  2753  		mem := v_2
  2754  		v.reset(OpMIPSMOVBstore)
  2755  		v.AuxInt = int32ToAuxInt(off)
  2756  		v.Aux = symToAux(sym)
  2757  		v.AddArg3(ptr, x, mem)
  2758  		return true
  2759  	}
  2760  	return false
  2761  }
  2762  func rewriteValueMIPS_OpMIPSMOVBstorezero(v *Value) bool {
  2763  	v_1 := v.Args[1]
  2764  	v_0 := v.Args[0]
  2765  	// match: (MOVBstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2766  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2767  	// result: (MOVBstorezero [off1+off2] {sym} ptr mem)
  2768  	for {
  2769  		off1 := auxIntToInt32(v.AuxInt)
  2770  		sym := auxToSym(v.Aux)
  2771  		x := v_0
  2772  		if x.Op != OpMIPSADDconst {
  2773  			break
  2774  		}
  2775  		off2 := auxIntToInt32(x.AuxInt)
  2776  		ptr := x.Args[0]
  2777  		mem := v_1
  2778  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2779  			break
  2780  		}
  2781  		v.reset(OpMIPSMOVBstorezero)
  2782  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2783  		v.Aux = symToAux(sym)
  2784  		v.AddArg2(ptr, mem)
  2785  		return true
  2786  	}
  2787  	// match: (MOVBstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2788  	// cond: canMergeSym(sym1,sym2)
  2789  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2790  	for {
  2791  		off1 := auxIntToInt32(v.AuxInt)
  2792  		sym1 := auxToSym(v.Aux)
  2793  		if v_0.Op != OpMIPSMOVWaddr {
  2794  			break
  2795  		}
  2796  		off2 := auxIntToInt32(v_0.AuxInt)
  2797  		sym2 := auxToSym(v_0.Aux)
  2798  		ptr := v_0.Args[0]
  2799  		mem := v_1
  2800  		if !(canMergeSym(sym1, sym2)) {
  2801  			break
  2802  		}
  2803  		v.reset(OpMIPSMOVBstorezero)
  2804  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2805  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2806  		v.AddArg2(ptr, mem)
  2807  		return true
  2808  	}
  2809  	return false
  2810  }
  2811  func rewriteValueMIPS_OpMIPSMOVDload(v *Value) bool {
  2812  	v_1 := v.Args[1]
  2813  	v_0 := v.Args[0]
  2814  	// match: (MOVDload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2815  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2816  	// result: (MOVDload [off1+off2] {sym} ptr mem)
  2817  	for {
  2818  		off1 := auxIntToInt32(v.AuxInt)
  2819  		sym := auxToSym(v.Aux)
  2820  		x := v_0
  2821  		if x.Op != OpMIPSADDconst {
  2822  			break
  2823  		}
  2824  		off2 := auxIntToInt32(x.AuxInt)
  2825  		ptr := x.Args[0]
  2826  		mem := v_1
  2827  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2828  			break
  2829  		}
  2830  		v.reset(OpMIPSMOVDload)
  2831  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2832  		v.Aux = symToAux(sym)
  2833  		v.AddArg2(ptr, mem)
  2834  		return true
  2835  	}
  2836  	// match: (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2837  	// cond: canMergeSym(sym1,sym2)
  2838  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2839  	for {
  2840  		off1 := auxIntToInt32(v.AuxInt)
  2841  		sym1 := auxToSym(v.Aux)
  2842  		if v_0.Op != OpMIPSMOVWaddr {
  2843  			break
  2844  		}
  2845  		off2 := auxIntToInt32(v_0.AuxInt)
  2846  		sym2 := auxToSym(v_0.Aux)
  2847  		ptr := v_0.Args[0]
  2848  		mem := v_1
  2849  		if !(canMergeSym(sym1, sym2)) {
  2850  			break
  2851  		}
  2852  		v.reset(OpMIPSMOVDload)
  2853  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2854  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2855  		v.AddArg2(ptr, mem)
  2856  		return true
  2857  	}
  2858  	// match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _))
  2859  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2860  	// result: x
  2861  	for {
  2862  		off := auxIntToInt32(v.AuxInt)
  2863  		sym := auxToSym(v.Aux)
  2864  		ptr := v_0
  2865  		if v_1.Op != OpMIPSMOVDstore {
  2866  			break
  2867  		}
  2868  		off2 := auxIntToInt32(v_1.AuxInt)
  2869  		sym2 := auxToSym(v_1.Aux)
  2870  		x := v_1.Args[1]
  2871  		ptr2 := v_1.Args[0]
  2872  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2873  			break
  2874  		}
  2875  		v.copyOf(x)
  2876  		return true
  2877  	}
  2878  	return false
  2879  }
  2880  func rewriteValueMIPS_OpMIPSMOVDstore(v *Value) bool {
  2881  	v_2 := v.Args[2]
  2882  	v_1 := v.Args[1]
  2883  	v_0 := v.Args[0]
  2884  	// match: (MOVDstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  2885  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2886  	// result: (MOVDstore [off1+off2] {sym} ptr val mem)
  2887  	for {
  2888  		off1 := auxIntToInt32(v.AuxInt)
  2889  		sym := auxToSym(v.Aux)
  2890  		x := v_0
  2891  		if x.Op != OpMIPSADDconst {
  2892  			break
  2893  		}
  2894  		off2 := auxIntToInt32(x.AuxInt)
  2895  		ptr := x.Args[0]
  2896  		val := v_1
  2897  		mem := v_2
  2898  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2899  			break
  2900  		}
  2901  		v.reset(OpMIPSMOVDstore)
  2902  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2903  		v.Aux = symToAux(sym)
  2904  		v.AddArg3(ptr, val, mem)
  2905  		return true
  2906  	}
  2907  	// match: (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  2908  	// cond: canMergeSym(sym1,sym2)
  2909  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  2910  	for {
  2911  		off1 := auxIntToInt32(v.AuxInt)
  2912  		sym1 := auxToSym(v.Aux)
  2913  		if v_0.Op != OpMIPSMOVWaddr {
  2914  			break
  2915  		}
  2916  		off2 := auxIntToInt32(v_0.AuxInt)
  2917  		sym2 := auxToSym(v_0.Aux)
  2918  		ptr := v_0.Args[0]
  2919  		val := v_1
  2920  		mem := v_2
  2921  		if !(canMergeSym(sym1, sym2)) {
  2922  			break
  2923  		}
  2924  		v.reset(OpMIPSMOVDstore)
  2925  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2926  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2927  		v.AddArg3(ptr, val, mem)
  2928  		return true
  2929  	}
  2930  	return false
  2931  }
  2932  func rewriteValueMIPS_OpMIPSMOVFload(v *Value) bool {
  2933  	v_1 := v.Args[1]
  2934  	v_0 := v.Args[0]
  2935  	// match: (MOVFload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2936  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2937  	// result: (MOVFload [off1+off2] {sym} ptr mem)
  2938  	for {
  2939  		off1 := auxIntToInt32(v.AuxInt)
  2940  		sym := auxToSym(v.Aux)
  2941  		x := v_0
  2942  		if x.Op != OpMIPSADDconst {
  2943  			break
  2944  		}
  2945  		off2 := auxIntToInt32(x.AuxInt)
  2946  		ptr := x.Args[0]
  2947  		mem := v_1
  2948  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2949  			break
  2950  		}
  2951  		v.reset(OpMIPSMOVFload)
  2952  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2953  		v.Aux = symToAux(sym)
  2954  		v.AddArg2(ptr, mem)
  2955  		return true
  2956  	}
  2957  	// match: (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2958  	// cond: canMergeSym(sym1,sym2)
  2959  	// result: (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2960  	for {
  2961  		off1 := auxIntToInt32(v.AuxInt)
  2962  		sym1 := auxToSym(v.Aux)
  2963  		if v_0.Op != OpMIPSMOVWaddr {
  2964  			break
  2965  		}
  2966  		off2 := auxIntToInt32(v_0.AuxInt)
  2967  		sym2 := auxToSym(v_0.Aux)
  2968  		ptr := v_0.Args[0]
  2969  		mem := v_1
  2970  		if !(canMergeSym(sym1, sym2)) {
  2971  			break
  2972  		}
  2973  		v.reset(OpMIPSMOVFload)
  2974  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2975  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2976  		v.AddArg2(ptr, mem)
  2977  		return true
  2978  	}
  2979  	// match: (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _))
  2980  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2981  	// result: x
  2982  	for {
  2983  		off := auxIntToInt32(v.AuxInt)
  2984  		sym := auxToSym(v.Aux)
  2985  		ptr := v_0
  2986  		if v_1.Op != OpMIPSMOVFstore {
  2987  			break
  2988  		}
  2989  		off2 := auxIntToInt32(v_1.AuxInt)
  2990  		sym2 := auxToSym(v_1.Aux)
  2991  		x := v_1.Args[1]
  2992  		ptr2 := v_1.Args[0]
  2993  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2994  			break
  2995  		}
  2996  		v.copyOf(x)
  2997  		return true
  2998  	}
  2999  	return false
  3000  }
  3001  func rewriteValueMIPS_OpMIPSMOVFstore(v *Value) bool {
  3002  	v_2 := v.Args[2]
  3003  	v_1 := v.Args[1]
  3004  	v_0 := v.Args[0]
  3005  	// match: (MOVFstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3006  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3007  	// result: (MOVFstore [off1+off2] {sym} ptr val mem)
  3008  	for {
  3009  		off1 := auxIntToInt32(v.AuxInt)
  3010  		sym := auxToSym(v.Aux)
  3011  		x := v_0
  3012  		if x.Op != OpMIPSADDconst {
  3013  			break
  3014  		}
  3015  		off2 := auxIntToInt32(x.AuxInt)
  3016  		ptr := x.Args[0]
  3017  		val := v_1
  3018  		mem := v_2
  3019  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3020  			break
  3021  		}
  3022  		v.reset(OpMIPSMOVFstore)
  3023  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3024  		v.Aux = symToAux(sym)
  3025  		v.AddArg3(ptr, val, mem)
  3026  		return true
  3027  	}
  3028  	// match: (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3029  	// cond: canMergeSym(sym1,sym2)
  3030  	// result: (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3031  	for {
  3032  		off1 := auxIntToInt32(v.AuxInt)
  3033  		sym1 := auxToSym(v.Aux)
  3034  		if v_0.Op != OpMIPSMOVWaddr {
  3035  			break
  3036  		}
  3037  		off2 := auxIntToInt32(v_0.AuxInt)
  3038  		sym2 := auxToSym(v_0.Aux)
  3039  		ptr := v_0.Args[0]
  3040  		val := v_1
  3041  		mem := v_2
  3042  		if !(canMergeSym(sym1, sym2)) {
  3043  			break
  3044  		}
  3045  		v.reset(OpMIPSMOVFstore)
  3046  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3047  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3048  		v.AddArg3(ptr, val, mem)
  3049  		return true
  3050  	}
  3051  	return false
  3052  }
  3053  func rewriteValueMIPS_OpMIPSMOVHUload(v *Value) bool {
  3054  	v_1 := v.Args[1]
  3055  	v_0 := v.Args[0]
  3056  	// match: (MOVHUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3057  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3058  	// result: (MOVHUload [off1+off2] {sym} ptr mem)
  3059  	for {
  3060  		off1 := auxIntToInt32(v.AuxInt)
  3061  		sym := auxToSym(v.Aux)
  3062  		x := v_0
  3063  		if x.Op != OpMIPSADDconst {
  3064  			break
  3065  		}
  3066  		off2 := auxIntToInt32(x.AuxInt)
  3067  		ptr := x.Args[0]
  3068  		mem := v_1
  3069  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3070  			break
  3071  		}
  3072  		v.reset(OpMIPSMOVHUload)
  3073  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3074  		v.Aux = symToAux(sym)
  3075  		v.AddArg2(ptr, mem)
  3076  		return true
  3077  	}
  3078  	// match: (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3079  	// cond: canMergeSym(sym1,sym2)
  3080  	// result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3081  	for {
  3082  		off1 := auxIntToInt32(v.AuxInt)
  3083  		sym1 := auxToSym(v.Aux)
  3084  		if v_0.Op != OpMIPSMOVWaddr {
  3085  			break
  3086  		}
  3087  		off2 := auxIntToInt32(v_0.AuxInt)
  3088  		sym2 := auxToSym(v_0.Aux)
  3089  		ptr := v_0.Args[0]
  3090  		mem := v_1
  3091  		if !(canMergeSym(sym1, sym2)) {
  3092  			break
  3093  		}
  3094  		v.reset(OpMIPSMOVHUload)
  3095  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3096  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3097  		v.AddArg2(ptr, mem)
  3098  		return true
  3099  	}
  3100  	// match: (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3101  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3102  	// result: (MOVHUreg x)
  3103  	for {
  3104  		off := auxIntToInt32(v.AuxInt)
  3105  		sym := auxToSym(v.Aux)
  3106  		ptr := v_0
  3107  		if v_1.Op != OpMIPSMOVHstore {
  3108  			break
  3109  		}
  3110  		off2 := auxIntToInt32(v_1.AuxInt)
  3111  		sym2 := auxToSym(v_1.Aux)
  3112  		x := v_1.Args[1]
  3113  		ptr2 := v_1.Args[0]
  3114  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3115  			break
  3116  		}
  3117  		v.reset(OpMIPSMOVHUreg)
  3118  		v.AddArg(x)
  3119  		return true
  3120  	}
  3121  	return false
  3122  }
  3123  func rewriteValueMIPS_OpMIPSMOVHUreg(v *Value) bool {
  3124  	v_0 := v.Args[0]
  3125  	b := v.Block
  3126  	// match: (MOVHUreg x:(MOVBUload _ _))
  3127  	// result: (MOVWreg x)
  3128  	for {
  3129  		x := v_0
  3130  		if x.Op != OpMIPSMOVBUload {
  3131  			break
  3132  		}
  3133  		v.reset(OpMIPSMOVWreg)
  3134  		v.AddArg(x)
  3135  		return true
  3136  	}
  3137  	// match: (MOVHUreg x:(MOVHUload _ _))
  3138  	// result: (MOVWreg x)
  3139  	for {
  3140  		x := v_0
  3141  		if x.Op != OpMIPSMOVHUload {
  3142  			break
  3143  		}
  3144  		v.reset(OpMIPSMOVWreg)
  3145  		v.AddArg(x)
  3146  		return true
  3147  	}
  3148  	// match: (MOVHUreg x:(MOVBUreg _))
  3149  	// result: (MOVWreg x)
  3150  	for {
  3151  		x := v_0
  3152  		if x.Op != OpMIPSMOVBUreg {
  3153  			break
  3154  		}
  3155  		v.reset(OpMIPSMOVWreg)
  3156  		v.AddArg(x)
  3157  		return true
  3158  	}
  3159  	// match: (MOVHUreg x:(MOVHUreg _))
  3160  	// result: (MOVWreg x)
  3161  	for {
  3162  		x := v_0
  3163  		if x.Op != OpMIPSMOVHUreg {
  3164  			break
  3165  		}
  3166  		v.reset(OpMIPSMOVWreg)
  3167  		v.AddArg(x)
  3168  		return true
  3169  	}
  3170  	// match: (MOVHUreg <t> x:(MOVHload [off] {sym} ptr mem))
  3171  	// cond: x.Uses == 1 && clobber(x)
  3172  	// result: @x.Block (MOVHUload <t> [off] {sym} ptr mem)
  3173  	for {
  3174  		t := v.Type
  3175  		x := v_0
  3176  		if x.Op != OpMIPSMOVHload {
  3177  			break
  3178  		}
  3179  		off := auxIntToInt32(x.AuxInt)
  3180  		sym := auxToSym(x.Aux)
  3181  		mem := x.Args[1]
  3182  		ptr := x.Args[0]
  3183  		if !(x.Uses == 1 && clobber(x)) {
  3184  			break
  3185  		}
  3186  		b = x.Block
  3187  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHUload, t)
  3188  		v.copyOf(v0)
  3189  		v0.AuxInt = int32ToAuxInt(off)
  3190  		v0.Aux = symToAux(sym)
  3191  		v0.AddArg2(ptr, mem)
  3192  		return true
  3193  	}
  3194  	// match: (MOVHUreg (ANDconst [c] x))
  3195  	// result: (ANDconst [c&0xffff] x)
  3196  	for {
  3197  		if v_0.Op != OpMIPSANDconst {
  3198  			break
  3199  		}
  3200  		c := auxIntToInt32(v_0.AuxInt)
  3201  		x := v_0.Args[0]
  3202  		v.reset(OpMIPSANDconst)
  3203  		v.AuxInt = int32ToAuxInt(c & 0xffff)
  3204  		v.AddArg(x)
  3205  		return true
  3206  	}
  3207  	// match: (MOVHUreg (MOVWconst [c]))
  3208  	// result: (MOVWconst [int32(uint16(c))])
  3209  	for {
  3210  		if v_0.Op != OpMIPSMOVWconst {
  3211  			break
  3212  		}
  3213  		c := auxIntToInt32(v_0.AuxInt)
  3214  		v.reset(OpMIPSMOVWconst)
  3215  		v.AuxInt = int32ToAuxInt(int32(uint16(c)))
  3216  		return true
  3217  	}
  3218  	return false
  3219  }
  3220  func rewriteValueMIPS_OpMIPSMOVHload(v *Value) bool {
  3221  	v_1 := v.Args[1]
  3222  	v_0 := v.Args[0]
  3223  	// match: (MOVHload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3224  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3225  	// result: (MOVHload [off1+off2] {sym} ptr mem)
  3226  	for {
  3227  		off1 := auxIntToInt32(v.AuxInt)
  3228  		sym := auxToSym(v.Aux)
  3229  		x := v_0
  3230  		if x.Op != OpMIPSADDconst {
  3231  			break
  3232  		}
  3233  		off2 := auxIntToInt32(x.AuxInt)
  3234  		ptr := x.Args[0]
  3235  		mem := v_1
  3236  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3237  			break
  3238  		}
  3239  		v.reset(OpMIPSMOVHload)
  3240  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3241  		v.Aux = symToAux(sym)
  3242  		v.AddArg2(ptr, mem)
  3243  		return true
  3244  	}
  3245  	// match: (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3246  	// cond: canMergeSym(sym1,sym2)
  3247  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3248  	for {
  3249  		off1 := auxIntToInt32(v.AuxInt)
  3250  		sym1 := auxToSym(v.Aux)
  3251  		if v_0.Op != OpMIPSMOVWaddr {
  3252  			break
  3253  		}
  3254  		off2 := auxIntToInt32(v_0.AuxInt)
  3255  		sym2 := auxToSym(v_0.Aux)
  3256  		ptr := v_0.Args[0]
  3257  		mem := v_1
  3258  		if !(canMergeSym(sym1, sym2)) {
  3259  			break
  3260  		}
  3261  		v.reset(OpMIPSMOVHload)
  3262  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3263  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3264  		v.AddArg2(ptr, mem)
  3265  		return true
  3266  	}
  3267  	// match: (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3268  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3269  	// result: (MOVHreg x)
  3270  	for {
  3271  		off := auxIntToInt32(v.AuxInt)
  3272  		sym := auxToSym(v.Aux)
  3273  		ptr := v_0
  3274  		if v_1.Op != OpMIPSMOVHstore {
  3275  			break
  3276  		}
  3277  		off2 := auxIntToInt32(v_1.AuxInt)
  3278  		sym2 := auxToSym(v_1.Aux)
  3279  		x := v_1.Args[1]
  3280  		ptr2 := v_1.Args[0]
  3281  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3282  			break
  3283  		}
  3284  		v.reset(OpMIPSMOVHreg)
  3285  		v.AddArg(x)
  3286  		return true
  3287  	}
  3288  	return false
  3289  }
  3290  func rewriteValueMIPS_OpMIPSMOVHreg(v *Value) bool {
  3291  	v_0 := v.Args[0]
  3292  	b := v.Block
  3293  	// match: (MOVHreg x:(MOVBload _ _))
  3294  	// result: (MOVWreg x)
  3295  	for {
  3296  		x := v_0
  3297  		if x.Op != OpMIPSMOVBload {
  3298  			break
  3299  		}
  3300  		v.reset(OpMIPSMOVWreg)
  3301  		v.AddArg(x)
  3302  		return true
  3303  	}
  3304  	// match: (MOVHreg x:(MOVBUload _ _))
  3305  	// result: (MOVWreg x)
  3306  	for {
  3307  		x := v_0
  3308  		if x.Op != OpMIPSMOVBUload {
  3309  			break
  3310  		}
  3311  		v.reset(OpMIPSMOVWreg)
  3312  		v.AddArg(x)
  3313  		return true
  3314  	}
  3315  	// match: (MOVHreg x:(MOVHload _ _))
  3316  	// result: (MOVWreg x)
  3317  	for {
  3318  		x := v_0
  3319  		if x.Op != OpMIPSMOVHload {
  3320  			break
  3321  		}
  3322  		v.reset(OpMIPSMOVWreg)
  3323  		v.AddArg(x)
  3324  		return true
  3325  	}
  3326  	// match: (MOVHreg x:(MOVBreg _))
  3327  	// result: (MOVWreg x)
  3328  	for {
  3329  		x := v_0
  3330  		if x.Op != OpMIPSMOVBreg {
  3331  			break
  3332  		}
  3333  		v.reset(OpMIPSMOVWreg)
  3334  		v.AddArg(x)
  3335  		return true
  3336  	}
  3337  	// match: (MOVHreg x:(MOVBUreg _))
  3338  	// result: (MOVWreg x)
  3339  	for {
  3340  		x := v_0
  3341  		if x.Op != OpMIPSMOVBUreg {
  3342  			break
  3343  		}
  3344  		v.reset(OpMIPSMOVWreg)
  3345  		v.AddArg(x)
  3346  		return true
  3347  	}
  3348  	// match: (MOVHreg x:(MOVHreg _))
  3349  	// result: (MOVWreg x)
  3350  	for {
  3351  		x := v_0
  3352  		if x.Op != OpMIPSMOVHreg {
  3353  			break
  3354  		}
  3355  		v.reset(OpMIPSMOVWreg)
  3356  		v.AddArg(x)
  3357  		return true
  3358  	}
  3359  	// match: (MOVHreg <t> x:(MOVHUload [off] {sym} ptr mem))
  3360  	// cond: x.Uses == 1 && clobber(x)
  3361  	// result: @x.Block (MOVHload <t> [off] {sym} ptr mem)
  3362  	for {
  3363  		t := v.Type
  3364  		x := v_0
  3365  		if x.Op != OpMIPSMOVHUload {
  3366  			break
  3367  		}
  3368  		off := auxIntToInt32(x.AuxInt)
  3369  		sym := auxToSym(x.Aux)
  3370  		mem := x.Args[1]
  3371  		ptr := x.Args[0]
  3372  		if !(x.Uses == 1 && clobber(x)) {
  3373  			break
  3374  		}
  3375  		b = x.Block
  3376  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHload, t)
  3377  		v.copyOf(v0)
  3378  		v0.AuxInt = int32ToAuxInt(off)
  3379  		v0.Aux = symToAux(sym)
  3380  		v0.AddArg2(ptr, mem)
  3381  		return true
  3382  	}
  3383  	// match: (MOVHreg (ANDconst [c] x))
  3384  	// cond: c & 0x8000 == 0
  3385  	// result: (ANDconst [c&0x7fff] x)
  3386  	for {
  3387  		if v_0.Op != OpMIPSANDconst {
  3388  			break
  3389  		}
  3390  		c := auxIntToInt32(v_0.AuxInt)
  3391  		x := v_0.Args[0]
  3392  		if !(c&0x8000 == 0) {
  3393  			break
  3394  		}
  3395  		v.reset(OpMIPSANDconst)
  3396  		v.AuxInt = int32ToAuxInt(c & 0x7fff)
  3397  		v.AddArg(x)
  3398  		return true
  3399  	}
  3400  	// match: (MOVHreg (MOVWconst [c]))
  3401  	// result: (MOVWconst [int32(int16(c))])
  3402  	for {
  3403  		if v_0.Op != OpMIPSMOVWconst {
  3404  			break
  3405  		}
  3406  		c := auxIntToInt32(v_0.AuxInt)
  3407  		v.reset(OpMIPSMOVWconst)
  3408  		v.AuxInt = int32ToAuxInt(int32(int16(c)))
  3409  		return true
  3410  	}
  3411  	return false
  3412  }
  3413  func rewriteValueMIPS_OpMIPSMOVHstore(v *Value) bool {
  3414  	v_2 := v.Args[2]
  3415  	v_1 := v.Args[1]
  3416  	v_0 := v.Args[0]
  3417  	// match: (MOVHstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3418  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3419  	// result: (MOVHstore [off1+off2] {sym} ptr val mem)
  3420  	for {
  3421  		off1 := auxIntToInt32(v.AuxInt)
  3422  		sym := auxToSym(v.Aux)
  3423  		x := v_0
  3424  		if x.Op != OpMIPSADDconst {
  3425  			break
  3426  		}
  3427  		off2 := auxIntToInt32(x.AuxInt)
  3428  		ptr := x.Args[0]
  3429  		val := v_1
  3430  		mem := v_2
  3431  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3432  			break
  3433  		}
  3434  		v.reset(OpMIPSMOVHstore)
  3435  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3436  		v.Aux = symToAux(sym)
  3437  		v.AddArg3(ptr, val, mem)
  3438  		return true
  3439  	}
  3440  	// match: (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3441  	// cond: canMergeSym(sym1,sym2)
  3442  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3443  	for {
  3444  		off1 := auxIntToInt32(v.AuxInt)
  3445  		sym1 := auxToSym(v.Aux)
  3446  		if v_0.Op != OpMIPSMOVWaddr {
  3447  			break
  3448  		}
  3449  		off2 := auxIntToInt32(v_0.AuxInt)
  3450  		sym2 := auxToSym(v_0.Aux)
  3451  		ptr := v_0.Args[0]
  3452  		val := v_1
  3453  		mem := v_2
  3454  		if !(canMergeSym(sym1, sym2)) {
  3455  			break
  3456  		}
  3457  		v.reset(OpMIPSMOVHstore)
  3458  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3459  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3460  		v.AddArg3(ptr, val, mem)
  3461  		return true
  3462  	}
  3463  	// match: (MOVHstore [off] {sym} ptr (MOVWconst [0]) mem)
  3464  	// result: (MOVHstorezero [off] {sym} ptr mem)
  3465  	for {
  3466  		off := auxIntToInt32(v.AuxInt)
  3467  		sym := auxToSym(v.Aux)
  3468  		ptr := v_0
  3469  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3470  			break
  3471  		}
  3472  		mem := v_2
  3473  		v.reset(OpMIPSMOVHstorezero)
  3474  		v.AuxInt = int32ToAuxInt(off)
  3475  		v.Aux = symToAux(sym)
  3476  		v.AddArg2(ptr, mem)
  3477  		return true
  3478  	}
  3479  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  3480  	// result: (MOVHstore [off] {sym} ptr x mem)
  3481  	for {
  3482  		off := auxIntToInt32(v.AuxInt)
  3483  		sym := auxToSym(v.Aux)
  3484  		ptr := v_0
  3485  		if v_1.Op != OpMIPSMOVHreg {
  3486  			break
  3487  		}
  3488  		x := v_1.Args[0]
  3489  		mem := v_2
  3490  		v.reset(OpMIPSMOVHstore)
  3491  		v.AuxInt = int32ToAuxInt(off)
  3492  		v.Aux = symToAux(sym)
  3493  		v.AddArg3(ptr, x, mem)
  3494  		return true
  3495  	}
  3496  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
  3497  	// result: (MOVHstore [off] {sym} ptr x mem)
  3498  	for {
  3499  		off := auxIntToInt32(v.AuxInt)
  3500  		sym := auxToSym(v.Aux)
  3501  		ptr := v_0
  3502  		if v_1.Op != OpMIPSMOVHUreg {
  3503  			break
  3504  		}
  3505  		x := v_1.Args[0]
  3506  		mem := v_2
  3507  		v.reset(OpMIPSMOVHstore)
  3508  		v.AuxInt = int32ToAuxInt(off)
  3509  		v.Aux = symToAux(sym)
  3510  		v.AddArg3(ptr, x, mem)
  3511  		return true
  3512  	}
  3513  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
  3514  	// result: (MOVHstore [off] {sym} ptr x mem)
  3515  	for {
  3516  		off := auxIntToInt32(v.AuxInt)
  3517  		sym := auxToSym(v.Aux)
  3518  		ptr := v_0
  3519  		if v_1.Op != OpMIPSMOVWreg {
  3520  			break
  3521  		}
  3522  		x := v_1.Args[0]
  3523  		mem := v_2
  3524  		v.reset(OpMIPSMOVHstore)
  3525  		v.AuxInt = int32ToAuxInt(off)
  3526  		v.Aux = symToAux(sym)
  3527  		v.AddArg3(ptr, x, mem)
  3528  		return true
  3529  	}
  3530  	return false
  3531  }
  3532  func rewriteValueMIPS_OpMIPSMOVHstorezero(v *Value) bool {
  3533  	v_1 := v.Args[1]
  3534  	v_0 := v.Args[0]
  3535  	// match: (MOVHstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3536  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3537  	// result: (MOVHstorezero [off1+off2] {sym} ptr mem)
  3538  	for {
  3539  		off1 := auxIntToInt32(v.AuxInt)
  3540  		sym := auxToSym(v.Aux)
  3541  		x := v_0
  3542  		if x.Op != OpMIPSADDconst {
  3543  			break
  3544  		}
  3545  		off2 := auxIntToInt32(x.AuxInt)
  3546  		ptr := x.Args[0]
  3547  		mem := v_1
  3548  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3549  			break
  3550  		}
  3551  		v.reset(OpMIPSMOVHstorezero)
  3552  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3553  		v.Aux = symToAux(sym)
  3554  		v.AddArg2(ptr, mem)
  3555  		return true
  3556  	}
  3557  	// match: (MOVHstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3558  	// cond: canMergeSym(sym1,sym2)
  3559  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3560  	for {
  3561  		off1 := auxIntToInt32(v.AuxInt)
  3562  		sym1 := auxToSym(v.Aux)
  3563  		if v_0.Op != OpMIPSMOVWaddr {
  3564  			break
  3565  		}
  3566  		off2 := auxIntToInt32(v_0.AuxInt)
  3567  		sym2 := auxToSym(v_0.Aux)
  3568  		ptr := v_0.Args[0]
  3569  		mem := v_1
  3570  		if !(canMergeSym(sym1, sym2)) {
  3571  			break
  3572  		}
  3573  		v.reset(OpMIPSMOVHstorezero)
  3574  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3575  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3576  		v.AddArg2(ptr, mem)
  3577  		return true
  3578  	}
  3579  	return false
  3580  }
  3581  func rewriteValueMIPS_OpMIPSMOVWload(v *Value) bool {
  3582  	v_1 := v.Args[1]
  3583  	v_0 := v.Args[0]
  3584  	// match: (MOVWload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3585  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3586  	// result: (MOVWload [off1+off2] {sym} ptr mem)
  3587  	for {
  3588  		off1 := auxIntToInt32(v.AuxInt)
  3589  		sym := auxToSym(v.Aux)
  3590  		x := v_0
  3591  		if x.Op != OpMIPSADDconst {
  3592  			break
  3593  		}
  3594  		off2 := auxIntToInt32(x.AuxInt)
  3595  		ptr := x.Args[0]
  3596  		mem := v_1
  3597  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3598  			break
  3599  		}
  3600  		v.reset(OpMIPSMOVWload)
  3601  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3602  		v.Aux = symToAux(sym)
  3603  		v.AddArg2(ptr, mem)
  3604  		return true
  3605  	}
  3606  	// match: (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3607  	// cond: canMergeSym(sym1,sym2)
  3608  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3609  	for {
  3610  		off1 := auxIntToInt32(v.AuxInt)
  3611  		sym1 := auxToSym(v.Aux)
  3612  		if v_0.Op != OpMIPSMOVWaddr {
  3613  			break
  3614  		}
  3615  		off2 := auxIntToInt32(v_0.AuxInt)
  3616  		sym2 := auxToSym(v_0.Aux)
  3617  		ptr := v_0.Args[0]
  3618  		mem := v_1
  3619  		if !(canMergeSym(sym1, sym2)) {
  3620  			break
  3621  		}
  3622  		v.reset(OpMIPSMOVWload)
  3623  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3624  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3625  		v.AddArg2(ptr, mem)
  3626  		return true
  3627  	}
  3628  	// match: (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _))
  3629  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3630  	// result: x
  3631  	for {
  3632  		off := auxIntToInt32(v.AuxInt)
  3633  		sym := auxToSym(v.Aux)
  3634  		ptr := v_0
  3635  		if v_1.Op != OpMIPSMOVWstore {
  3636  			break
  3637  		}
  3638  		off2 := auxIntToInt32(v_1.AuxInt)
  3639  		sym2 := auxToSym(v_1.Aux)
  3640  		x := v_1.Args[1]
  3641  		ptr2 := v_1.Args[0]
  3642  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3643  			break
  3644  		}
  3645  		v.copyOf(x)
  3646  		return true
  3647  	}
  3648  	return false
  3649  }
  3650  func rewriteValueMIPS_OpMIPSMOVWreg(v *Value) bool {
  3651  	v_0 := v.Args[0]
  3652  	// match: (MOVWreg x)
  3653  	// cond: x.Uses == 1
  3654  	// result: (MOVWnop x)
  3655  	for {
  3656  		x := v_0
  3657  		if !(x.Uses == 1) {
  3658  			break
  3659  		}
  3660  		v.reset(OpMIPSMOVWnop)
  3661  		v.AddArg(x)
  3662  		return true
  3663  	}
  3664  	// match: (MOVWreg (MOVWconst [c]))
  3665  	// result: (MOVWconst [c])
  3666  	for {
  3667  		if v_0.Op != OpMIPSMOVWconst {
  3668  			break
  3669  		}
  3670  		c := auxIntToInt32(v_0.AuxInt)
  3671  		v.reset(OpMIPSMOVWconst)
  3672  		v.AuxInt = int32ToAuxInt(c)
  3673  		return true
  3674  	}
  3675  	return false
  3676  }
  3677  func rewriteValueMIPS_OpMIPSMOVWstore(v *Value) bool {
  3678  	v_2 := v.Args[2]
  3679  	v_1 := v.Args[1]
  3680  	v_0 := v.Args[0]
  3681  	// match: (MOVWstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3682  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3683  	// result: (MOVWstore [off1+off2] {sym} ptr val mem)
  3684  	for {
  3685  		off1 := auxIntToInt32(v.AuxInt)
  3686  		sym := auxToSym(v.Aux)
  3687  		x := v_0
  3688  		if x.Op != OpMIPSADDconst {
  3689  			break
  3690  		}
  3691  		off2 := auxIntToInt32(x.AuxInt)
  3692  		ptr := x.Args[0]
  3693  		val := v_1
  3694  		mem := v_2
  3695  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3696  			break
  3697  		}
  3698  		v.reset(OpMIPSMOVWstore)
  3699  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3700  		v.Aux = symToAux(sym)
  3701  		v.AddArg3(ptr, val, mem)
  3702  		return true
  3703  	}
  3704  	// match: (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3705  	// cond: canMergeSym(sym1,sym2)
  3706  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3707  	for {
  3708  		off1 := auxIntToInt32(v.AuxInt)
  3709  		sym1 := auxToSym(v.Aux)
  3710  		if v_0.Op != OpMIPSMOVWaddr {
  3711  			break
  3712  		}
  3713  		off2 := auxIntToInt32(v_0.AuxInt)
  3714  		sym2 := auxToSym(v_0.Aux)
  3715  		ptr := v_0.Args[0]
  3716  		val := v_1
  3717  		mem := v_2
  3718  		if !(canMergeSym(sym1, sym2)) {
  3719  			break
  3720  		}
  3721  		v.reset(OpMIPSMOVWstore)
  3722  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3723  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3724  		v.AddArg3(ptr, val, mem)
  3725  		return true
  3726  	}
  3727  	// match: (MOVWstore [off] {sym} ptr (MOVWconst [0]) mem)
  3728  	// result: (MOVWstorezero [off] {sym} ptr mem)
  3729  	for {
  3730  		off := auxIntToInt32(v.AuxInt)
  3731  		sym := auxToSym(v.Aux)
  3732  		ptr := v_0
  3733  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3734  			break
  3735  		}
  3736  		mem := v_2
  3737  		v.reset(OpMIPSMOVWstorezero)
  3738  		v.AuxInt = int32ToAuxInt(off)
  3739  		v.Aux = symToAux(sym)
  3740  		v.AddArg2(ptr, mem)
  3741  		return true
  3742  	}
  3743  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  3744  	// result: (MOVWstore [off] {sym} ptr x mem)
  3745  	for {
  3746  		off := auxIntToInt32(v.AuxInt)
  3747  		sym := auxToSym(v.Aux)
  3748  		ptr := v_0
  3749  		if v_1.Op != OpMIPSMOVWreg {
  3750  			break
  3751  		}
  3752  		x := v_1.Args[0]
  3753  		mem := v_2
  3754  		v.reset(OpMIPSMOVWstore)
  3755  		v.AuxInt = int32ToAuxInt(off)
  3756  		v.Aux = symToAux(sym)
  3757  		v.AddArg3(ptr, x, mem)
  3758  		return true
  3759  	}
  3760  	return false
  3761  }
  3762  func rewriteValueMIPS_OpMIPSMOVWstorezero(v *Value) bool {
  3763  	v_1 := v.Args[1]
  3764  	v_0 := v.Args[0]
  3765  	// match: (MOVWstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3766  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3767  	// result: (MOVWstorezero [off1+off2] {sym} ptr mem)
  3768  	for {
  3769  		off1 := auxIntToInt32(v.AuxInt)
  3770  		sym := auxToSym(v.Aux)
  3771  		x := v_0
  3772  		if x.Op != OpMIPSADDconst {
  3773  			break
  3774  		}
  3775  		off2 := auxIntToInt32(x.AuxInt)
  3776  		ptr := x.Args[0]
  3777  		mem := v_1
  3778  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3779  			break
  3780  		}
  3781  		v.reset(OpMIPSMOVWstorezero)
  3782  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3783  		v.Aux = symToAux(sym)
  3784  		v.AddArg2(ptr, mem)
  3785  		return true
  3786  	}
  3787  	// match: (MOVWstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3788  	// cond: canMergeSym(sym1,sym2)
  3789  	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3790  	for {
  3791  		off1 := auxIntToInt32(v.AuxInt)
  3792  		sym1 := auxToSym(v.Aux)
  3793  		if v_0.Op != OpMIPSMOVWaddr {
  3794  			break
  3795  		}
  3796  		off2 := auxIntToInt32(v_0.AuxInt)
  3797  		sym2 := auxToSym(v_0.Aux)
  3798  		ptr := v_0.Args[0]
  3799  		mem := v_1
  3800  		if !(canMergeSym(sym1, sym2)) {
  3801  			break
  3802  		}
  3803  		v.reset(OpMIPSMOVWstorezero)
  3804  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3805  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3806  		v.AddArg2(ptr, mem)
  3807  		return true
  3808  	}
  3809  	return false
  3810  }
  3811  func rewriteValueMIPS_OpMIPSMUL(v *Value) bool {
  3812  	v_1 := v.Args[1]
  3813  	v_0 := v.Args[0]
  3814  	// match: (MUL (MOVWconst [0]) _ )
  3815  	// result: (MOVWconst [0])
  3816  	for {
  3817  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3818  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  3819  				continue
  3820  			}
  3821  			v.reset(OpMIPSMOVWconst)
  3822  			v.AuxInt = int32ToAuxInt(0)
  3823  			return true
  3824  		}
  3825  		break
  3826  	}
  3827  	// match: (MUL (MOVWconst [1]) x )
  3828  	// result: x
  3829  	for {
  3830  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3831  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 1 {
  3832  				continue
  3833  			}
  3834  			x := v_1
  3835  			v.copyOf(x)
  3836  			return true
  3837  		}
  3838  		break
  3839  	}
  3840  	// match: (MUL (MOVWconst [-1]) x )
  3841  	// result: (NEG x)
  3842  	for {
  3843  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3844  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != -1 {
  3845  				continue
  3846  			}
  3847  			x := v_1
  3848  			v.reset(OpMIPSNEG)
  3849  			v.AddArg(x)
  3850  			return true
  3851  		}
  3852  		break
  3853  	}
  3854  	// match: (MUL (MOVWconst [c]) x )
  3855  	// cond: isPowerOfTwo64(int64(uint32(c)))
  3856  	// result: (SLLconst [int32(log2uint32(int64(c)))] x)
  3857  	for {
  3858  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3859  			if v_0.Op != OpMIPSMOVWconst {
  3860  				continue
  3861  			}
  3862  			c := auxIntToInt32(v_0.AuxInt)
  3863  			x := v_1
  3864  			if !(isPowerOfTwo64(int64(uint32(c)))) {
  3865  				continue
  3866  			}
  3867  			v.reset(OpMIPSSLLconst)
  3868  			v.AuxInt = int32ToAuxInt(int32(log2uint32(int64(c))))
  3869  			v.AddArg(x)
  3870  			return true
  3871  		}
  3872  		break
  3873  	}
  3874  	// match: (MUL (MOVWconst [c]) (MOVWconst [d]))
  3875  	// result: (MOVWconst [c*d])
  3876  	for {
  3877  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3878  			if v_0.Op != OpMIPSMOVWconst {
  3879  				continue
  3880  			}
  3881  			c := auxIntToInt32(v_0.AuxInt)
  3882  			if v_1.Op != OpMIPSMOVWconst {
  3883  				continue
  3884  			}
  3885  			d := auxIntToInt32(v_1.AuxInt)
  3886  			v.reset(OpMIPSMOVWconst)
  3887  			v.AuxInt = int32ToAuxInt(c * d)
  3888  			return true
  3889  		}
  3890  		break
  3891  	}
  3892  	return false
  3893  }
  3894  func rewriteValueMIPS_OpMIPSNEG(v *Value) bool {
  3895  	v_0 := v.Args[0]
  3896  	// match: (NEG (MOVWconst [c]))
  3897  	// result: (MOVWconst [-c])
  3898  	for {
  3899  		if v_0.Op != OpMIPSMOVWconst {
  3900  			break
  3901  		}
  3902  		c := auxIntToInt32(v_0.AuxInt)
  3903  		v.reset(OpMIPSMOVWconst)
  3904  		v.AuxInt = int32ToAuxInt(-c)
  3905  		return true
  3906  	}
  3907  	return false
  3908  }
  3909  func rewriteValueMIPS_OpMIPSNOR(v *Value) bool {
  3910  	v_1 := v.Args[1]
  3911  	v_0 := v.Args[0]
  3912  	// match: (NOR x (MOVWconst [c]))
  3913  	// result: (NORconst [c] x)
  3914  	for {
  3915  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3916  			x := v_0
  3917  			if v_1.Op != OpMIPSMOVWconst {
  3918  				continue
  3919  			}
  3920  			c := auxIntToInt32(v_1.AuxInt)
  3921  			v.reset(OpMIPSNORconst)
  3922  			v.AuxInt = int32ToAuxInt(c)
  3923  			v.AddArg(x)
  3924  			return true
  3925  		}
  3926  		break
  3927  	}
  3928  	return false
  3929  }
  3930  func rewriteValueMIPS_OpMIPSNORconst(v *Value) bool {
  3931  	v_0 := v.Args[0]
  3932  	// match: (NORconst [c] (MOVWconst [d]))
  3933  	// result: (MOVWconst [^(c|d)])
  3934  	for {
  3935  		c := auxIntToInt32(v.AuxInt)
  3936  		if v_0.Op != OpMIPSMOVWconst {
  3937  			break
  3938  		}
  3939  		d := auxIntToInt32(v_0.AuxInt)
  3940  		v.reset(OpMIPSMOVWconst)
  3941  		v.AuxInt = int32ToAuxInt(^(c | d))
  3942  		return true
  3943  	}
  3944  	return false
  3945  }
  3946  func rewriteValueMIPS_OpMIPSOR(v *Value) bool {
  3947  	v_1 := v.Args[1]
  3948  	v_0 := v.Args[0]
  3949  	b := v.Block
  3950  	// match: (OR x (MOVWconst [c]))
  3951  	// result: (ORconst [c] x)
  3952  	for {
  3953  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3954  			x := v_0
  3955  			if v_1.Op != OpMIPSMOVWconst {
  3956  				continue
  3957  			}
  3958  			c := auxIntToInt32(v_1.AuxInt)
  3959  			v.reset(OpMIPSORconst)
  3960  			v.AuxInt = int32ToAuxInt(c)
  3961  			v.AddArg(x)
  3962  			return true
  3963  		}
  3964  		break
  3965  	}
  3966  	// match: (OR x x)
  3967  	// result: x
  3968  	for {
  3969  		x := v_0
  3970  		if x != v_1 {
  3971  			break
  3972  		}
  3973  		v.copyOf(x)
  3974  		return true
  3975  	}
  3976  	// match: (OR (SGTUzero x) (SGTUzero y))
  3977  	// result: (SGTUzero (OR <x.Type> x y))
  3978  	for {
  3979  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3980  			if v_0.Op != OpMIPSSGTUzero {
  3981  				continue
  3982  			}
  3983  			x := v_0.Args[0]
  3984  			if v_1.Op != OpMIPSSGTUzero {
  3985  				continue
  3986  			}
  3987  			y := v_1.Args[0]
  3988  			v.reset(OpMIPSSGTUzero)
  3989  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  3990  			v0.AddArg2(x, y)
  3991  			v.AddArg(v0)
  3992  			return true
  3993  		}
  3994  		break
  3995  	}
  3996  	return false
  3997  }
  3998  func rewriteValueMIPS_OpMIPSORconst(v *Value) bool {
  3999  	v_0 := v.Args[0]
  4000  	// match: (ORconst [0] x)
  4001  	// result: x
  4002  	for {
  4003  		if auxIntToInt32(v.AuxInt) != 0 {
  4004  			break
  4005  		}
  4006  		x := v_0
  4007  		v.copyOf(x)
  4008  		return true
  4009  	}
  4010  	// match: (ORconst [-1] _)
  4011  	// result: (MOVWconst [-1])
  4012  	for {
  4013  		if auxIntToInt32(v.AuxInt) != -1 {
  4014  			break
  4015  		}
  4016  		v.reset(OpMIPSMOVWconst)
  4017  		v.AuxInt = int32ToAuxInt(-1)
  4018  		return true
  4019  	}
  4020  	// match: (ORconst [c] (MOVWconst [d]))
  4021  	// result: (MOVWconst [c|d])
  4022  	for {
  4023  		c := auxIntToInt32(v.AuxInt)
  4024  		if v_0.Op != OpMIPSMOVWconst {
  4025  			break
  4026  		}
  4027  		d := auxIntToInt32(v_0.AuxInt)
  4028  		v.reset(OpMIPSMOVWconst)
  4029  		v.AuxInt = int32ToAuxInt(c | d)
  4030  		return true
  4031  	}
  4032  	// match: (ORconst [c] (ORconst [d] x))
  4033  	// result: (ORconst [c|d] x)
  4034  	for {
  4035  		c := auxIntToInt32(v.AuxInt)
  4036  		if v_0.Op != OpMIPSORconst {
  4037  			break
  4038  		}
  4039  		d := auxIntToInt32(v_0.AuxInt)
  4040  		x := v_0.Args[0]
  4041  		v.reset(OpMIPSORconst)
  4042  		v.AuxInt = int32ToAuxInt(c | d)
  4043  		v.AddArg(x)
  4044  		return true
  4045  	}
  4046  	return false
  4047  }
  4048  func rewriteValueMIPS_OpMIPSSGT(v *Value) bool {
  4049  	v_1 := v.Args[1]
  4050  	v_0 := v.Args[0]
  4051  	// match: (SGT (MOVWconst [c]) x)
  4052  	// result: (SGTconst [c] x)
  4053  	for {
  4054  		if v_0.Op != OpMIPSMOVWconst {
  4055  			break
  4056  		}
  4057  		c := auxIntToInt32(v_0.AuxInt)
  4058  		x := v_1
  4059  		v.reset(OpMIPSSGTconst)
  4060  		v.AuxInt = int32ToAuxInt(c)
  4061  		v.AddArg(x)
  4062  		return true
  4063  	}
  4064  	// match: (SGT x (MOVWconst [0]))
  4065  	// result: (SGTzero x)
  4066  	for {
  4067  		x := v_0
  4068  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4069  			break
  4070  		}
  4071  		v.reset(OpMIPSSGTzero)
  4072  		v.AddArg(x)
  4073  		return true
  4074  	}
  4075  	return false
  4076  }
  4077  func rewriteValueMIPS_OpMIPSSGTU(v *Value) bool {
  4078  	v_1 := v.Args[1]
  4079  	v_0 := v.Args[0]
  4080  	// match: (SGTU (MOVWconst [c]) x)
  4081  	// result: (SGTUconst [c] x)
  4082  	for {
  4083  		if v_0.Op != OpMIPSMOVWconst {
  4084  			break
  4085  		}
  4086  		c := auxIntToInt32(v_0.AuxInt)
  4087  		x := v_1
  4088  		v.reset(OpMIPSSGTUconst)
  4089  		v.AuxInt = int32ToAuxInt(c)
  4090  		v.AddArg(x)
  4091  		return true
  4092  	}
  4093  	// match: (SGTU x (MOVWconst [0]))
  4094  	// result: (SGTUzero x)
  4095  	for {
  4096  		x := v_0
  4097  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4098  			break
  4099  		}
  4100  		v.reset(OpMIPSSGTUzero)
  4101  		v.AddArg(x)
  4102  		return true
  4103  	}
  4104  	return false
  4105  }
  4106  func rewriteValueMIPS_OpMIPSSGTUconst(v *Value) bool {
  4107  	v_0 := v.Args[0]
  4108  	// match: (SGTUconst [c] (MOVWconst [d]))
  4109  	// cond: uint32(c) > uint32(d)
  4110  	// result: (MOVWconst [1])
  4111  	for {
  4112  		c := auxIntToInt32(v.AuxInt)
  4113  		if v_0.Op != OpMIPSMOVWconst {
  4114  			break
  4115  		}
  4116  		d := auxIntToInt32(v_0.AuxInt)
  4117  		if !(uint32(c) > uint32(d)) {
  4118  			break
  4119  		}
  4120  		v.reset(OpMIPSMOVWconst)
  4121  		v.AuxInt = int32ToAuxInt(1)
  4122  		return true
  4123  	}
  4124  	// match: (SGTUconst [c] (MOVWconst [d]))
  4125  	// cond: uint32(c) <= uint32(d)
  4126  	// result: (MOVWconst [0])
  4127  	for {
  4128  		c := auxIntToInt32(v.AuxInt)
  4129  		if v_0.Op != OpMIPSMOVWconst {
  4130  			break
  4131  		}
  4132  		d := auxIntToInt32(v_0.AuxInt)
  4133  		if !(uint32(c) <= uint32(d)) {
  4134  			break
  4135  		}
  4136  		v.reset(OpMIPSMOVWconst)
  4137  		v.AuxInt = int32ToAuxInt(0)
  4138  		return true
  4139  	}
  4140  	// match: (SGTUconst [c] (MOVBUreg _))
  4141  	// cond: 0xff < uint32(c)
  4142  	// result: (MOVWconst [1])
  4143  	for {
  4144  		c := auxIntToInt32(v.AuxInt)
  4145  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < uint32(c)) {
  4146  			break
  4147  		}
  4148  		v.reset(OpMIPSMOVWconst)
  4149  		v.AuxInt = int32ToAuxInt(1)
  4150  		return true
  4151  	}
  4152  	// match: (SGTUconst [c] (MOVHUreg _))
  4153  	// cond: 0xffff < uint32(c)
  4154  	// result: (MOVWconst [1])
  4155  	for {
  4156  		c := auxIntToInt32(v.AuxInt)
  4157  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < uint32(c)) {
  4158  			break
  4159  		}
  4160  		v.reset(OpMIPSMOVWconst)
  4161  		v.AuxInt = int32ToAuxInt(1)
  4162  		return true
  4163  	}
  4164  	// match: (SGTUconst [c] (ANDconst [m] _))
  4165  	// cond: uint32(m) < uint32(c)
  4166  	// result: (MOVWconst [1])
  4167  	for {
  4168  		c := auxIntToInt32(v.AuxInt)
  4169  		if v_0.Op != OpMIPSANDconst {
  4170  			break
  4171  		}
  4172  		m := auxIntToInt32(v_0.AuxInt)
  4173  		if !(uint32(m) < uint32(c)) {
  4174  			break
  4175  		}
  4176  		v.reset(OpMIPSMOVWconst)
  4177  		v.AuxInt = int32ToAuxInt(1)
  4178  		return true
  4179  	}
  4180  	// match: (SGTUconst [c] (SRLconst _ [d]))
  4181  	// cond: uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4182  	// result: (MOVWconst [1])
  4183  	for {
  4184  		c := auxIntToInt32(v.AuxInt)
  4185  		if v_0.Op != OpMIPSSRLconst {
  4186  			break
  4187  		}
  4188  		d := auxIntToInt32(v_0.AuxInt)
  4189  		if !(uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4190  			break
  4191  		}
  4192  		v.reset(OpMIPSMOVWconst)
  4193  		v.AuxInt = int32ToAuxInt(1)
  4194  		return true
  4195  	}
  4196  	return false
  4197  }
  4198  func rewriteValueMIPS_OpMIPSSGTUzero(v *Value) bool {
  4199  	v_0 := v.Args[0]
  4200  	// match: (SGTUzero (MOVWconst [d]))
  4201  	// cond: d != 0
  4202  	// result: (MOVWconst [1])
  4203  	for {
  4204  		if v_0.Op != OpMIPSMOVWconst {
  4205  			break
  4206  		}
  4207  		d := auxIntToInt32(v_0.AuxInt)
  4208  		if !(d != 0) {
  4209  			break
  4210  		}
  4211  		v.reset(OpMIPSMOVWconst)
  4212  		v.AuxInt = int32ToAuxInt(1)
  4213  		return true
  4214  	}
  4215  	// match: (SGTUzero (MOVWconst [d]))
  4216  	// cond: d == 0
  4217  	// result: (MOVWconst [0])
  4218  	for {
  4219  		if v_0.Op != OpMIPSMOVWconst {
  4220  			break
  4221  		}
  4222  		d := auxIntToInt32(v_0.AuxInt)
  4223  		if !(d == 0) {
  4224  			break
  4225  		}
  4226  		v.reset(OpMIPSMOVWconst)
  4227  		v.AuxInt = int32ToAuxInt(0)
  4228  		return true
  4229  	}
  4230  	return false
  4231  }
  4232  func rewriteValueMIPS_OpMIPSSGTconst(v *Value) bool {
  4233  	v_0 := v.Args[0]
  4234  	// match: (SGTconst [c] (MOVWconst [d]))
  4235  	// cond: c > d
  4236  	// result: (MOVWconst [1])
  4237  	for {
  4238  		c := auxIntToInt32(v.AuxInt)
  4239  		if v_0.Op != OpMIPSMOVWconst {
  4240  			break
  4241  		}
  4242  		d := auxIntToInt32(v_0.AuxInt)
  4243  		if !(c > d) {
  4244  			break
  4245  		}
  4246  		v.reset(OpMIPSMOVWconst)
  4247  		v.AuxInt = int32ToAuxInt(1)
  4248  		return true
  4249  	}
  4250  	// match: (SGTconst [c] (MOVWconst [d]))
  4251  	// cond: c <= d
  4252  	// result: (MOVWconst [0])
  4253  	for {
  4254  		c := auxIntToInt32(v.AuxInt)
  4255  		if v_0.Op != OpMIPSMOVWconst {
  4256  			break
  4257  		}
  4258  		d := auxIntToInt32(v_0.AuxInt)
  4259  		if !(c <= d) {
  4260  			break
  4261  		}
  4262  		v.reset(OpMIPSMOVWconst)
  4263  		v.AuxInt = int32ToAuxInt(0)
  4264  		return true
  4265  	}
  4266  	// match: (SGTconst [c] (MOVBreg _))
  4267  	// cond: 0x7f < c
  4268  	// result: (MOVWconst [1])
  4269  	for {
  4270  		c := auxIntToInt32(v.AuxInt)
  4271  		if v_0.Op != OpMIPSMOVBreg || !(0x7f < c) {
  4272  			break
  4273  		}
  4274  		v.reset(OpMIPSMOVWconst)
  4275  		v.AuxInt = int32ToAuxInt(1)
  4276  		return true
  4277  	}
  4278  	// match: (SGTconst [c] (MOVBreg _))
  4279  	// cond: c <= -0x80
  4280  	// result: (MOVWconst [0])
  4281  	for {
  4282  		c := auxIntToInt32(v.AuxInt)
  4283  		if v_0.Op != OpMIPSMOVBreg || !(c <= -0x80) {
  4284  			break
  4285  		}
  4286  		v.reset(OpMIPSMOVWconst)
  4287  		v.AuxInt = int32ToAuxInt(0)
  4288  		return true
  4289  	}
  4290  	// match: (SGTconst [c] (MOVBUreg _))
  4291  	// cond: 0xff < c
  4292  	// result: (MOVWconst [1])
  4293  	for {
  4294  		c := auxIntToInt32(v.AuxInt)
  4295  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < c) {
  4296  			break
  4297  		}
  4298  		v.reset(OpMIPSMOVWconst)
  4299  		v.AuxInt = int32ToAuxInt(1)
  4300  		return true
  4301  	}
  4302  	// match: (SGTconst [c] (MOVBUreg _))
  4303  	// cond: c < 0
  4304  	// result: (MOVWconst [0])
  4305  	for {
  4306  		c := auxIntToInt32(v.AuxInt)
  4307  		if v_0.Op != OpMIPSMOVBUreg || !(c < 0) {
  4308  			break
  4309  		}
  4310  		v.reset(OpMIPSMOVWconst)
  4311  		v.AuxInt = int32ToAuxInt(0)
  4312  		return true
  4313  	}
  4314  	// match: (SGTconst [c] (MOVHreg _))
  4315  	// cond: 0x7fff < c
  4316  	// result: (MOVWconst [1])
  4317  	for {
  4318  		c := auxIntToInt32(v.AuxInt)
  4319  		if v_0.Op != OpMIPSMOVHreg || !(0x7fff < c) {
  4320  			break
  4321  		}
  4322  		v.reset(OpMIPSMOVWconst)
  4323  		v.AuxInt = int32ToAuxInt(1)
  4324  		return true
  4325  	}
  4326  	// match: (SGTconst [c] (MOVHreg _))
  4327  	// cond: c <= -0x8000
  4328  	// result: (MOVWconst [0])
  4329  	for {
  4330  		c := auxIntToInt32(v.AuxInt)
  4331  		if v_0.Op != OpMIPSMOVHreg || !(c <= -0x8000) {
  4332  			break
  4333  		}
  4334  		v.reset(OpMIPSMOVWconst)
  4335  		v.AuxInt = int32ToAuxInt(0)
  4336  		return true
  4337  	}
  4338  	// match: (SGTconst [c] (MOVHUreg _))
  4339  	// cond: 0xffff < c
  4340  	// result: (MOVWconst [1])
  4341  	for {
  4342  		c := auxIntToInt32(v.AuxInt)
  4343  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < c) {
  4344  			break
  4345  		}
  4346  		v.reset(OpMIPSMOVWconst)
  4347  		v.AuxInt = int32ToAuxInt(1)
  4348  		return true
  4349  	}
  4350  	// match: (SGTconst [c] (MOVHUreg _))
  4351  	// cond: c < 0
  4352  	// result: (MOVWconst [0])
  4353  	for {
  4354  		c := auxIntToInt32(v.AuxInt)
  4355  		if v_0.Op != OpMIPSMOVHUreg || !(c < 0) {
  4356  			break
  4357  		}
  4358  		v.reset(OpMIPSMOVWconst)
  4359  		v.AuxInt = int32ToAuxInt(0)
  4360  		return true
  4361  	}
  4362  	// match: (SGTconst [c] (ANDconst [m] _))
  4363  	// cond: 0 <= m && m < c
  4364  	// result: (MOVWconst [1])
  4365  	for {
  4366  		c := auxIntToInt32(v.AuxInt)
  4367  		if v_0.Op != OpMIPSANDconst {
  4368  			break
  4369  		}
  4370  		m := auxIntToInt32(v_0.AuxInt)
  4371  		if !(0 <= m && m < c) {
  4372  			break
  4373  		}
  4374  		v.reset(OpMIPSMOVWconst)
  4375  		v.AuxInt = int32ToAuxInt(1)
  4376  		return true
  4377  	}
  4378  	// match: (SGTconst [c] (SRLconst _ [d]))
  4379  	// cond: 0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4380  	// result: (MOVWconst [1])
  4381  	for {
  4382  		c := auxIntToInt32(v.AuxInt)
  4383  		if v_0.Op != OpMIPSSRLconst {
  4384  			break
  4385  		}
  4386  		d := auxIntToInt32(v_0.AuxInt)
  4387  		if !(0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4388  			break
  4389  		}
  4390  		v.reset(OpMIPSMOVWconst)
  4391  		v.AuxInt = int32ToAuxInt(1)
  4392  		return true
  4393  	}
  4394  	return false
  4395  }
  4396  func rewriteValueMIPS_OpMIPSSGTzero(v *Value) bool {
  4397  	v_0 := v.Args[0]
  4398  	// match: (SGTzero (MOVWconst [d]))
  4399  	// cond: d > 0
  4400  	// result: (MOVWconst [1])
  4401  	for {
  4402  		if v_0.Op != OpMIPSMOVWconst {
  4403  			break
  4404  		}
  4405  		d := auxIntToInt32(v_0.AuxInt)
  4406  		if !(d > 0) {
  4407  			break
  4408  		}
  4409  		v.reset(OpMIPSMOVWconst)
  4410  		v.AuxInt = int32ToAuxInt(1)
  4411  		return true
  4412  	}
  4413  	// match: (SGTzero (MOVWconst [d]))
  4414  	// cond: d <= 0
  4415  	// result: (MOVWconst [0])
  4416  	for {
  4417  		if v_0.Op != OpMIPSMOVWconst {
  4418  			break
  4419  		}
  4420  		d := auxIntToInt32(v_0.AuxInt)
  4421  		if !(d <= 0) {
  4422  			break
  4423  		}
  4424  		v.reset(OpMIPSMOVWconst)
  4425  		v.AuxInt = int32ToAuxInt(0)
  4426  		return true
  4427  	}
  4428  	return false
  4429  }
  4430  func rewriteValueMIPS_OpMIPSSLL(v *Value) bool {
  4431  	v_1 := v.Args[1]
  4432  	v_0 := v.Args[0]
  4433  	// match: (SLL x (MOVWconst [c]))
  4434  	// result: (SLLconst x [c&31])
  4435  	for {
  4436  		x := v_0
  4437  		if v_1.Op != OpMIPSMOVWconst {
  4438  			break
  4439  		}
  4440  		c := auxIntToInt32(v_1.AuxInt)
  4441  		v.reset(OpMIPSSLLconst)
  4442  		v.AuxInt = int32ToAuxInt(c & 31)
  4443  		v.AddArg(x)
  4444  		return true
  4445  	}
  4446  	return false
  4447  }
  4448  func rewriteValueMIPS_OpMIPSSLLconst(v *Value) bool {
  4449  	v_0 := v.Args[0]
  4450  	// match: (SLLconst [c] (MOVWconst [d]))
  4451  	// result: (MOVWconst [d<<uint32(c)])
  4452  	for {
  4453  		c := auxIntToInt32(v.AuxInt)
  4454  		if v_0.Op != OpMIPSMOVWconst {
  4455  			break
  4456  		}
  4457  		d := auxIntToInt32(v_0.AuxInt)
  4458  		v.reset(OpMIPSMOVWconst)
  4459  		v.AuxInt = int32ToAuxInt(d << uint32(c))
  4460  		return true
  4461  	}
  4462  	return false
  4463  }
  4464  func rewriteValueMIPS_OpMIPSSRA(v *Value) bool {
  4465  	v_1 := v.Args[1]
  4466  	v_0 := v.Args[0]
  4467  	// match: (SRA x (MOVWconst [c]))
  4468  	// result: (SRAconst x [c&31])
  4469  	for {
  4470  		x := v_0
  4471  		if v_1.Op != OpMIPSMOVWconst {
  4472  			break
  4473  		}
  4474  		c := auxIntToInt32(v_1.AuxInt)
  4475  		v.reset(OpMIPSSRAconst)
  4476  		v.AuxInt = int32ToAuxInt(c & 31)
  4477  		v.AddArg(x)
  4478  		return true
  4479  	}
  4480  	return false
  4481  }
  4482  func rewriteValueMIPS_OpMIPSSRAconst(v *Value) bool {
  4483  	v_0 := v.Args[0]
  4484  	// match: (SRAconst [c] (MOVWconst [d]))
  4485  	// result: (MOVWconst [d>>uint32(c)])
  4486  	for {
  4487  		c := auxIntToInt32(v.AuxInt)
  4488  		if v_0.Op != OpMIPSMOVWconst {
  4489  			break
  4490  		}
  4491  		d := auxIntToInt32(v_0.AuxInt)
  4492  		v.reset(OpMIPSMOVWconst)
  4493  		v.AuxInt = int32ToAuxInt(d >> uint32(c))
  4494  		return true
  4495  	}
  4496  	return false
  4497  }
  4498  func rewriteValueMIPS_OpMIPSSRL(v *Value) bool {
  4499  	v_1 := v.Args[1]
  4500  	v_0 := v.Args[0]
  4501  	// match: (SRL x (MOVWconst [c]))
  4502  	// result: (SRLconst x [c&31])
  4503  	for {
  4504  		x := v_0
  4505  		if v_1.Op != OpMIPSMOVWconst {
  4506  			break
  4507  		}
  4508  		c := auxIntToInt32(v_1.AuxInt)
  4509  		v.reset(OpMIPSSRLconst)
  4510  		v.AuxInt = int32ToAuxInt(c & 31)
  4511  		v.AddArg(x)
  4512  		return true
  4513  	}
  4514  	return false
  4515  }
  4516  func rewriteValueMIPS_OpMIPSSRLconst(v *Value) bool {
  4517  	v_0 := v.Args[0]
  4518  	// match: (SRLconst [c] (MOVWconst [d]))
  4519  	// result: (MOVWconst [int32(uint32(d)>>uint32(c))])
  4520  	for {
  4521  		c := auxIntToInt32(v.AuxInt)
  4522  		if v_0.Op != OpMIPSMOVWconst {
  4523  			break
  4524  		}
  4525  		d := auxIntToInt32(v_0.AuxInt)
  4526  		v.reset(OpMIPSMOVWconst)
  4527  		v.AuxInt = int32ToAuxInt(int32(uint32(d) >> uint32(c)))
  4528  		return true
  4529  	}
  4530  	return false
  4531  }
  4532  func rewriteValueMIPS_OpMIPSSUB(v *Value) bool {
  4533  	v_1 := v.Args[1]
  4534  	v_0 := v.Args[0]
  4535  	// match: (SUB x (MOVWconst [c]))
  4536  	// result: (SUBconst [c] x)
  4537  	for {
  4538  		x := v_0
  4539  		if v_1.Op != OpMIPSMOVWconst {
  4540  			break
  4541  		}
  4542  		c := auxIntToInt32(v_1.AuxInt)
  4543  		v.reset(OpMIPSSUBconst)
  4544  		v.AuxInt = int32ToAuxInt(c)
  4545  		v.AddArg(x)
  4546  		return true
  4547  	}
  4548  	// match: (SUB x x)
  4549  	// result: (MOVWconst [0])
  4550  	for {
  4551  		x := v_0
  4552  		if x != v_1 {
  4553  			break
  4554  		}
  4555  		v.reset(OpMIPSMOVWconst)
  4556  		v.AuxInt = int32ToAuxInt(0)
  4557  		return true
  4558  	}
  4559  	// match: (SUB (MOVWconst [0]) x)
  4560  	// result: (NEG x)
  4561  	for {
  4562  		if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4563  			break
  4564  		}
  4565  		x := v_1
  4566  		v.reset(OpMIPSNEG)
  4567  		v.AddArg(x)
  4568  		return true
  4569  	}
  4570  	return false
  4571  }
  4572  func rewriteValueMIPS_OpMIPSSUBconst(v *Value) bool {
  4573  	v_0 := v.Args[0]
  4574  	// match: (SUBconst [0] x)
  4575  	// result: x
  4576  	for {
  4577  		if auxIntToInt32(v.AuxInt) != 0 {
  4578  			break
  4579  		}
  4580  		x := v_0
  4581  		v.copyOf(x)
  4582  		return true
  4583  	}
  4584  	// match: (SUBconst [c] (MOVWconst [d]))
  4585  	// result: (MOVWconst [d-c])
  4586  	for {
  4587  		c := auxIntToInt32(v.AuxInt)
  4588  		if v_0.Op != OpMIPSMOVWconst {
  4589  			break
  4590  		}
  4591  		d := auxIntToInt32(v_0.AuxInt)
  4592  		v.reset(OpMIPSMOVWconst)
  4593  		v.AuxInt = int32ToAuxInt(d - c)
  4594  		return true
  4595  	}
  4596  	// match: (SUBconst [c] (SUBconst [d] x))
  4597  	// result: (ADDconst [-c-d] x)
  4598  	for {
  4599  		c := auxIntToInt32(v.AuxInt)
  4600  		if v_0.Op != OpMIPSSUBconst {
  4601  			break
  4602  		}
  4603  		d := auxIntToInt32(v_0.AuxInt)
  4604  		x := v_0.Args[0]
  4605  		v.reset(OpMIPSADDconst)
  4606  		v.AuxInt = int32ToAuxInt(-c - d)
  4607  		v.AddArg(x)
  4608  		return true
  4609  	}
  4610  	// match: (SUBconst [c] (ADDconst [d] x))
  4611  	// result: (ADDconst [-c+d] x)
  4612  	for {
  4613  		c := auxIntToInt32(v.AuxInt)
  4614  		if v_0.Op != OpMIPSADDconst {
  4615  			break
  4616  		}
  4617  		d := auxIntToInt32(v_0.AuxInt)
  4618  		x := v_0.Args[0]
  4619  		v.reset(OpMIPSADDconst)
  4620  		v.AuxInt = int32ToAuxInt(-c + d)
  4621  		v.AddArg(x)
  4622  		return true
  4623  	}
  4624  	return false
  4625  }
  4626  func rewriteValueMIPS_OpMIPSXOR(v *Value) bool {
  4627  	v_1 := v.Args[1]
  4628  	v_0 := v.Args[0]
  4629  	// match: (XOR x (MOVWconst [c]))
  4630  	// result: (XORconst [c] x)
  4631  	for {
  4632  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4633  			x := v_0
  4634  			if v_1.Op != OpMIPSMOVWconst {
  4635  				continue
  4636  			}
  4637  			c := auxIntToInt32(v_1.AuxInt)
  4638  			v.reset(OpMIPSXORconst)
  4639  			v.AuxInt = int32ToAuxInt(c)
  4640  			v.AddArg(x)
  4641  			return true
  4642  		}
  4643  		break
  4644  	}
  4645  	// match: (XOR x x)
  4646  	// result: (MOVWconst [0])
  4647  	for {
  4648  		x := v_0
  4649  		if x != v_1 {
  4650  			break
  4651  		}
  4652  		v.reset(OpMIPSMOVWconst)
  4653  		v.AuxInt = int32ToAuxInt(0)
  4654  		return true
  4655  	}
  4656  	return false
  4657  }
  4658  func rewriteValueMIPS_OpMIPSXORconst(v *Value) bool {
  4659  	v_0 := v.Args[0]
  4660  	// match: (XORconst [0] x)
  4661  	// result: x
  4662  	for {
  4663  		if auxIntToInt32(v.AuxInt) != 0 {
  4664  			break
  4665  		}
  4666  		x := v_0
  4667  		v.copyOf(x)
  4668  		return true
  4669  	}
  4670  	// match: (XORconst [-1] x)
  4671  	// result: (NORconst [0] x)
  4672  	for {
  4673  		if auxIntToInt32(v.AuxInt) != -1 {
  4674  			break
  4675  		}
  4676  		x := v_0
  4677  		v.reset(OpMIPSNORconst)
  4678  		v.AuxInt = int32ToAuxInt(0)
  4679  		v.AddArg(x)
  4680  		return true
  4681  	}
  4682  	// match: (XORconst [c] (MOVWconst [d]))
  4683  	// result: (MOVWconst [c^d])
  4684  	for {
  4685  		c := auxIntToInt32(v.AuxInt)
  4686  		if v_0.Op != OpMIPSMOVWconst {
  4687  			break
  4688  		}
  4689  		d := auxIntToInt32(v_0.AuxInt)
  4690  		v.reset(OpMIPSMOVWconst)
  4691  		v.AuxInt = int32ToAuxInt(c ^ d)
  4692  		return true
  4693  	}
  4694  	// match: (XORconst [c] (XORconst [d] x))
  4695  	// result: (XORconst [c^d] x)
  4696  	for {
  4697  		c := auxIntToInt32(v.AuxInt)
  4698  		if v_0.Op != OpMIPSXORconst {
  4699  			break
  4700  		}
  4701  		d := auxIntToInt32(v_0.AuxInt)
  4702  		x := v_0.Args[0]
  4703  		v.reset(OpMIPSXORconst)
  4704  		v.AuxInt = int32ToAuxInt(c ^ d)
  4705  		v.AddArg(x)
  4706  		return true
  4707  	}
  4708  	return false
  4709  }
  4710  func rewriteValueMIPS_OpMod16(v *Value) bool {
  4711  	v_1 := v.Args[1]
  4712  	v_0 := v.Args[0]
  4713  	b := v.Block
  4714  	typ := &b.Func.Config.Types
  4715  	// match: (Mod16 x y)
  4716  	// result: (Select0 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  4717  	for {
  4718  		x := v_0
  4719  		y := v_1
  4720  		v.reset(OpSelect0)
  4721  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  4722  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4723  		v1.AddArg(x)
  4724  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4725  		v2.AddArg(y)
  4726  		v0.AddArg2(v1, v2)
  4727  		v.AddArg(v0)
  4728  		return true
  4729  	}
  4730  }
  4731  func rewriteValueMIPS_OpMod16u(v *Value) bool {
  4732  	v_1 := v.Args[1]
  4733  	v_0 := v.Args[0]
  4734  	b := v.Block
  4735  	typ := &b.Func.Config.Types
  4736  	// match: (Mod16u x y)
  4737  	// result: (Select0 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  4738  	for {
  4739  		x := v_0
  4740  		y := v_1
  4741  		v.reset(OpSelect0)
  4742  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  4743  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4744  		v1.AddArg(x)
  4745  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4746  		v2.AddArg(y)
  4747  		v0.AddArg2(v1, v2)
  4748  		v.AddArg(v0)
  4749  		return true
  4750  	}
  4751  }
  4752  func rewriteValueMIPS_OpMod32(v *Value) bool {
  4753  	v_1 := v.Args[1]
  4754  	v_0 := v.Args[0]
  4755  	b := v.Block
  4756  	typ := &b.Func.Config.Types
  4757  	// match: (Mod32 x y)
  4758  	// result: (Select0 (DIV x y))
  4759  	for {
  4760  		x := v_0
  4761  		y := v_1
  4762  		v.reset(OpSelect0)
  4763  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  4764  		v0.AddArg2(x, y)
  4765  		v.AddArg(v0)
  4766  		return true
  4767  	}
  4768  }
  4769  func rewriteValueMIPS_OpMod32u(v *Value) bool {
  4770  	v_1 := v.Args[1]
  4771  	v_0 := v.Args[0]
  4772  	b := v.Block
  4773  	typ := &b.Func.Config.Types
  4774  	// match: (Mod32u x y)
  4775  	// result: (Select0 (DIVU x y))
  4776  	for {
  4777  		x := v_0
  4778  		y := v_1
  4779  		v.reset(OpSelect0)
  4780  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  4781  		v0.AddArg2(x, y)
  4782  		v.AddArg(v0)
  4783  		return true
  4784  	}
  4785  }
  4786  func rewriteValueMIPS_OpMod8(v *Value) bool {
  4787  	v_1 := v.Args[1]
  4788  	v_0 := v.Args[0]
  4789  	b := v.Block
  4790  	typ := &b.Func.Config.Types
  4791  	// match: (Mod8 x y)
  4792  	// result: (Select0 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  4793  	for {
  4794  		x := v_0
  4795  		y := v_1
  4796  		v.reset(OpSelect0)
  4797  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  4798  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4799  		v1.AddArg(x)
  4800  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4801  		v2.AddArg(y)
  4802  		v0.AddArg2(v1, v2)
  4803  		v.AddArg(v0)
  4804  		return true
  4805  	}
  4806  }
  4807  func rewriteValueMIPS_OpMod8u(v *Value) bool {
  4808  	v_1 := v.Args[1]
  4809  	v_0 := v.Args[0]
  4810  	b := v.Block
  4811  	typ := &b.Func.Config.Types
  4812  	// match: (Mod8u x y)
  4813  	// result: (Select0 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  4814  	for {
  4815  		x := v_0
  4816  		y := v_1
  4817  		v.reset(OpSelect0)
  4818  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  4819  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4820  		v1.AddArg(x)
  4821  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4822  		v2.AddArg(y)
  4823  		v0.AddArg2(v1, v2)
  4824  		v.AddArg(v0)
  4825  		return true
  4826  	}
  4827  }
  4828  func rewriteValueMIPS_OpMove(v *Value) bool {
  4829  	v_2 := v.Args[2]
  4830  	v_1 := v.Args[1]
  4831  	v_0 := v.Args[0]
  4832  	b := v.Block
  4833  	config := b.Func.Config
  4834  	typ := &b.Func.Config.Types
  4835  	// match: (Move [0] _ _ mem)
  4836  	// result: mem
  4837  	for {
  4838  		if auxIntToInt64(v.AuxInt) != 0 {
  4839  			break
  4840  		}
  4841  		mem := v_2
  4842  		v.copyOf(mem)
  4843  		return true
  4844  	}
  4845  	// match: (Move [1] dst src mem)
  4846  	// result: (MOVBstore dst (MOVBUload src mem) mem)
  4847  	for {
  4848  		if auxIntToInt64(v.AuxInt) != 1 {
  4849  			break
  4850  		}
  4851  		dst := v_0
  4852  		src := v_1
  4853  		mem := v_2
  4854  		v.reset(OpMIPSMOVBstore)
  4855  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4856  		v0.AddArg2(src, mem)
  4857  		v.AddArg3(dst, v0, mem)
  4858  		return true
  4859  	}
  4860  	// match: (Move [2] {t} dst src mem)
  4861  	// cond: t.Alignment()%2 == 0
  4862  	// result: (MOVHstore dst (MOVHUload src mem) mem)
  4863  	for {
  4864  		if auxIntToInt64(v.AuxInt) != 2 {
  4865  			break
  4866  		}
  4867  		t := auxToType(v.Aux)
  4868  		dst := v_0
  4869  		src := v_1
  4870  		mem := v_2
  4871  		if !(t.Alignment()%2 == 0) {
  4872  			break
  4873  		}
  4874  		v.reset(OpMIPSMOVHstore)
  4875  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  4876  		v0.AddArg2(src, mem)
  4877  		v.AddArg3(dst, v0, mem)
  4878  		return true
  4879  	}
  4880  	// match: (Move [2] dst src mem)
  4881  	// result: (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))
  4882  	for {
  4883  		if auxIntToInt64(v.AuxInt) != 2 {
  4884  			break
  4885  		}
  4886  		dst := v_0
  4887  		src := v_1
  4888  		mem := v_2
  4889  		v.reset(OpMIPSMOVBstore)
  4890  		v.AuxInt = int32ToAuxInt(1)
  4891  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4892  		v0.AuxInt = int32ToAuxInt(1)
  4893  		v0.AddArg2(src, mem)
  4894  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  4895  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4896  		v2.AddArg2(src, mem)
  4897  		v1.AddArg3(dst, v2, mem)
  4898  		v.AddArg3(dst, v0, v1)
  4899  		return true
  4900  	}
  4901  	// match: (Move [4] {t} dst src mem)
  4902  	// cond: t.Alignment()%4 == 0
  4903  	// result: (MOVWstore dst (MOVWload src mem) mem)
  4904  	for {
  4905  		if auxIntToInt64(v.AuxInt) != 4 {
  4906  			break
  4907  		}
  4908  		t := auxToType(v.Aux)
  4909  		dst := v_0
  4910  		src := v_1
  4911  		mem := v_2
  4912  		if !(t.Alignment()%4 == 0) {
  4913  			break
  4914  		}
  4915  		v.reset(OpMIPSMOVWstore)
  4916  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  4917  		v0.AddArg2(src, mem)
  4918  		v.AddArg3(dst, v0, mem)
  4919  		return true
  4920  	}
  4921  	// match: (Move [4] {t} dst src mem)
  4922  	// cond: t.Alignment()%2 == 0
  4923  	// result: (MOVHstore [2] dst (MOVHUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
  4924  	for {
  4925  		if auxIntToInt64(v.AuxInt) != 4 {
  4926  			break
  4927  		}
  4928  		t := auxToType(v.Aux)
  4929  		dst := v_0
  4930  		src := v_1
  4931  		mem := v_2
  4932  		if !(t.Alignment()%2 == 0) {
  4933  			break
  4934  		}
  4935  		v.reset(OpMIPSMOVHstore)
  4936  		v.AuxInt = int32ToAuxInt(2)
  4937  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  4938  		v0.AuxInt = int32ToAuxInt(2)
  4939  		v0.AddArg2(src, mem)
  4940  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  4941  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  4942  		v2.AddArg2(src, mem)
  4943  		v1.AddArg3(dst, v2, mem)
  4944  		v.AddArg3(dst, v0, v1)
  4945  		return true
  4946  	}
  4947  	// match: (Move [4] dst src mem)
  4948  	// result: (MOVBstore [3] dst (MOVBUload [3] src mem) (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))))
  4949  	for {
  4950  		if auxIntToInt64(v.AuxInt) != 4 {
  4951  			break
  4952  		}
  4953  		dst := v_0
  4954  		src := v_1
  4955  		mem := v_2
  4956  		v.reset(OpMIPSMOVBstore)
  4957  		v.AuxInt = int32ToAuxInt(3)
  4958  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4959  		v0.AuxInt = int32ToAuxInt(3)
  4960  		v0.AddArg2(src, mem)
  4961  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  4962  		v1.AuxInt = int32ToAuxInt(2)
  4963  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4964  		v2.AuxInt = int32ToAuxInt(2)
  4965  		v2.AddArg2(src, mem)
  4966  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  4967  		v3.AuxInt = int32ToAuxInt(1)
  4968  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4969  		v4.AuxInt = int32ToAuxInt(1)
  4970  		v4.AddArg2(src, mem)
  4971  		v5 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  4972  		v6 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4973  		v6.AddArg2(src, mem)
  4974  		v5.AddArg3(dst, v6, mem)
  4975  		v3.AddArg3(dst, v4, v5)
  4976  		v1.AddArg3(dst, v2, v3)
  4977  		v.AddArg3(dst, v0, v1)
  4978  		return true
  4979  	}
  4980  	// match: (Move [3] dst src mem)
  4981  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem)))
  4982  	for {
  4983  		if auxIntToInt64(v.AuxInt) != 3 {
  4984  			break
  4985  		}
  4986  		dst := v_0
  4987  		src := v_1
  4988  		mem := v_2
  4989  		v.reset(OpMIPSMOVBstore)
  4990  		v.AuxInt = int32ToAuxInt(2)
  4991  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4992  		v0.AuxInt = int32ToAuxInt(2)
  4993  		v0.AddArg2(src, mem)
  4994  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  4995  		v1.AuxInt = int32ToAuxInt(1)
  4996  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4997  		v2.AuxInt = int32ToAuxInt(1)
  4998  		v2.AddArg2(src, mem)
  4999  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5000  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5001  		v4.AddArg2(src, mem)
  5002  		v3.AddArg3(dst, v4, mem)
  5003  		v1.AddArg3(dst, v2, v3)
  5004  		v.AddArg3(dst, v0, v1)
  5005  		return true
  5006  	}
  5007  	// match: (Move [8] {t} dst src mem)
  5008  	// cond: t.Alignment()%4 == 0
  5009  	// result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))
  5010  	for {
  5011  		if auxIntToInt64(v.AuxInt) != 8 {
  5012  			break
  5013  		}
  5014  		t := auxToType(v.Aux)
  5015  		dst := v_0
  5016  		src := v_1
  5017  		mem := v_2
  5018  		if !(t.Alignment()%4 == 0) {
  5019  			break
  5020  		}
  5021  		v.reset(OpMIPSMOVWstore)
  5022  		v.AuxInt = int32ToAuxInt(4)
  5023  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5024  		v0.AuxInt = int32ToAuxInt(4)
  5025  		v0.AddArg2(src, mem)
  5026  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5027  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5028  		v2.AddArg2(src, mem)
  5029  		v1.AddArg3(dst, v2, mem)
  5030  		v.AddArg3(dst, v0, v1)
  5031  		return true
  5032  	}
  5033  	// match: (Move [8] {t} dst src mem)
  5034  	// cond: t.Alignment()%2 == 0
  5035  	// result: (MOVHstore [6] dst (MOVHload [6] src mem) (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))))
  5036  	for {
  5037  		if auxIntToInt64(v.AuxInt) != 8 {
  5038  			break
  5039  		}
  5040  		t := auxToType(v.Aux)
  5041  		dst := v_0
  5042  		src := v_1
  5043  		mem := v_2
  5044  		if !(t.Alignment()%2 == 0) {
  5045  			break
  5046  		}
  5047  		v.reset(OpMIPSMOVHstore)
  5048  		v.AuxInt = int32ToAuxInt(6)
  5049  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5050  		v0.AuxInt = int32ToAuxInt(6)
  5051  		v0.AddArg2(src, mem)
  5052  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5053  		v1.AuxInt = int32ToAuxInt(4)
  5054  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5055  		v2.AuxInt = int32ToAuxInt(4)
  5056  		v2.AddArg2(src, mem)
  5057  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5058  		v3.AuxInt = int32ToAuxInt(2)
  5059  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5060  		v4.AuxInt = int32ToAuxInt(2)
  5061  		v4.AddArg2(src, mem)
  5062  		v5 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5063  		v6 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5064  		v6.AddArg2(src, mem)
  5065  		v5.AddArg3(dst, v6, mem)
  5066  		v3.AddArg3(dst, v4, v5)
  5067  		v1.AddArg3(dst, v2, v3)
  5068  		v.AddArg3(dst, v0, v1)
  5069  		return true
  5070  	}
  5071  	// match: (Move [6] {t} dst src mem)
  5072  	// cond: t.Alignment()%2 == 0
  5073  	// result: (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem)))
  5074  	for {
  5075  		if auxIntToInt64(v.AuxInt) != 6 {
  5076  			break
  5077  		}
  5078  		t := auxToType(v.Aux)
  5079  		dst := v_0
  5080  		src := v_1
  5081  		mem := v_2
  5082  		if !(t.Alignment()%2 == 0) {
  5083  			break
  5084  		}
  5085  		v.reset(OpMIPSMOVHstore)
  5086  		v.AuxInt = int32ToAuxInt(4)
  5087  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5088  		v0.AuxInt = int32ToAuxInt(4)
  5089  		v0.AddArg2(src, mem)
  5090  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5091  		v1.AuxInt = int32ToAuxInt(2)
  5092  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5093  		v2.AuxInt = int32ToAuxInt(2)
  5094  		v2.AddArg2(src, mem)
  5095  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5096  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5097  		v4.AddArg2(src, mem)
  5098  		v3.AddArg3(dst, v4, mem)
  5099  		v1.AddArg3(dst, v2, v3)
  5100  		v.AddArg3(dst, v0, v1)
  5101  		return true
  5102  	}
  5103  	// match: (Move [12] {t} dst src mem)
  5104  	// cond: t.Alignment()%4 == 0
  5105  	// result: (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem)))
  5106  	for {
  5107  		if auxIntToInt64(v.AuxInt) != 12 {
  5108  			break
  5109  		}
  5110  		t := auxToType(v.Aux)
  5111  		dst := v_0
  5112  		src := v_1
  5113  		mem := v_2
  5114  		if !(t.Alignment()%4 == 0) {
  5115  			break
  5116  		}
  5117  		v.reset(OpMIPSMOVWstore)
  5118  		v.AuxInt = int32ToAuxInt(8)
  5119  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5120  		v0.AuxInt = int32ToAuxInt(8)
  5121  		v0.AddArg2(src, mem)
  5122  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5123  		v1.AuxInt = int32ToAuxInt(4)
  5124  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5125  		v2.AuxInt = int32ToAuxInt(4)
  5126  		v2.AddArg2(src, mem)
  5127  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5128  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5129  		v4.AddArg2(src, mem)
  5130  		v3.AddArg3(dst, v4, mem)
  5131  		v1.AddArg3(dst, v2, v3)
  5132  		v.AddArg3(dst, v0, v1)
  5133  		return true
  5134  	}
  5135  	// match: (Move [16] {t} dst src mem)
  5136  	// cond: t.Alignment()%4 == 0
  5137  	// result: (MOVWstore [12] dst (MOVWload [12] src mem) (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))))
  5138  	for {
  5139  		if auxIntToInt64(v.AuxInt) != 16 {
  5140  			break
  5141  		}
  5142  		t := auxToType(v.Aux)
  5143  		dst := v_0
  5144  		src := v_1
  5145  		mem := v_2
  5146  		if !(t.Alignment()%4 == 0) {
  5147  			break
  5148  		}
  5149  		v.reset(OpMIPSMOVWstore)
  5150  		v.AuxInt = int32ToAuxInt(12)
  5151  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5152  		v0.AuxInt = int32ToAuxInt(12)
  5153  		v0.AddArg2(src, mem)
  5154  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5155  		v1.AuxInt = int32ToAuxInt(8)
  5156  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5157  		v2.AuxInt = int32ToAuxInt(8)
  5158  		v2.AddArg2(src, mem)
  5159  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5160  		v3.AuxInt = int32ToAuxInt(4)
  5161  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5162  		v4.AuxInt = int32ToAuxInt(4)
  5163  		v4.AddArg2(src, mem)
  5164  		v5 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5165  		v6 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5166  		v6.AddArg2(src, mem)
  5167  		v5.AddArg3(dst, v6, mem)
  5168  		v3.AddArg3(dst, v4, v5)
  5169  		v1.AddArg3(dst, v2, v3)
  5170  		v.AddArg3(dst, v0, v1)
  5171  		return true
  5172  	}
  5173  	// match: (Move [s] {t} dst src mem)
  5174  	// cond: (s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0)
  5175  	// result: (LoweredMove [int32(t.Alignment())] dst src (ADDconst <src.Type> src [int32(s-moveSize(t.Alignment(), config))]) mem)
  5176  	for {
  5177  		s := auxIntToInt64(v.AuxInt)
  5178  		t := auxToType(v.Aux)
  5179  		dst := v_0
  5180  		src := v_1
  5181  		mem := v_2
  5182  		if !(s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0) {
  5183  			break
  5184  		}
  5185  		v.reset(OpMIPSLoweredMove)
  5186  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  5187  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, src.Type)
  5188  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  5189  		v0.AddArg(src)
  5190  		v.AddArg4(dst, src, v0, mem)
  5191  		return true
  5192  	}
  5193  	return false
  5194  }
  5195  func rewriteValueMIPS_OpNeq16(v *Value) bool {
  5196  	v_1 := v.Args[1]
  5197  	v_0 := v.Args[0]
  5198  	b := v.Block
  5199  	typ := &b.Func.Config.Types
  5200  	// match: (Neq16 x y)
  5201  	// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)) (MOVWconst [0]))
  5202  	for {
  5203  		x := v_0
  5204  		y := v_1
  5205  		v.reset(OpMIPSSGTU)
  5206  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5207  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5208  		v1.AddArg(x)
  5209  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5210  		v2.AddArg(y)
  5211  		v0.AddArg2(v1, v2)
  5212  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5213  		v3.AuxInt = int32ToAuxInt(0)
  5214  		v.AddArg2(v0, v3)
  5215  		return true
  5216  	}
  5217  }
  5218  func rewriteValueMIPS_OpNeq32(v *Value) bool {
  5219  	v_1 := v.Args[1]
  5220  	v_0 := v.Args[0]
  5221  	b := v.Block
  5222  	typ := &b.Func.Config.Types
  5223  	// match: (Neq32 x y)
  5224  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5225  	for {
  5226  		x := v_0
  5227  		y := v_1
  5228  		v.reset(OpMIPSSGTU)
  5229  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5230  		v0.AddArg2(x, y)
  5231  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5232  		v1.AuxInt = int32ToAuxInt(0)
  5233  		v.AddArg2(v0, v1)
  5234  		return true
  5235  	}
  5236  }
  5237  func rewriteValueMIPS_OpNeq32F(v *Value) bool {
  5238  	v_1 := v.Args[1]
  5239  	v_0 := v.Args[0]
  5240  	b := v.Block
  5241  	// match: (Neq32F x y)
  5242  	// result: (FPFlagFalse (CMPEQF x y))
  5243  	for {
  5244  		x := v_0
  5245  		y := v_1
  5246  		v.reset(OpMIPSFPFlagFalse)
  5247  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  5248  		v0.AddArg2(x, y)
  5249  		v.AddArg(v0)
  5250  		return true
  5251  	}
  5252  }
  5253  func rewriteValueMIPS_OpNeq64F(v *Value) bool {
  5254  	v_1 := v.Args[1]
  5255  	v_0 := v.Args[0]
  5256  	b := v.Block
  5257  	// match: (Neq64F x y)
  5258  	// result: (FPFlagFalse (CMPEQD x y))
  5259  	for {
  5260  		x := v_0
  5261  		y := v_1
  5262  		v.reset(OpMIPSFPFlagFalse)
  5263  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  5264  		v0.AddArg2(x, y)
  5265  		v.AddArg(v0)
  5266  		return true
  5267  	}
  5268  }
  5269  func rewriteValueMIPS_OpNeq8(v *Value) bool {
  5270  	v_1 := v.Args[1]
  5271  	v_0 := v.Args[0]
  5272  	b := v.Block
  5273  	typ := &b.Func.Config.Types
  5274  	// match: (Neq8 x y)
  5275  	// result: (SGTU (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)) (MOVWconst [0]))
  5276  	for {
  5277  		x := v_0
  5278  		y := v_1
  5279  		v.reset(OpMIPSSGTU)
  5280  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5281  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5282  		v1.AddArg(x)
  5283  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5284  		v2.AddArg(y)
  5285  		v0.AddArg2(v1, v2)
  5286  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5287  		v3.AuxInt = int32ToAuxInt(0)
  5288  		v.AddArg2(v0, v3)
  5289  		return true
  5290  	}
  5291  }
  5292  func rewriteValueMIPS_OpNeqPtr(v *Value) bool {
  5293  	v_1 := v.Args[1]
  5294  	v_0 := v.Args[0]
  5295  	b := v.Block
  5296  	typ := &b.Func.Config.Types
  5297  	// match: (NeqPtr x y)
  5298  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5299  	for {
  5300  		x := v_0
  5301  		y := v_1
  5302  		v.reset(OpMIPSSGTU)
  5303  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5304  		v0.AddArg2(x, y)
  5305  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5306  		v1.AuxInt = int32ToAuxInt(0)
  5307  		v.AddArg2(v0, v1)
  5308  		return true
  5309  	}
  5310  }
  5311  func rewriteValueMIPS_OpNot(v *Value) bool {
  5312  	v_0 := v.Args[0]
  5313  	// match: (Not x)
  5314  	// result: (XORconst [1] x)
  5315  	for {
  5316  		x := v_0
  5317  		v.reset(OpMIPSXORconst)
  5318  		v.AuxInt = int32ToAuxInt(1)
  5319  		v.AddArg(x)
  5320  		return true
  5321  	}
  5322  }
  5323  func rewriteValueMIPS_OpOffPtr(v *Value) bool {
  5324  	v_0 := v.Args[0]
  5325  	// match: (OffPtr [off] ptr:(SP))
  5326  	// result: (MOVWaddr [int32(off)] ptr)
  5327  	for {
  5328  		off := auxIntToInt64(v.AuxInt)
  5329  		ptr := v_0
  5330  		if ptr.Op != OpSP {
  5331  			break
  5332  		}
  5333  		v.reset(OpMIPSMOVWaddr)
  5334  		v.AuxInt = int32ToAuxInt(int32(off))
  5335  		v.AddArg(ptr)
  5336  		return true
  5337  	}
  5338  	// match: (OffPtr [off] ptr)
  5339  	// result: (ADDconst [int32(off)] ptr)
  5340  	for {
  5341  		off := auxIntToInt64(v.AuxInt)
  5342  		ptr := v_0
  5343  		v.reset(OpMIPSADDconst)
  5344  		v.AuxInt = int32ToAuxInt(int32(off))
  5345  		v.AddArg(ptr)
  5346  		return true
  5347  	}
  5348  }
  5349  func rewriteValueMIPS_OpPanicBounds(v *Value) bool {
  5350  	v_2 := v.Args[2]
  5351  	v_1 := v.Args[1]
  5352  	v_0 := v.Args[0]
  5353  	// match: (PanicBounds [kind] x y mem)
  5354  	// cond: boundsABI(kind) == 0
  5355  	// result: (LoweredPanicBoundsA [kind] x y mem)
  5356  	for {
  5357  		kind := auxIntToInt64(v.AuxInt)
  5358  		x := v_0
  5359  		y := v_1
  5360  		mem := v_2
  5361  		if !(boundsABI(kind) == 0) {
  5362  			break
  5363  		}
  5364  		v.reset(OpMIPSLoweredPanicBoundsA)
  5365  		v.AuxInt = int64ToAuxInt(kind)
  5366  		v.AddArg3(x, y, mem)
  5367  		return true
  5368  	}
  5369  	// match: (PanicBounds [kind] x y mem)
  5370  	// cond: boundsABI(kind) == 1
  5371  	// result: (LoweredPanicBoundsB [kind] x y mem)
  5372  	for {
  5373  		kind := auxIntToInt64(v.AuxInt)
  5374  		x := v_0
  5375  		y := v_1
  5376  		mem := v_2
  5377  		if !(boundsABI(kind) == 1) {
  5378  			break
  5379  		}
  5380  		v.reset(OpMIPSLoweredPanicBoundsB)
  5381  		v.AuxInt = int64ToAuxInt(kind)
  5382  		v.AddArg3(x, y, mem)
  5383  		return true
  5384  	}
  5385  	// match: (PanicBounds [kind] x y mem)
  5386  	// cond: boundsABI(kind) == 2
  5387  	// result: (LoweredPanicBoundsC [kind] x y mem)
  5388  	for {
  5389  		kind := auxIntToInt64(v.AuxInt)
  5390  		x := v_0
  5391  		y := v_1
  5392  		mem := v_2
  5393  		if !(boundsABI(kind) == 2) {
  5394  			break
  5395  		}
  5396  		v.reset(OpMIPSLoweredPanicBoundsC)
  5397  		v.AuxInt = int64ToAuxInt(kind)
  5398  		v.AddArg3(x, y, mem)
  5399  		return true
  5400  	}
  5401  	return false
  5402  }
  5403  func rewriteValueMIPS_OpPanicExtend(v *Value) bool {
  5404  	v_3 := v.Args[3]
  5405  	v_2 := v.Args[2]
  5406  	v_1 := v.Args[1]
  5407  	v_0 := v.Args[0]
  5408  	// match: (PanicExtend [kind] hi lo y mem)
  5409  	// cond: boundsABI(kind) == 0
  5410  	// result: (LoweredPanicExtendA [kind] hi lo y mem)
  5411  	for {
  5412  		kind := auxIntToInt64(v.AuxInt)
  5413  		hi := v_0
  5414  		lo := v_1
  5415  		y := v_2
  5416  		mem := v_3
  5417  		if !(boundsABI(kind) == 0) {
  5418  			break
  5419  		}
  5420  		v.reset(OpMIPSLoweredPanicExtendA)
  5421  		v.AuxInt = int64ToAuxInt(kind)
  5422  		v.AddArg4(hi, lo, y, mem)
  5423  		return true
  5424  	}
  5425  	// match: (PanicExtend [kind] hi lo y mem)
  5426  	// cond: boundsABI(kind) == 1
  5427  	// result: (LoweredPanicExtendB [kind] hi lo y mem)
  5428  	for {
  5429  		kind := auxIntToInt64(v.AuxInt)
  5430  		hi := v_0
  5431  		lo := v_1
  5432  		y := v_2
  5433  		mem := v_3
  5434  		if !(boundsABI(kind) == 1) {
  5435  			break
  5436  		}
  5437  		v.reset(OpMIPSLoweredPanicExtendB)
  5438  		v.AuxInt = int64ToAuxInt(kind)
  5439  		v.AddArg4(hi, lo, y, mem)
  5440  		return true
  5441  	}
  5442  	// match: (PanicExtend [kind] hi lo y mem)
  5443  	// cond: boundsABI(kind) == 2
  5444  	// result: (LoweredPanicExtendC [kind] hi lo y mem)
  5445  	for {
  5446  		kind := auxIntToInt64(v.AuxInt)
  5447  		hi := v_0
  5448  		lo := v_1
  5449  		y := v_2
  5450  		mem := v_3
  5451  		if !(boundsABI(kind) == 2) {
  5452  			break
  5453  		}
  5454  		v.reset(OpMIPSLoweredPanicExtendC)
  5455  		v.AuxInt = int64ToAuxInt(kind)
  5456  		v.AddArg4(hi, lo, y, mem)
  5457  		return true
  5458  	}
  5459  	return false
  5460  }
  5461  func rewriteValueMIPS_OpRotateLeft16(v *Value) bool {
  5462  	v_1 := v.Args[1]
  5463  	v_0 := v.Args[0]
  5464  	b := v.Block
  5465  	typ := &b.Func.Config.Types
  5466  	// match: (RotateLeft16 <t> x (MOVWconst [c]))
  5467  	// result: (Or16 (Lsh16x32 <t> x (MOVWconst [c&15])) (Rsh16Ux32 <t> x (MOVWconst [-c&15])))
  5468  	for {
  5469  		t := v.Type
  5470  		x := v_0
  5471  		if v_1.Op != OpMIPSMOVWconst {
  5472  			break
  5473  		}
  5474  		c := auxIntToInt32(v_1.AuxInt)
  5475  		v.reset(OpOr16)
  5476  		v0 := b.NewValue0(v.Pos, OpLsh16x32, t)
  5477  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5478  		v1.AuxInt = int32ToAuxInt(c & 15)
  5479  		v0.AddArg2(x, v1)
  5480  		v2 := b.NewValue0(v.Pos, OpRsh16Ux32, t)
  5481  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5482  		v3.AuxInt = int32ToAuxInt(-c & 15)
  5483  		v2.AddArg2(x, v3)
  5484  		v.AddArg2(v0, v2)
  5485  		return true
  5486  	}
  5487  	return false
  5488  }
  5489  func rewriteValueMIPS_OpRotateLeft32(v *Value) bool {
  5490  	v_1 := v.Args[1]
  5491  	v_0 := v.Args[0]
  5492  	b := v.Block
  5493  	typ := &b.Func.Config.Types
  5494  	// match: (RotateLeft32 <t> x (MOVWconst [c]))
  5495  	// result: (Or32 (Lsh32x32 <t> x (MOVWconst [c&31])) (Rsh32Ux32 <t> x (MOVWconst [-c&31])))
  5496  	for {
  5497  		t := v.Type
  5498  		x := v_0
  5499  		if v_1.Op != OpMIPSMOVWconst {
  5500  			break
  5501  		}
  5502  		c := auxIntToInt32(v_1.AuxInt)
  5503  		v.reset(OpOr32)
  5504  		v0 := b.NewValue0(v.Pos, OpLsh32x32, t)
  5505  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5506  		v1.AuxInt = int32ToAuxInt(c & 31)
  5507  		v0.AddArg2(x, v1)
  5508  		v2 := b.NewValue0(v.Pos, OpRsh32Ux32, t)
  5509  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5510  		v3.AuxInt = int32ToAuxInt(-c & 31)
  5511  		v2.AddArg2(x, v3)
  5512  		v.AddArg2(v0, v2)
  5513  		return true
  5514  	}
  5515  	return false
  5516  }
  5517  func rewriteValueMIPS_OpRotateLeft64(v *Value) bool {
  5518  	v_1 := v.Args[1]
  5519  	v_0 := v.Args[0]
  5520  	b := v.Block
  5521  	typ := &b.Func.Config.Types
  5522  	// match: (RotateLeft64 <t> x (MOVWconst [c]))
  5523  	// result: (Or64 (Lsh64x32 <t> x (MOVWconst [c&63])) (Rsh64Ux32 <t> x (MOVWconst [-c&63])))
  5524  	for {
  5525  		t := v.Type
  5526  		x := v_0
  5527  		if v_1.Op != OpMIPSMOVWconst {
  5528  			break
  5529  		}
  5530  		c := auxIntToInt32(v_1.AuxInt)
  5531  		v.reset(OpOr64)
  5532  		v0 := b.NewValue0(v.Pos, OpLsh64x32, t)
  5533  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5534  		v1.AuxInt = int32ToAuxInt(c & 63)
  5535  		v0.AddArg2(x, v1)
  5536  		v2 := b.NewValue0(v.Pos, OpRsh64Ux32, t)
  5537  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5538  		v3.AuxInt = int32ToAuxInt(-c & 63)
  5539  		v2.AddArg2(x, v3)
  5540  		v.AddArg2(v0, v2)
  5541  		return true
  5542  	}
  5543  	return false
  5544  }
  5545  func rewriteValueMIPS_OpRotateLeft8(v *Value) bool {
  5546  	v_1 := v.Args[1]
  5547  	v_0 := v.Args[0]
  5548  	b := v.Block
  5549  	typ := &b.Func.Config.Types
  5550  	// match: (RotateLeft8 <t> x (MOVWconst [c]))
  5551  	// result: (Or8 (Lsh8x32 <t> x (MOVWconst [c&7])) (Rsh8Ux32 <t> x (MOVWconst [-c&7])))
  5552  	for {
  5553  		t := v.Type
  5554  		x := v_0
  5555  		if v_1.Op != OpMIPSMOVWconst {
  5556  			break
  5557  		}
  5558  		c := auxIntToInt32(v_1.AuxInt)
  5559  		v.reset(OpOr8)
  5560  		v0 := b.NewValue0(v.Pos, OpLsh8x32, t)
  5561  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5562  		v1.AuxInt = int32ToAuxInt(c & 7)
  5563  		v0.AddArg2(x, v1)
  5564  		v2 := b.NewValue0(v.Pos, OpRsh8Ux32, t)
  5565  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5566  		v3.AuxInt = int32ToAuxInt(-c & 7)
  5567  		v2.AddArg2(x, v3)
  5568  		v.AddArg2(v0, v2)
  5569  		return true
  5570  	}
  5571  	return false
  5572  }
  5573  func rewriteValueMIPS_OpRsh16Ux16(v *Value) bool {
  5574  	v_1 := v.Args[1]
  5575  	v_0 := v.Args[0]
  5576  	b := v.Block
  5577  	typ := &b.Func.Config.Types
  5578  	// match: (Rsh16Ux16 <t> x y)
  5579  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  5580  	for {
  5581  		t := v.Type
  5582  		x := v_0
  5583  		y := v_1
  5584  		v.reset(OpMIPSCMOVZ)
  5585  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5586  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5587  		v1.AddArg(x)
  5588  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5589  		v2.AddArg(y)
  5590  		v0.AddArg2(v1, v2)
  5591  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5592  		v3.AuxInt = int32ToAuxInt(0)
  5593  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5594  		v4.AuxInt = int32ToAuxInt(32)
  5595  		v4.AddArg(v2)
  5596  		v.AddArg3(v0, v3, v4)
  5597  		return true
  5598  	}
  5599  }
  5600  func rewriteValueMIPS_OpRsh16Ux32(v *Value) bool {
  5601  	v_1 := v.Args[1]
  5602  	v_0 := v.Args[0]
  5603  	b := v.Block
  5604  	typ := &b.Func.Config.Types
  5605  	// match: (Rsh16Ux32 <t> x y)
  5606  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  5607  	for {
  5608  		t := v.Type
  5609  		x := v_0
  5610  		y := v_1
  5611  		v.reset(OpMIPSCMOVZ)
  5612  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5613  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5614  		v1.AddArg(x)
  5615  		v0.AddArg2(v1, y)
  5616  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5617  		v2.AuxInt = int32ToAuxInt(0)
  5618  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5619  		v3.AuxInt = int32ToAuxInt(32)
  5620  		v3.AddArg(y)
  5621  		v.AddArg3(v0, v2, v3)
  5622  		return true
  5623  	}
  5624  }
  5625  func rewriteValueMIPS_OpRsh16Ux64(v *Value) bool {
  5626  	v_1 := v.Args[1]
  5627  	v_0 := v.Args[0]
  5628  	b := v.Block
  5629  	typ := &b.Func.Config.Types
  5630  	// match: (Rsh16Ux64 x (Const64 [c]))
  5631  	// cond: uint32(c) < 16
  5632  	// result: (SRLconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5633  	for {
  5634  		x := v_0
  5635  		if v_1.Op != OpConst64 {
  5636  			break
  5637  		}
  5638  		c := auxIntToInt64(v_1.AuxInt)
  5639  		if !(uint32(c) < 16) {
  5640  			break
  5641  		}
  5642  		v.reset(OpMIPSSRLconst)
  5643  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  5644  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5645  		v0.AuxInt = int32ToAuxInt(16)
  5646  		v0.AddArg(x)
  5647  		v.AddArg(v0)
  5648  		return true
  5649  	}
  5650  	// match: (Rsh16Ux64 _ (Const64 [c]))
  5651  	// cond: uint32(c) >= 16
  5652  	// result: (MOVWconst [0])
  5653  	for {
  5654  		if v_1.Op != OpConst64 {
  5655  			break
  5656  		}
  5657  		c := auxIntToInt64(v_1.AuxInt)
  5658  		if !(uint32(c) >= 16) {
  5659  			break
  5660  		}
  5661  		v.reset(OpMIPSMOVWconst)
  5662  		v.AuxInt = int32ToAuxInt(0)
  5663  		return true
  5664  	}
  5665  	return false
  5666  }
  5667  func rewriteValueMIPS_OpRsh16Ux8(v *Value) bool {
  5668  	v_1 := v.Args[1]
  5669  	v_0 := v.Args[0]
  5670  	b := v.Block
  5671  	typ := &b.Func.Config.Types
  5672  	// match: (Rsh16Ux8 <t> x y)
  5673  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  5674  	for {
  5675  		t := v.Type
  5676  		x := v_0
  5677  		y := v_1
  5678  		v.reset(OpMIPSCMOVZ)
  5679  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5680  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5681  		v1.AddArg(x)
  5682  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5683  		v2.AddArg(y)
  5684  		v0.AddArg2(v1, v2)
  5685  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5686  		v3.AuxInt = int32ToAuxInt(0)
  5687  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5688  		v4.AuxInt = int32ToAuxInt(32)
  5689  		v4.AddArg(v2)
  5690  		v.AddArg3(v0, v3, v4)
  5691  		return true
  5692  	}
  5693  }
  5694  func rewriteValueMIPS_OpRsh16x16(v *Value) bool {
  5695  	v_1 := v.Args[1]
  5696  	v_0 := v.Args[0]
  5697  	b := v.Block
  5698  	typ := &b.Func.Config.Types
  5699  	// match: (Rsh16x16 x y)
  5700  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  5701  	for {
  5702  		x := v_0
  5703  		y := v_1
  5704  		v.reset(OpMIPSSRA)
  5705  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5706  		v0.AddArg(x)
  5707  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5708  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5709  		v2.AddArg(y)
  5710  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5711  		v3.AuxInt = int32ToAuxInt(31)
  5712  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5713  		v4.AuxInt = int32ToAuxInt(32)
  5714  		v4.AddArg(v2)
  5715  		v1.AddArg3(v2, v3, v4)
  5716  		v.AddArg2(v0, v1)
  5717  		return true
  5718  	}
  5719  }
  5720  func rewriteValueMIPS_OpRsh16x32(v *Value) bool {
  5721  	v_1 := v.Args[1]
  5722  	v_0 := v.Args[0]
  5723  	b := v.Block
  5724  	typ := &b.Func.Config.Types
  5725  	// match: (Rsh16x32 x y)
  5726  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  5727  	for {
  5728  		x := v_0
  5729  		y := v_1
  5730  		v.reset(OpMIPSSRA)
  5731  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5732  		v0.AddArg(x)
  5733  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5734  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5735  		v2.AuxInt = int32ToAuxInt(31)
  5736  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5737  		v3.AuxInt = int32ToAuxInt(32)
  5738  		v3.AddArg(y)
  5739  		v1.AddArg3(y, v2, v3)
  5740  		v.AddArg2(v0, v1)
  5741  		return true
  5742  	}
  5743  }
  5744  func rewriteValueMIPS_OpRsh16x64(v *Value) bool {
  5745  	v_1 := v.Args[1]
  5746  	v_0 := v.Args[0]
  5747  	b := v.Block
  5748  	typ := &b.Func.Config.Types
  5749  	// match: (Rsh16x64 x (Const64 [c]))
  5750  	// cond: uint32(c) < 16
  5751  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5752  	for {
  5753  		x := v_0
  5754  		if v_1.Op != OpConst64 {
  5755  			break
  5756  		}
  5757  		c := auxIntToInt64(v_1.AuxInt)
  5758  		if !(uint32(c) < 16) {
  5759  			break
  5760  		}
  5761  		v.reset(OpMIPSSRAconst)
  5762  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  5763  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5764  		v0.AuxInt = int32ToAuxInt(16)
  5765  		v0.AddArg(x)
  5766  		v.AddArg(v0)
  5767  		return true
  5768  	}
  5769  	// match: (Rsh16x64 x (Const64 [c]))
  5770  	// cond: uint32(c) >= 16
  5771  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [31])
  5772  	for {
  5773  		x := v_0
  5774  		if v_1.Op != OpConst64 {
  5775  			break
  5776  		}
  5777  		c := auxIntToInt64(v_1.AuxInt)
  5778  		if !(uint32(c) >= 16) {
  5779  			break
  5780  		}
  5781  		v.reset(OpMIPSSRAconst)
  5782  		v.AuxInt = int32ToAuxInt(31)
  5783  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5784  		v0.AuxInt = int32ToAuxInt(16)
  5785  		v0.AddArg(x)
  5786  		v.AddArg(v0)
  5787  		return true
  5788  	}
  5789  	return false
  5790  }
  5791  func rewriteValueMIPS_OpRsh16x8(v *Value) bool {
  5792  	v_1 := v.Args[1]
  5793  	v_0 := v.Args[0]
  5794  	b := v.Block
  5795  	typ := &b.Func.Config.Types
  5796  	// match: (Rsh16x8 x y)
  5797  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  5798  	for {
  5799  		x := v_0
  5800  		y := v_1
  5801  		v.reset(OpMIPSSRA)
  5802  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5803  		v0.AddArg(x)
  5804  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5805  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5806  		v2.AddArg(y)
  5807  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5808  		v3.AuxInt = int32ToAuxInt(31)
  5809  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5810  		v4.AuxInt = int32ToAuxInt(32)
  5811  		v4.AddArg(v2)
  5812  		v1.AddArg3(v2, v3, v4)
  5813  		v.AddArg2(v0, v1)
  5814  		return true
  5815  	}
  5816  }
  5817  func rewriteValueMIPS_OpRsh32Ux16(v *Value) bool {
  5818  	v_1 := v.Args[1]
  5819  	v_0 := v.Args[0]
  5820  	b := v.Block
  5821  	typ := &b.Func.Config.Types
  5822  	// match: (Rsh32Ux16 <t> x y)
  5823  	// result: (CMOVZ (SRL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  5824  	for {
  5825  		t := v.Type
  5826  		x := v_0
  5827  		y := v_1
  5828  		v.reset(OpMIPSCMOVZ)
  5829  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5830  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5831  		v1.AddArg(y)
  5832  		v0.AddArg2(x, v1)
  5833  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5834  		v2.AuxInt = int32ToAuxInt(0)
  5835  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5836  		v3.AuxInt = int32ToAuxInt(32)
  5837  		v3.AddArg(v1)
  5838  		v.AddArg3(v0, v2, v3)
  5839  		return true
  5840  	}
  5841  }
  5842  func rewriteValueMIPS_OpRsh32Ux32(v *Value) bool {
  5843  	v_1 := v.Args[1]
  5844  	v_0 := v.Args[0]
  5845  	b := v.Block
  5846  	typ := &b.Func.Config.Types
  5847  	// match: (Rsh32Ux32 <t> x y)
  5848  	// result: (CMOVZ (SRL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  5849  	for {
  5850  		t := v.Type
  5851  		x := v_0
  5852  		y := v_1
  5853  		v.reset(OpMIPSCMOVZ)
  5854  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5855  		v0.AddArg2(x, y)
  5856  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5857  		v1.AuxInt = int32ToAuxInt(0)
  5858  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5859  		v2.AuxInt = int32ToAuxInt(32)
  5860  		v2.AddArg(y)
  5861  		v.AddArg3(v0, v1, v2)
  5862  		return true
  5863  	}
  5864  }
  5865  func rewriteValueMIPS_OpRsh32Ux64(v *Value) bool {
  5866  	v_1 := v.Args[1]
  5867  	v_0 := v.Args[0]
  5868  	// match: (Rsh32Ux64 x (Const64 [c]))
  5869  	// cond: uint32(c) < 32
  5870  	// result: (SRLconst x [int32(c)])
  5871  	for {
  5872  		x := v_0
  5873  		if v_1.Op != OpConst64 {
  5874  			break
  5875  		}
  5876  		c := auxIntToInt64(v_1.AuxInt)
  5877  		if !(uint32(c) < 32) {
  5878  			break
  5879  		}
  5880  		v.reset(OpMIPSSRLconst)
  5881  		v.AuxInt = int32ToAuxInt(int32(c))
  5882  		v.AddArg(x)
  5883  		return true
  5884  	}
  5885  	// match: (Rsh32Ux64 _ (Const64 [c]))
  5886  	// cond: uint32(c) >= 32
  5887  	// result: (MOVWconst [0])
  5888  	for {
  5889  		if v_1.Op != OpConst64 {
  5890  			break
  5891  		}
  5892  		c := auxIntToInt64(v_1.AuxInt)
  5893  		if !(uint32(c) >= 32) {
  5894  			break
  5895  		}
  5896  		v.reset(OpMIPSMOVWconst)
  5897  		v.AuxInt = int32ToAuxInt(0)
  5898  		return true
  5899  	}
  5900  	return false
  5901  }
  5902  func rewriteValueMIPS_OpRsh32Ux8(v *Value) bool {
  5903  	v_1 := v.Args[1]
  5904  	v_0 := v.Args[0]
  5905  	b := v.Block
  5906  	typ := &b.Func.Config.Types
  5907  	// match: (Rsh32Ux8 <t> x y)
  5908  	// result: (CMOVZ (SRL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  5909  	for {
  5910  		t := v.Type
  5911  		x := v_0
  5912  		y := v_1
  5913  		v.reset(OpMIPSCMOVZ)
  5914  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5915  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5916  		v1.AddArg(y)
  5917  		v0.AddArg2(x, v1)
  5918  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5919  		v2.AuxInt = int32ToAuxInt(0)
  5920  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5921  		v3.AuxInt = int32ToAuxInt(32)
  5922  		v3.AddArg(v1)
  5923  		v.AddArg3(v0, v2, v3)
  5924  		return true
  5925  	}
  5926  }
  5927  func rewriteValueMIPS_OpRsh32x16(v *Value) bool {
  5928  	v_1 := v.Args[1]
  5929  	v_0 := v.Args[0]
  5930  	b := v.Block
  5931  	typ := &b.Func.Config.Types
  5932  	// match: (Rsh32x16 x y)
  5933  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  5934  	for {
  5935  		x := v_0
  5936  		y := v_1
  5937  		v.reset(OpMIPSSRA)
  5938  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5939  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5940  		v1.AddArg(y)
  5941  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5942  		v2.AuxInt = int32ToAuxInt(31)
  5943  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5944  		v3.AuxInt = int32ToAuxInt(32)
  5945  		v3.AddArg(v1)
  5946  		v0.AddArg3(v1, v2, v3)
  5947  		v.AddArg2(x, v0)
  5948  		return true
  5949  	}
  5950  }
  5951  func rewriteValueMIPS_OpRsh32x32(v *Value) bool {
  5952  	v_1 := v.Args[1]
  5953  	v_0 := v.Args[0]
  5954  	b := v.Block
  5955  	typ := &b.Func.Config.Types
  5956  	// match: (Rsh32x32 x y)
  5957  	// result: (SRA x ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  5958  	for {
  5959  		x := v_0
  5960  		y := v_1
  5961  		v.reset(OpMIPSSRA)
  5962  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5963  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5964  		v1.AuxInt = int32ToAuxInt(31)
  5965  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5966  		v2.AuxInt = int32ToAuxInt(32)
  5967  		v2.AddArg(y)
  5968  		v0.AddArg3(y, v1, v2)
  5969  		v.AddArg2(x, v0)
  5970  		return true
  5971  	}
  5972  }
  5973  func rewriteValueMIPS_OpRsh32x64(v *Value) bool {
  5974  	v_1 := v.Args[1]
  5975  	v_0 := v.Args[0]
  5976  	// match: (Rsh32x64 x (Const64 [c]))
  5977  	// cond: uint32(c) < 32
  5978  	// result: (SRAconst x [int32(c)])
  5979  	for {
  5980  		x := v_0
  5981  		if v_1.Op != OpConst64 {
  5982  			break
  5983  		}
  5984  		c := auxIntToInt64(v_1.AuxInt)
  5985  		if !(uint32(c) < 32) {
  5986  			break
  5987  		}
  5988  		v.reset(OpMIPSSRAconst)
  5989  		v.AuxInt = int32ToAuxInt(int32(c))
  5990  		v.AddArg(x)
  5991  		return true
  5992  	}
  5993  	// match: (Rsh32x64 x (Const64 [c]))
  5994  	// cond: uint32(c) >= 32
  5995  	// result: (SRAconst x [31])
  5996  	for {
  5997  		x := v_0
  5998  		if v_1.Op != OpConst64 {
  5999  			break
  6000  		}
  6001  		c := auxIntToInt64(v_1.AuxInt)
  6002  		if !(uint32(c) >= 32) {
  6003  			break
  6004  		}
  6005  		v.reset(OpMIPSSRAconst)
  6006  		v.AuxInt = int32ToAuxInt(31)
  6007  		v.AddArg(x)
  6008  		return true
  6009  	}
  6010  	return false
  6011  }
  6012  func rewriteValueMIPS_OpRsh32x8(v *Value) bool {
  6013  	v_1 := v.Args[1]
  6014  	v_0 := v.Args[0]
  6015  	b := v.Block
  6016  	typ := &b.Func.Config.Types
  6017  	// match: (Rsh32x8 x y)
  6018  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6019  	for {
  6020  		x := v_0
  6021  		y := v_1
  6022  		v.reset(OpMIPSSRA)
  6023  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6024  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6025  		v1.AddArg(y)
  6026  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6027  		v2.AuxInt = int32ToAuxInt(31)
  6028  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6029  		v3.AuxInt = int32ToAuxInt(32)
  6030  		v3.AddArg(v1)
  6031  		v0.AddArg3(v1, v2, v3)
  6032  		v.AddArg2(x, v0)
  6033  		return true
  6034  	}
  6035  }
  6036  func rewriteValueMIPS_OpRsh8Ux16(v *Value) bool {
  6037  	v_1 := v.Args[1]
  6038  	v_0 := v.Args[0]
  6039  	b := v.Block
  6040  	typ := &b.Func.Config.Types
  6041  	// match: (Rsh8Ux16 <t> x y)
  6042  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  6043  	for {
  6044  		t := v.Type
  6045  		x := v_0
  6046  		y := v_1
  6047  		v.reset(OpMIPSCMOVZ)
  6048  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6049  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6050  		v1.AddArg(x)
  6051  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6052  		v2.AddArg(y)
  6053  		v0.AddArg2(v1, v2)
  6054  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6055  		v3.AuxInt = int32ToAuxInt(0)
  6056  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6057  		v4.AuxInt = int32ToAuxInt(32)
  6058  		v4.AddArg(v2)
  6059  		v.AddArg3(v0, v3, v4)
  6060  		return true
  6061  	}
  6062  }
  6063  func rewriteValueMIPS_OpRsh8Ux32(v *Value) bool {
  6064  	v_1 := v.Args[1]
  6065  	v_0 := v.Args[0]
  6066  	b := v.Block
  6067  	typ := &b.Func.Config.Types
  6068  	// match: (Rsh8Ux32 <t> x y)
  6069  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  6070  	for {
  6071  		t := v.Type
  6072  		x := v_0
  6073  		y := v_1
  6074  		v.reset(OpMIPSCMOVZ)
  6075  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6076  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6077  		v1.AddArg(x)
  6078  		v0.AddArg2(v1, y)
  6079  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6080  		v2.AuxInt = int32ToAuxInt(0)
  6081  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6082  		v3.AuxInt = int32ToAuxInt(32)
  6083  		v3.AddArg(y)
  6084  		v.AddArg3(v0, v2, v3)
  6085  		return true
  6086  	}
  6087  }
  6088  func rewriteValueMIPS_OpRsh8Ux64(v *Value) bool {
  6089  	v_1 := v.Args[1]
  6090  	v_0 := v.Args[0]
  6091  	b := v.Block
  6092  	typ := &b.Func.Config.Types
  6093  	// match: (Rsh8Ux64 x (Const64 [c]))
  6094  	// cond: uint32(c) < 8
  6095  	// result: (SRLconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6096  	for {
  6097  		x := v_0
  6098  		if v_1.Op != OpConst64 {
  6099  			break
  6100  		}
  6101  		c := auxIntToInt64(v_1.AuxInt)
  6102  		if !(uint32(c) < 8) {
  6103  			break
  6104  		}
  6105  		v.reset(OpMIPSSRLconst)
  6106  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6107  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6108  		v0.AuxInt = int32ToAuxInt(24)
  6109  		v0.AddArg(x)
  6110  		v.AddArg(v0)
  6111  		return true
  6112  	}
  6113  	// match: (Rsh8Ux64 _ (Const64 [c]))
  6114  	// cond: uint32(c) >= 8
  6115  	// result: (MOVWconst [0])
  6116  	for {
  6117  		if v_1.Op != OpConst64 {
  6118  			break
  6119  		}
  6120  		c := auxIntToInt64(v_1.AuxInt)
  6121  		if !(uint32(c) >= 8) {
  6122  			break
  6123  		}
  6124  		v.reset(OpMIPSMOVWconst)
  6125  		v.AuxInt = int32ToAuxInt(0)
  6126  		return true
  6127  	}
  6128  	return false
  6129  }
  6130  func rewriteValueMIPS_OpRsh8Ux8(v *Value) bool {
  6131  	v_1 := v.Args[1]
  6132  	v_0 := v.Args[0]
  6133  	b := v.Block
  6134  	typ := &b.Func.Config.Types
  6135  	// match: (Rsh8Ux8 <t> x y)
  6136  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  6137  	for {
  6138  		t := v.Type
  6139  		x := v_0
  6140  		y := v_1
  6141  		v.reset(OpMIPSCMOVZ)
  6142  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6143  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6144  		v1.AddArg(x)
  6145  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6146  		v2.AddArg(y)
  6147  		v0.AddArg2(v1, v2)
  6148  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6149  		v3.AuxInt = int32ToAuxInt(0)
  6150  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6151  		v4.AuxInt = int32ToAuxInt(32)
  6152  		v4.AddArg(v2)
  6153  		v.AddArg3(v0, v3, v4)
  6154  		return true
  6155  	}
  6156  }
  6157  func rewriteValueMIPS_OpRsh8x16(v *Value) bool {
  6158  	v_1 := v.Args[1]
  6159  	v_0 := v.Args[0]
  6160  	b := v.Block
  6161  	typ := &b.Func.Config.Types
  6162  	// match: (Rsh8x16 x y)
  6163  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  6164  	for {
  6165  		x := v_0
  6166  		y := v_1
  6167  		v.reset(OpMIPSSRA)
  6168  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6169  		v0.AddArg(x)
  6170  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6171  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6172  		v2.AddArg(y)
  6173  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6174  		v3.AuxInt = int32ToAuxInt(31)
  6175  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6176  		v4.AuxInt = int32ToAuxInt(32)
  6177  		v4.AddArg(v2)
  6178  		v1.AddArg3(v2, v3, v4)
  6179  		v.AddArg2(v0, v1)
  6180  		return true
  6181  	}
  6182  }
  6183  func rewriteValueMIPS_OpRsh8x32(v *Value) bool {
  6184  	v_1 := v.Args[1]
  6185  	v_0 := v.Args[0]
  6186  	b := v.Block
  6187  	typ := &b.Func.Config.Types
  6188  	// match: (Rsh8x32 x y)
  6189  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  6190  	for {
  6191  		x := v_0
  6192  		y := v_1
  6193  		v.reset(OpMIPSSRA)
  6194  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6195  		v0.AddArg(x)
  6196  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6197  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6198  		v2.AuxInt = int32ToAuxInt(31)
  6199  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6200  		v3.AuxInt = int32ToAuxInt(32)
  6201  		v3.AddArg(y)
  6202  		v1.AddArg3(y, v2, v3)
  6203  		v.AddArg2(v0, v1)
  6204  		return true
  6205  	}
  6206  }
  6207  func rewriteValueMIPS_OpRsh8x64(v *Value) bool {
  6208  	v_1 := v.Args[1]
  6209  	v_0 := v.Args[0]
  6210  	b := v.Block
  6211  	typ := &b.Func.Config.Types
  6212  	// match: (Rsh8x64 x (Const64 [c]))
  6213  	// cond: uint32(c) < 8
  6214  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6215  	for {
  6216  		x := v_0
  6217  		if v_1.Op != OpConst64 {
  6218  			break
  6219  		}
  6220  		c := auxIntToInt64(v_1.AuxInt)
  6221  		if !(uint32(c) < 8) {
  6222  			break
  6223  		}
  6224  		v.reset(OpMIPSSRAconst)
  6225  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6226  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6227  		v0.AuxInt = int32ToAuxInt(24)
  6228  		v0.AddArg(x)
  6229  		v.AddArg(v0)
  6230  		return true
  6231  	}
  6232  	// match: (Rsh8x64 x (Const64 [c]))
  6233  	// cond: uint32(c) >= 8
  6234  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [31])
  6235  	for {
  6236  		x := v_0
  6237  		if v_1.Op != OpConst64 {
  6238  			break
  6239  		}
  6240  		c := auxIntToInt64(v_1.AuxInt)
  6241  		if !(uint32(c) >= 8) {
  6242  			break
  6243  		}
  6244  		v.reset(OpMIPSSRAconst)
  6245  		v.AuxInt = int32ToAuxInt(31)
  6246  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6247  		v0.AuxInt = int32ToAuxInt(24)
  6248  		v0.AddArg(x)
  6249  		v.AddArg(v0)
  6250  		return true
  6251  	}
  6252  	return false
  6253  }
  6254  func rewriteValueMIPS_OpRsh8x8(v *Value) bool {
  6255  	v_1 := v.Args[1]
  6256  	v_0 := v.Args[0]
  6257  	b := v.Block
  6258  	typ := &b.Func.Config.Types
  6259  	// match: (Rsh8x8 x y)
  6260  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6261  	for {
  6262  		x := v_0
  6263  		y := v_1
  6264  		v.reset(OpMIPSSRA)
  6265  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6266  		v0.AddArg(x)
  6267  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6268  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6269  		v2.AddArg(y)
  6270  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6271  		v3.AuxInt = int32ToAuxInt(31)
  6272  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6273  		v4.AuxInt = int32ToAuxInt(32)
  6274  		v4.AddArg(v2)
  6275  		v1.AddArg3(v2, v3, v4)
  6276  		v.AddArg2(v0, v1)
  6277  		return true
  6278  	}
  6279  }
  6280  func rewriteValueMIPS_OpSelect0(v *Value) bool {
  6281  	v_0 := v.Args[0]
  6282  	b := v.Block
  6283  	typ := &b.Func.Config.Types
  6284  	// match: (Select0 (Add32carry <t> x y))
  6285  	// result: (ADD <t.FieldType(0)> x y)
  6286  	for {
  6287  		if v_0.Op != OpAdd32carry {
  6288  			break
  6289  		}
  6290  		t := v_0.Type
  6291  		y := v_0.Args[1]
  6292  		x := v_0.Args[0]
  6293  		v.reset(OpMIPSADD)
  6294  		v.Type = t.FieldType(0)
  6295  		v.AddArg2(x, y)
  6296  		return true
  6297  	}
  6298  	// match: (Select0 (Sub32carry <t> x y))
  6299  	// result: (SUB <t.FieldType(0)> x y)
  6300  	for {
  6301  		if v_0.Op != OpSub32carry {
  6302  			break
  6303  		}
  6304  		t := v_0.Type
  6305  		y := v_0.Args[1]
  6306  		x := v_0.Args[0]
  6307  		v.reset(OpMIPSSUB)
  6308  		v.Type = t.FieldType(0)
  6309  		v.AddArg2(x, y)
  6310  		return true
  6311  	}
  6312  	// match: (Select0 (MULTU (MOVWconst [0]) _ ))
  6313  	// result: (MOVWconst [0])
  6314  	for {
  6315  		if v_0.Op != OpMIPSMULTU {
  6316  			break
  6317  		}
  6318  		v_0_0 := v_0.Args[0]
  6319  		v_0_1 := v_0.Args[1]
  6320  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6321  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6322  				continue
  6323  			}
  6324  			v.reset(OpMIPSMOVWconst)
  6325  			v.AuxInt = int32ToAuxInt(0)
  6326  			return true
  6327  		}
  6328  		break
  6329  	}
  6330  	// match: (Select0 (MULTU (MOVWconst [1]) _ ))
  6331  	// result: (MOVWconst [0])
  6332  	for {
  6333  		if v_0.Op != OpMIPSMULTU {
  6334  			break
  6335  		}
  6336  		v_0_0 := v_0.Args[0]
  6337  		v_0_1 := v_0.Args[1]
  6338  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6339  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6340  				continue
  6341  			}
  6342  			v.reset(OpMIPSMOVWconst)
  6343  			v.AuxInt = int32ToAuxInt(0)
  6344  			return true
  6345  		}
  6346  		break
  6347  	}
  6348  	// match: (Select0 (MULTU (MOVWconst [-1]) x ))
  6349  	// result: (CMOVZ (ADDconst <x.Type> [-1] x) (MOVWconst [0]) x)
  6350  	for {
  6351  		if v_0.Op != OpMIPSMULTU {
  6352  			break
  6353  		}
  6354  		_ = v_0.Args[1]
  6355  		v_0_0 := v_0.Args[0]
  6356  		v_0_1 := v_0.Args[1]
  6357  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6358  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6359  				continue
  6360  			}
  6361  			x := v_0_1
  6362  			v.reset(OpMIPSCMOVZ)
  6363  			v0 := b.NewValue0(v.Pos, OpMIPSADDconst, x.Type)
  6364  			v0.AuxInt = int32ToAuxInt(-1)
  6365  			v0.AddArg(x)
  6366  			v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6367  			v1.AuxInt = int32ToAuxInt(0)
  6368  			v.AddArg3(v0, v1, x)
  6369  			return true
  6370  		}
  6371  		break
  6372  	}
  6373  	// match: (Select0 (MULTU (MOVWconst [c]) x ))
  6374  	// cond: isPowerOfTwo64(int64(uint32(c)))
  6375  	// result: (SRLconst [int32(32-log2uint32(int64(c)))] x)
  6376  	for {
  6377  		if v_0.Op != OpMIPSMULTU {
  6378  			break
  6379  		}
  6380  		_ = v_0.Args[1]
  6381  		v_0_0 := v_0.Args[0]
  6382  		v_0_1 := v_0.Args[1]
  6383  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6384  			if v_0_0.Op != OpMIPSMOVWconst {
  6385  				continue
  6386  			}
  6387  			c := auxIntToInt32(v_0_0.AuxInt)
  6388  			x := v_0_1
  6389  			if !(isPowerOfTwo64(int64(uint32(c)))) {
  6390  				continue
  6391  			}
  6392  			v.reset(OpMIPSSRLconst)
  6393  			v.AuxInt = int32ToAuxInt(int32(32 - log2uint32(int64(c))))
  6394  			v.AddArg(x)
  6395  			return true
  6396  		}
  6397  		break
  6398  	}
  6399  	// match: (Select0 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6400  	// result: (MOVWconst [int32((int64(uint32(c))*int64(uint32(d)))>>32)])
  6401  	for {
  6402  		if v_0.Op != OpMIPSMULTU {
  6403  			break
  6404  		}
  6405  		_ = v_0.Args[1]
  6406  		v_0_0 := v_0.Args[0]
  6407  		v_0_1 := v_0.Args[1]
  6408  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6409  			if v_0_0.Op != OpMIPSMOVWconst {
  6410  				continue
  6411  			}
  6412  			c := auxIntToInt32(v_0_0.AuxInt)
  6413  			if v_0_1.Op != OpMIPSMOVWconst {
  6414  				continue
  6415  			}
  6416  			d := auxIntToInt32(v_0_1.AuxInt)
  6417  			v.reset(OpMIPSMOVWconst)
  6418  			v.AuxInt = int32ToAuxInt(int32((int64(uint32(c)) * int64(uint32(d))) >> 32))
  6419  			return true
  6420  		}
  6421  		break
  6422  	}
  6423  	// match: (Select0 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6424  	// cond: d != 0
  6425  	// result: (MOVWconst [c%d])
  6426  	for {
  6427  		if v_0.Op != OpMIPSDIV {
  6428  			break
  6429  		}
  6430  		_ = v_0.Args[1]
  6431  		v_0_0 := v_0.Args[0]
  6432  		if v_0_0.Op != OpMIPSMOVWconst {
  6433  			break
  6434  		}
  6435  		c := auxIntToInt32(v_0_0.AuxInt)
  6436  		v_0_1 := v_0.Args[1]
  6437  		if v_0_1.Op != OpMIPSMOVWconst {
  6438  			break
  6439  		}
  6440  		d := auxIntToInt32(v_0_1.AuxInt)
  6441  		if !(d != 0) {
  6442  			break
  6443  		}
  6444  		v.reset(OpMIPSMOVWconst)
  6445  		v.AuxInt = int32ToAuxInt(c % d)
  6446  		return true
  6447  	}
  6448  	// match: (Select0 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6449  	// cond: d != 0
  6450  	// result: (MOVWconst [int32(uint32(c)%uint32(d))])
  6451  	for {
  6452  		if v_0.Op != OpMIPSDIVU {
  6453  			break
  6454  		}
  6455  		_ = v_0.Args[1]
  6456  		v_0_0 := v_0.Args[0]
  6457  		if v_0_0.Op != OpMIPSMOVWconst {
  6458  			break
  6459  		}
  6460  		c := auxIntToInt32(v_0_0.AuxInt)
  6461  		v_0_1 := v_0.Args[1]
  6462  		if v_0_1.Op != OpMIPSMOVWconst {
  6463  			break
  6464  		}
  6465  		d := auxIntToInt32(v_0_1.AuxInt)
  6466  		if !(d != 0) {
  6467  			break
  6468  		}
  6469  		v.reset(OpMIPSMOVWconst)
  6470  		v.AuxInt = int32ToAuxInt(int32(uint32(c) % uint32(d)))
  6471  		return true
  6472  	}
  6473  	return false
  6474  }
  6475  func rewriteValueMIPS_OpSelect1(v *Value) bool {
  6476  	v_0 := v.Args[0]
  6477  	b := v.Block
  6478  	typ := &b.Func.Config.Types
  6479  	// match: (Select1 (Add32carry <t> x y))
  6480  	// result: (SGTU <typ.Bool> x (ADD <t.FieldType(0)> x y))
  6481  	for {
  6482  		if v_0.Op != OpAdd32carry {
  6483  			break
  6484  		}
  6485  		t := v_0.Type
  6486  		y := v_0.Args[1]
  6487  		x := v_0.Args[0]
  6488  		v.reset(OpMIPSSGTU)
  6489  		v.Type = typ.Bool
  6490  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6491  		v0.AddArg2(x, y)
  6492  		v.AddArg2(x, v0)
  6493  		return true
  6494  	}
  6495  	// match: (Select1 (Sub32carry <t> x y))
  6496  	// result: (SGTU <typ.Bool> (SUB <t.FieldType(0)> x y) x)
  6497  	for {
  6498  		if v_0.Op != OpSub32carry {
  6499  			break
  6500  		}
  6501  		t := v_0.Type
  6502  		y := v_0.Args[1]
  6503  		x := v_0.Args[0]
  6504  		v.reset(OpMIPSSGTU)
  6505  		v.Type = typ.Bool
  6506  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t.FieldType(0))
  6507  		v0.AddArg2(x, y)
  6508  		v.AddArg2(v0, x)
  6509  		return true
  6510  	}
  6511  	// match: (Select1 (MULTU (MOVWconst [0]) _ ))
  6512  	// result: (MOVWconst [0])
  6513  	for {
  6514  		if v_0.Op != OpMIPSMULTU {
  6515  			break
  6516  		}
  6517  		v_0_0 := v_0.Args[0]
  6518  		v_0_1 := v_0.Args[1]
  6519  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6520  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6521  				continue
  6522  			}
  6523  			v.reset(OpMIPSMOVWconst)
  6524  			v.AuxInt = int32ToAuxInt(0)
  6525  			return true
  6526  		}
  6527  		break
  6528  	}
  6529  	// match: (Select1 (MULTU (MOVWconst [1]) x ))
  6530  	// result: x
  6531  	for {
  6532  		if v_0.Op != OpMIPSMULTU {
  6533  			break
  6534  		}
  6535  		_ = v_0.Args[1]
  6536  		v_0_0 := v_0.Args[0]
  6537  		v_0_1 := v_0.Args[1]
  6538  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6539  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6540  				continue
  6541  			}
  6542  			x := v_0_1
  6543  			v.copyOf(x)
  6544  			return true
  6545  		}
  6546  		break
  6547  	}
  6548  	// match: (Select1 (MULTU (MOVWconst [-1]) x ))
  6549  	// result: (NEG <x.Type> x)
  6550  	for {
  6551  		if v_0.Op != OpMIPSMULTU {
  6552  			break
  6553  		}
  6554  		_ = v_0.Args[1]
  6555  		v_0_0 := v_0.Args[0]
  6556  		v_0_1 := v_0.Args[1]
  6557  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6558  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6559  				continue
  6560  			}
  6561  			x := v_0_1
  6562  			v.reset(OpMIPSNEG)
  6563  			v.Type = x.Type
  6564  			v.AddArg(x)
  6565  			return true
  6566  		}
  6567  		break
  6568  	}
  6569  	// match: (Select1 (MULTU (MOVWconst [c]) x ))
  6570  	// cond: isPowerOfTwo64(int64(uint32(c)))
  6571  	// result: (SLLconst [int32(log2uint32(int64(c)))] x)
  6572  	for {
  6573  		if v_0.Op != OpMIPSMULTU {
  6574  			break
  6575  		}
  6576  		_ = v_0.Args[1]
  6577  		v_0_0 := v_0.Args[0]
  6578  		v_0_1 := v_0.Args[1]
  6579  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6580  			if v_0_0.Op != OpMIPSMOVWconst {
  6581  				continue
  6582  			}
  6583  			c := auxIntToInt32(v_0_0.AuxInt)
  6584  			x := v_0_1
  6585  			if !(isPowerOfTwo64(int64(uint32(c)))) {
  6586  				continue
  6587  			}
  6588  			v.reset(OpMIPSSLLconst)
  6589  			v.AuxInt = int32ToAuxInt(int32(log2uint32(int64(c))))
  6590  			v.AddArg(x)
  6591  			return true
  6592  		}
  6593  		break
  6594  	}
  6595  	// match: (Select1 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6596  	// result: (MOVWconst [int32(uint32(c)*uint32(d))])
  6597  	for {
  6598  		if v_0.Op != OpMIPSMULTU {
  6599  			break
  6600  		}
  6601  		_ = v_0.Args[1]
  6602  		v_0_0 := v_0.Args[0]
  6603  		v_0_1 := v_0.Args[1]
  6604  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6605  			if v_0_0.Op != OpMIPSMOVWconst {
  6606  				continue
  6607  			}
  6608  			c := auxIntToInt32(v_0_0.AuxInt)
  6609  			if v_0_1.Op != OpMIPSMOVWconst {
  6610  				continue
  6611  			}
  6612  			d := auxIntToInt32(v_0_1.AuxInt)
  6613  			v.reset(OpMIPSMOVWconst)
  6614  			v.AuxInt = int32ToAuxInt(int32(uint32(c) * uint32(d)))
  6615  			return true
  6616  		}
  6617  		break
  6618  	}
  6619  	// match: (Select1 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6620  	// cond: d != 0
  6621  	// result: (MOVWconst [c/d])
  6622  	for {
  6623  		if v_0.Op != OpMIPSDIV {
  6624  			break
  6625  		}
  6626  		_ = v_0.Args[1]
  6627  		v_0_0 := v_0.Args[0]
  6628  		if v_0_0.Op != OpMIPSMOVWconst {
  6629  			break
  6630  		}
  6631  		c := auxIntToInt32(v_0_0.AuxInt)
  6632  		v_0_1 := v_0.Args[1]
  6633  		if v_0_1.Op != OpMIPSMOVWconst {
  6634  			break
  6635  		}
  6636  		d := auxIntToInt32(v_0_1.AuxInt)
  6637  		if !(d != 0) {
  6638  			break
  6639  		}
  6640  		v.reset(OpMIPSMOVWconst)
  6641  		v.AuxInt = int32ToAuxInt(c / d)
  6642  		return true
  6643  	}
  6644  	// match: (Select1 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6645  	// cond: d != 0
  6646  	// result: (MOVWconst [int32(uint32(c)/uint32(d))])
  6647  	for {
  6648  		if v_0.Op != OpMIPSDIVU {
  6649  			break
  6650  		}
  6651  		_ = v_0.Args[1]
  6652  		v_0_0 := v_0.Args[0]
  6653  		if v_0_0.Op != OpMIPSMOVWconst {
  6654  			break
  6655  		}
  6656  		c := auxIntToInt32(v_0_0.AuxInt)
  6657  		v_0_1 := v_0.Args[1]
  6658  		if v_0_1.Op != OpMIPSMOVWconst {
  6659  			break
  6660  		}
  6661  		d := auxIntToInt32(v_0_1.AuxInt)
  6662  		if !(d != 0) {
  6663  			break
  6664  		}
  6665  		v.reset(OpMIPSMOVWconst)
  6666  		v.AuxInt = int32ToAuxInt(int32(uint32(c) / uint32(d)))
  6667  		return true
  6668  	}
  6669  	return false
  6670  }
  6671  func rewriteValueMIPS_OpSignmask(v *Value) bool {
  6672  	v_0 := v.Args[0]
  6673  	// match: (Signmask x)
  6674  	// result: (SRAconst x [31])
  6675  	for {
  6676  		x := v_0
  6677  		v.reset(OpMIPSSRAconst)
  6678  		v.AuxInt = int32ToAuxInt(31)
  6679  		v.AddArg(x)
  6680  		return true
  6681  	}
  6682  }
  6683  func rewriteValueMIPS_OpSlicemask(v *Value) bool {
  6684  	v_0 := v.Args[0]
  6685  	b := v.Block
  6686  	// match: (Slicemask <t> x)
  6687  	// result: (SRAconst (NEG <t> x) [31])
  6688  	for {
  6689  		t := v.Type
  6690  		x := v_0
  6691  		v.reset(OpMIPSSRAconst)
  6692  		v.AuxInt = int32ToAuxInt(31)
  6693  		v0 := b.NewValue0(v.Pos, OpMIPSNEG, t)
  6694  		v0.AddArg(x)
  6695  		v.AddArg(v0)
  6696  		return true
  6697  	}
  6698  }
  6699  func rewriteValueMIPS_OpStore(v *Value) bool {
  6700  	v_2 := v.Args[2]
  6701  	v_1 := v.Args[1]
  6702  	v_0 := v.Args[0]
  6703  	// match: (Store {t} ptr val mem)
  6704  	// cond: t.Size() == 1
  6705  	// result: (MOVBstore ptr val mem)
  6706  	for {
  6707  		t := auxToType(v.Aux)
  6708  		ptr := v_0
  6709  		val := v_1
  6710  		mem := v_2
  6711  		if !(t.Size() == 1) {
  6712  			break
  6713  		}
  6714  		v.reset(OpMIPSMOVBstore)
  6715  		v.AddArg3(ptr, val, mem)
  6716  		return true
  6717  	}
  6718  	// match: (Store {t} ptr val mem)
  6719  	// cond: t.Size() == 2
  6720  	// result: (MOVHstore ptr val mem)
  6721  	for {
  6722  		t := auxToType(v.Aux)
  6723  		ptr := v_0
  6724  		val := v_1
  6725  		mem := v_2
  6726  		if !(t.Size() == 2) {
  6727  			break
  6728  		}
  6729  		v.reset(OpMIPSMOVHstore)
  6730  		v.AddArg3(ptr, val, mem)
  6731  		return true
  6732  	}
  6733  	// match: (Store {t} ptr val mem)
  6734  	// cond: t.Size() == 4 && !is32BitFloat(val.Type)
  6735  	// result: (MOVWstore ptr val mem)
  6736  	for {
  6737  		t := auxToType(v.Aux)
  6738  		ptr := v_0
  6739  		val := v_1
  6740  		mem := v_2
  6741  		if !(t.Size() == 4 && !is32BitFloat(val.Type)) {
  6742  			break
  6743  		}
  6744  		v.reset(OpMIPSMOVWstore)
  6745  		v.AddArg3(ptr, val, mem)
  6746  		return true
  6747  	}
  6748  	// match: (Store {t} ptr val mem)
  6749  	// cond: t.Size() == 4 && is32BitFloat(val.Type)
  6750  	// result: (MOVFstore ptr val mem)
  6751  	for {
  6752  		t := auxToType(v.Aux)
  6753  		ptr := v_0
  6754  		val := v_1
  6755  		mem := v_2
  6756  		if !(t.Size() == 4 && is32BitFloat(val.Type)) {
  6757  			break
  6758  		}
  6759  		v.reset(OpMIPSMOVFstore)
  6760  		v.AddArg3(ptr, val, mem)
  6761  		return true
  6762  	}
  6763  	// match: (Store {t} ptr val mem)
  6764  	// cond: t.Size() == 8 && is64BitFloat(val.Type)
  6765  	// result: (MOVDstore ptr val mem)
  6766  	for {
  6767  		t := auxToType(v.Aux)
  6768  		ptr := v_0
  6769  		val := v_1
  6770  		mem := v_2
  6771  		if !(t.Size() == 8 && is64BitFloat(val.Type)) {
  6772  			break
  6773  		}
  6774  		v.reset(OpMIPSMOVDstore)
  6775  		v.AddArg3(ptr, val, mem)
  6776  		return true
  6777  	}
  6778  	return false
  6779  }
  6780  func rewriteValueMIPS_OpSub32withcarry(v *Value) bool {
  6781  	v_2 := v.Args[2]
  6782  	v_1 := v.Args[1]
  6783  	v_0 := v.Args[0]
  6784  	b := v.Block
  6785  	// match: (Sub32withcarry <t> x y c)
  6786  	// result: (SUB (SUB <t> x y) c)
  6787  	for {
  6788  		t := v.Type
  6789  		x := v_0
  6790  		y := v_1
  6791  		c := v_2
  6792  		v.reset(OpMIPSSUB)
  6793  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t)
  6794  		v0.AddArg2(x, y)
  6795  		v.AddArg2(v0, c)
  6796  		return true
  6797  	}
  6798  }
  6799  func rewriteValueMIPS_OpZero(v *Value) bool {
  6800  	v_1 := v.Args[1]
  6801  	v_0 := v.Args[0]
  6802  	b := v.Block
  6803  	config := b.Func.Config
  6804  	typ := &b.Func.Config.Types
  6805  	// match: (Zero [0] _ mem)
  6806  	// result: mem
  6807  	for {
  6808  		if auxIntToInt64(v.AuxInt) != 0 {
  6809  			break
  6810  		}
  6811  		mem := v_1
  6812  		v.copyOf(mem)
  6813  		return true
  6814  	}
  6815  	// match: (Zero [1] ptr mem)
  6816  	// result: (MOVBstore ptr (MOVWconst [0]) mem)
  6817  	for {
  6818  		if auxIntToInt64(v.AuxInt) != 1 {
  6819  			break
  6820  		}
  6821  		ptr := v_0
  6822  		mem := v_1
  6823  		v.reset(OpMIPSMOVBstore)
  6824  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6825  		v0.AuxInt = int32ToAuxInt(0)
  6826  		v.AddArg3(ptr, v0, mem)
  6827  		return true
  6828  	}
  6829  	// match: (Zero [2] {t} ptr mem)
  6830  	// cond: t.Alignment()%2 == 0
  6831  	// result: (MOVHstore ptr (MOVWconst [0]) mem)
  6832  	for {
  6833  		if auxIntToInt64(v.AuxInt) != 2 {
  6834  			break
  6835  		}
  6836  		t := auxToType(v.Aux)
  6837  		ptr := v_0
  6838  		mem := v_1
  6839  		if !(t.Alignment()%2 == 0) {
  6840  			break
  6841  		}
  6842  		v.reset(OpMIPSMOVHstore)
  6843  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6844  		v0.AuxInt = int32ToAuxInt(0)
  6845  		v.AddArg3(ptr, v0, mem)
  6846  		return true
  6847  	}
  6848  	// match: (Zero [2] ptr mem)
  6849  	// result: (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))
  6850  	for {
  6851  		if auxIntToInt64(v.AuxInt) != 2 {
  6852  			break
  6853  		}
  6854  		ptr := v_0
  6855  		mem := v_1
  6856  		v.reset(OpMIPSMOVBstore)
  6857  		v.AuxInt = int32ToAuxInt(1)
  6858  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6859  		v0.AuxInt = int32ToAuxInt(0)
  6860  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  6861  		v1.AuxInt = int32ToAuxInt(0)
  6862  		v1.AddArg3(ptr, v0, mem)
  6863  		v.AddArg3(ptr, v0, v1)
  6864  		return true
  6865  	}
  6866  	// match: (Zero [4] {t} ptr mem)
  6867  	// cond: t.Alignment()%4 == 0
  6868  	// result: (MOVWstore ptr (MOVWconst [0]) mem)
  6869  	for {
  6870  		if auxIntToInt64(v.AuxInt) != 4 {
  6871  			break
  6872  		}
  6873  		t := auxToType(v.Aux)
  6874  		ptr := v_0
  6875  		mem := v_1
  6876  		if !(t.Alignment()%4 == 0) {
  6877  			break
  6878  		}
  6879  		v.reset(OpMIPSMOVWstore)
  6880  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6881  		v0.AuxInt = int32ToAuxInt(0)
  6882  		v.AddArg3(ptr, v0, mem)
  6883  		return true
  6884  	}
  6885  	// match: (Zero [4] {t} ptr mem)
  6886  	// cond: t.Alignment()%2 == 0
  6887  	// result: (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem))
  6888  	for {
  6889  		if auxIntToInt64(v.AuxInt) != 4 {
  6890  			break
  6891  		}
  6892  		t := auxToType(v.Aux)
  6893  		ptr := v_0
  6894  		mem := v_1
  6895  		if !(t.Alignment()%2 == 0) {
  6896  			break
  6897  		}
  6898  		v.reset(OpMIPSMOVHstore)
  6899  		v.AuxInt = int32ToAuxInt(2)
  6900  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6901  		v0.AuxInt = int32ToAuxInt(0)
  6902  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  6903  		v1.AuxInt = int32ToAuxInt(0)
  6904  		v1.AddArg3(ptr, v0, mem)
  6905  		v.AddArg3(ptr, v0, v1)
  6906  		return true
  6907  	}
  6908  	// match: (Zero [4] ptr mem)
  6909  	// result: (MOVBstore [3] ptr (MOVWconst [0]) (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))))
  6910  	for {
  6911  		if auxIntToInt64(v.AuxInt) != 4 {
  6912  			break
  6913  		}
  6914  		ptr := v_0
  6915  		mem := v_1
  6916  		v.reset(OpMIPSMOVBstore)
  6917  		v.AuxInt = int32ToAuxInt(3)
  6918  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6919  		v0.AuxInt = int32ToAuxInt(0)
  6920  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  6921  		v1.AuxInt = int32ToAuxInt(2)
  6922  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  6923  		v2.AuxInt = int32ToAuxInt(1)
  6924  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  6925  		v3.AuxInt = int32ToAuxInt(0)
  6926  		v3.AddArg3(ptr, v0, mem)
  6927  		v2.AddArg3(ptr, v0, v3)
  6928  		v1.AddArg3(ptr, v0, v2)
  6929  		v.AddArg3(ptr, v0, v1)
  6930  		return true
  6931  	}
  6932  	// match: (Zero [3] ptr mem)
  6933  	// result: (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem)))
  6934  	for {
  6935  		if auxIntToInt64(v.AuxInt) != 3 {
  6936  			break
  6937  		}
  6938  		ptr := v_0
  6939  		mem := v_1
  6940  		v.reset(OpMIPSMOVBstore)
  6941  		v.AuxInt = int32ToAuxInt(2)
  6942  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6943  		v0.AuxInt = int32ToAuxInt(0)
  6944  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  6945  		v1.AuxInt = int32ToAuxInt(1)
  6946  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  6947  		v2.AuxInt = int32ToAuxInt(0)
  6948  		v2.AddArg3(ptr, v0, mem)
  6949  		v1.AddArg3(ptr, v0, v2)
  6950  		v.AddArg3(ptr, v0, v1)
  6951  		return true
  6952  	}
  6953  	// match: (Zero [6] {t} ptr mem)
  6954  	// cond: t.Alignment()%2 == 0
  6955  	// result: (MOVHstore [4] ptr (MOVWconst [0]) (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem)))
  6956  	for {
  6957  		if auxIntToInt64(v.AuxInt) != 6 {
  6958  			break
  6959  		}
  6960  		t := auxToType(v.Aux)
  6961  		ptr := v_0
  6962  		mem := v_1
  6963  		if !(t.Alignment()%2 == 0) {
  6964  			break
  6965  		}
  6966  		v.reset(OpMIPSMOVHstore)
  6967  		v.AuxInt = int32ToAuxInt(4)
  6968  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6969  		v0.AuxInt = int32ToAuxInt(0)
  6970  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  6971  		v1.AuxInt = int32ToAuxInt(2)
  6972  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  6973  		v2.AuxInt = int32ToAuxInt(0)
  6974  		v2.AddArg3(ptr, v0, mem)
  6975  		v1.AddArg3(ptr, v0, v2)
  6976  		v.AddArg3(ptr, v0, v1)
  6977  		return true
  6978  	}
  6979  	// match: (Zero [8] {t} ptr mem)
  6980  	// cond: t.Alignment()%4 == 0
  6981  	// result: (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))
  6982  	for {
  6983  		if auxIntToInt64(v.AuxInt) != 8 {
  6984  			break
  6985  		}
  6986  		t := auxToType(v.Aux)
  6987  		ptr := v_0
  6988  		mem := v_1
  6989  		if !(t.Alignment()%4 == 0) {
  6990  			break
  6991  		}
  6992  		v.reset(OpMIPSMOVWstore)
  6993  		v.AuxInt = int32ToAuxInt(4)
  6994  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6995  		v0.AuxInt = int32ToAuxInt(0)
  6996  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  6997  		v1.AuxInt = int32ToAuxInt(0)
  6998  		v1.AddArg3(ptr, v0, mem)
  6999  		v.AddArg3(ptr, v0, v1)
  7000  		return true
  7001  	}
  7002  	// match: (Zero [12] {t} ptr mem)
  7003  	// cond: t.Alignment()%4 == 0
  7004  	// result: (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem)))
  7005  	for {
  7006  		if auxIntToInt64(v.AuxInt) != 12 {
  7007  			break
  7008  		}
  7009  		t := auxToType(v.Aux)
  7010  		ptr := v_0
  7011  		mem := v_1
  7012  		if !(t.Alignment()%4 == 0) {
  7013  			break
  7014  		}
  7015  		v.reset(OpMIPSMOVWstore)
  7016  		v.AuxInt = int32ToAuxInt(8)
  7017  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7018  		v0.AuxInt = int32ToAuxInt(0)
  7019  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7020  		v1.AuxInt = int32ToAuxInt(4)
  7021  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7022  		v2.AuxInt = int32ToAuxInt(0)
  7023  		v2.AddArg3(ptr, v0, mem)
  7024  		v1.AddArg3(ptr, v0, v2)
  7025  		v.AddArg3(ptr, v0, v1)
  7026  		return true
  7027  	}
  7028  	// match: (Zero [16] {t} ptr mem)
  7029  	// cond: t.Alignment()%4 == 0
  7030  	// result: (MOVWstore [12] ptr (MOVWconst [0]) (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))))
  7031  	for {
  7032  		if auxIntToInt64(v.AuxInt) != 16 {
  7033  			break
  7034  		}
  7035  		t := auxToType(v.Aux)
  7036  		ptr := v_0
  7037  		mem := v_1
  7038  		if !(t.Alignment()%4 == 0) {
  7039  			break
  7040  		}
  7041  		v.reset(OpMIPSMOVWstore)
  7042  		v.AuxInt = int32ToAuxInt(12)
  7043  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7044  		v0.AuxInt = int32ToAuxInt(0)
  7045  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7046  		v1.AuxInt = int32ToAuxInt(8)
  7047  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7048  		v2.AuxInt = int32ToAuxInt(4)
  7049  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7050  		v3.AuxInt = int32ToAuxInt(0)
  7051  		v3.AddArg3(ptr, v0, mem)
  7052  		v2.AddArg3(ptr, v0, v3)
  7053  		v1.AddArg3(ptr, v0, v2)
  7054  		v.AddArg3(ptr, v0, v1)
  7055  		return true
  7056  	}
  7057  	// match: (Zero [s] {t} ptr mem)
  7058  	// cond: (s > 16 || t.Alignment()%4 != 0)
  7059  	// result: (LoweredZero [int32(t.Alignment())] ptr (ADDconst <ptr.Type> ptr [int32(s-moveSize(t.Alignment(), config))]) mem)
  7060  	for {
  7061  		s := auxIntToInt64(v.AuxInt)
  7062  		t := auxToType(v.Aux)
  7063  		ptr := v_0
  7064  		mem := v_1
  7065  		if !(s > 16 || t.Alignment()%4 != 0) {
  7066  			break
  7067  		}
  7068  		v.reset(OpMIPSLoweredZero)
  7069  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  7070  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, ptr.Type)
  7071  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  7072  		v0.AddArg(ptr)
  7073  		v.AddArg3(ptr, v0, mem)
  7074  		return true
  7075  	}
  7076  	return false
  7077  }
  7078  func rewriteValueMIPS_OpZeromask(v *Value) bool {
  7079  	v_0 := v.Args[0]
  7080  	b := v.Block
  7081  	typ := &b.Func.Config.Types
  7082  	// match: (Zeromask x)
  7083  	// result: (NEG (SGTU x (MOVWconst [0])))
  7084  	for {
  7085  		x := v_0
  7086  		v.reset(OpMIPSNEG)
  7087  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  7088  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7089  		v1.AuxInt = int32ToAuxInt(0)
  7090  		v0.AddArg2(x, v1)
  7091  		v.AddArg(v0)
  7092  		return true
  7093  	}
  7094  }
  7095  func rewriteBlockMIPS(b *Block) bool {
  7096  	switch b.Kind {
  7097  	case BlockMIPSEQ:
  7098  		// match: (EQ (FPFlagTrue cmp) yes no)
  7099  		// result: (FPF cmp yes no)
  7100  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7101  			v_0 := b.Controls[0]
  7102  			cmp := v_0.Args[0]
  7103  			b.resetWithControl(BlockMIPSFPF, cmp)
  7104  			return true
  7105  		}
  7106  		// match: (EQ (FPFlagFalse cmp) yes no)
  7107  		// result: (FPT cmp yes no)
  7108  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7109  			v_0 := b.Controls[0]
  7110  			cmp := v_0.Args[0]
  7111  			b.resetWithControl(BlockMIPSFPT, cmp)
  7112  			return true
  7113  		}
  7114  		// match: (EQ (XORconst [1] cmp:(SGT _ _)) yes no)
  7115  		// result: (NE cmp yes no)
  7116  		for b.Controls[0].Op == OpMIPSXORconst {
  7117  			v_0 := b.Controls[0]
  7118  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7119  				break
  7120  			}
  7121  			cmp := v_0.Args[0]
  7122  			if cmp.Op != OpMIPSSGT {
  7123  				break
  7124  			}
  7125  			b.resetWithControl(BlockMIPSNE, cmp)
  7126  			return true
  7127  		}
  7128  		// match: (EQ (XORconst [1] cmp:(SGTU _ _)) yes no)
  7129  		// result: (NE cmp yes no)
  7130  		for b.Controls[0].Op == OpMIPSXORconst {
  7131  			v_0 := b.Controls[0]
  7132  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7133  				break
  7134  			}
  7135  			cmp := v_0.Args[0]
  7136  			if cmp.Op != OpMIPSSGTU {
  7137  				break
  7138  			}
  7139  			b.resetWithControl(BlockMIPSNE, cmp)
  7140  			return true
  7141  		}
  7142  		// match: (EQ (XORconst [1] cmp:(SGTconst _)) yes no)
  7143  		// result: (NE cmp yes no)
  7144  		for b.Controls[0].Op == OpMIPSXORconst {
  7145  			v_0 := b.Controls[0]
  7146  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7147  				break
  7148  			}
  7149  			cmp := v_0.Args[0]
  7150  			if cmp.Op != OpMIPSSGTconst {
  7151  				break
  7152  			}
  7153  			b.resetWithControl(BlockMIPSNE, cmp)
  7154  			return true
  7155  		}
  7156  		// match: (EQ (XORconst [1] cmp:(SGTUconst _)) yes no)
  7157  		// result: (NE cmp yes no)
  7158  		for b.Controls[0].Op == OpMIPSXORconst {
  7159  			v_0 := b.Controls[0]
  7160  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7161  				break
  7162  			}
  7163  			cmp := v_0.Args[0]
  7164  			if cmp.Op != OpMIPSSGTUconst {
  7165  				break
  7166  			}
  7167  			b.resetWithControl(BlockMIPSNE, cmp)
  7168  			return true
  7169  		}
  7170  		// match: (EQ (XORconst [1] cmp:(SGTzero _)) yes no)
  7171  		// result: (NE cmp yes no)
  7172  		for b.Controls[0].Op == OpMIPSXORconst {
  7173  			v_0 := b.Controls[0]
  7174  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7175  				break
  7176  			}
  7177  			cmp := v_0.Args[0]
  7178  			if cmp.Op != OpMIPSSGTzero {
  7179  				break
  7180  			}
  7181  			b.resetWithControl(BlockMIPSNE, cmp)
  7182  			return true
  7183  		}
  7184  		// match: (EQ (XORconst [1] cmp:(SGTUzero _)) yes no)
  7185  		// result: (NE cmp yes no)
  7186  		for b.Controls[0].Op == OpMIPSXORconst {
  7187  			v_0 := b.Controls[0]
  7188  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7189  				break
  7190  			}
  7191  			cmp := v_0.Args[0]
  7192  			if cmp.Op != OpMIPSSGTUzero {
  7193  				break
  7194  			}
  7195  			b.resetWithControl(BlockMIPSNE, cmp)
  7196  			return true
  7197  		}
  7198  		// match: (EQ (SGTUconst [1] x) yes no)
  7199  		// result: (NE x yes no)
  7200  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7201  			v_0 := b.Controls[0]
  7202  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7203  				break
  7204  			}
  7205  			x := v_0.Args[0]
  7206  			b.resetWithControl(BlockMIPSNE, x)
  7207  			return true
  7208  		}
  7209  		// match: (EQ (SGTUzero x) yes no)
  7210  		// result: (EQ x yes no)
  7211  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7212  			v_0 := b.Controls[0]
  7213  			x := v_0.Args[0]
  7214  			b.resetWithControl(BlockMIPSEQ, x)
  7215  			return true
  7216  		}
  7217  		// match: (EQ (SGTconst [0] x) yes no)
  7218  		// result: (GEZ x yes no)
  7219  		for b.Controls[0].Op == OpMIPSSGTconst {
  7220  			v_0 := b.Controls[0]
  7221  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7222  				break
  7223  			}
  7224  			x := v_0.Args[0]
  7225  			b.resetWithControl(BlockMIPSGEZ, x)
  7226  			return true
  7227  		}
  7228  		// match: (EQ (SGTzero x) yes no)
  7229  		// result: (LEZ x yes no)
  7230  		for b.Controls[0].Op == OpMIPSSGTzero {
  7231  			v_0 := b.Controls[0]
  7232  			x := v_0.Args[0]
  7233  			b.resetWithControl(BlockMIPSLEZ, x)
  7234  			return true
  7235  		}
  7236  		// match: (EQ (MOVWconst [0]) yes no)
  7237  		// result: (First yes no)
  7238  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7239  			v_0 := b.Controls[0]
  7240  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7241  				break
  7242  			}
  7243  			b.Reset(BlockFirst)
  7244  			return true
  7245  		}
  7246  		// match: (EQ (MOVWconst [c]) yes no)
  7247  		// cond: c != 0
  7248  		// result: (First no yes)
  7249  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7250  			v_0 := b.Controls[0]
  7251  			c := auxIntToInt32(v_0.AuxInt)
  7252  			if !(c != 0) {
  7253  				break
  7254  			}
  7255  			b.Reset(BlockFirst)
  7256  			b.swapSuccessors()
  7257  			return true
  7258  		}
  7259  	case BlockMIPSGEZ:
  7260  		// match: (GEZ (MOVWconst [c]) yes no)
  7261  		// cond: c >= 0
  7262  		// result: (First yes no)
  7263  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7264  			v_0 := b.Controls[0]
  7265  			c := auxIntToInt32(v_0.AuxInt)
  7266  			if !(c >= 0) {
  7267  				break
  7268  			}
  7269  			b.Reset(BlockFirst)
  7270  			return true
  7271  		}
  7272  		// match: (GEZ (MOVWconst [c]) yes no)
  7273  		// cond: c < 0
  7274  		// result: (First no yes)
  7275  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7276  			v_0 := b.Controls[0]
  7277  			c := auxIntToInt32(v_0.AuxInt)
  7278  			if !(c < 0) {
  7279  				break
  7280  			}
  7281  			b.Reset(BlockFirst)
  7282  			b.swapSuccessors()
  7283  			return true
  7284  		}
  7285  	case BlockMIPSGTZ:
  7286  		// match: (GTZ (MOVWconst [c]) yes no)
  7287  		// cond: c > 0
  7288  		// result: (First yes no)
  7289  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7290  			v_0 := b.Controls[0]
  7291  			c := auxIntToInt32(v_0.AuxInt)
  7292  			if !(c > 0) {
  7293  				break
  7294  			}
  7295  			b.Reset(BlockFirst)
  7296  			return true
  7297  		}
  7298  		// match: (GTZ (MOVWconst [c]) yes no)
  7299  		// cond: c <= 0
  7300  		// result: (First no yes)
  7301  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7302  			v_0 := b.Controls[0]
  7303  			c := auxIntToInt32(v_0.AuxInt)
  7304  			if !(c <= 0) {
  7305  				break
  7306  			}
  7307  			b.Reset(BlockFirst)
  7308  			b.swapSuccessors()
  7309  			return true
  7310  		}
  7311  	case BlockIf:
  7312  		// match: (If cond yes no)
  7313  		// result: (NE cond yes no)
  7314  		for {
  7315  			cond := b.Controls[0]
  7316  			b.resetWithControl(BlockMIPSNE, cond)
  7317  			return true
  7318  		}
  7319  	case BlockMIPSLEZ:
  7320  		// match: (LEZ (MOVWconst [c]) yes no)
  7321  		// cond: c <= 0
  7322  		// result: (First yes no)
  7323  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7324  			v_0 := b.Controls[0]
  7325  			c := auxIntToInt32(v_0.AuxInt)
  7326  			if !(c <= 0) {
  7327  				break
  7328  			}
  7329  			b.Reset(BlockFirst)
  7330  			return true
  7331  		}
  7332  		// match: (LEZ (MOVWconst [c]) yes no)
  7333  		// cond: c > 0
  7334  		// result: (First no yes)
  7335  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7336  			v_0 := b.Controls[0]
  7337  			c := auxIntToInt32(v_0.AuxInt)
  7338  			if !(c > 0) {
  7339  				break
  7340  			}
  7341  			b.Reset(BlockFirst)
  7342  			b.swapSuccessors()
  7343  			return true
  7344  		}
  7345  	case BlockMIPSLTZ:
  7346  		// match: (LTZ (MOVWconst [c]) yes no)
  7347  		// cond: c < 0
  7348  		// result: (First yes no)
  7349  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7350  			v_0 := b.Controls[0]
  7351  			c := auxIntToInt32(v_0.AuxInt)
  7352  			if !(c < 0) {
  7353  				break
  7354  			}
  7355  			b.Reset(BlockFirst)
  7356  			return true
  7357  		}
  7358  		// match: (LTZ (MOVWconst [c]) yes no)
  7359  		// cond: c >= 0
  7360  		// result: (First no yes)
  7361  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7362  			v_0 := b.Controls[0]
  7363  			c := auxIntToInt32(v_0.AuxInt)
  7364  			if !(c >= 0) {
  7365  				break
  7366  			}
  7367  			b.Reset(BlockFirst)
  7368  			b.swapSuccessors()
  7369  			return true
  7370  		}
  7371  	case BlockMIPSNE:
  7372  		// match: (NE (FPFlagTrue cmp) yes no)
  7373  		// result: (FPT cmp yes no)
  7374  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7375  			v_0 := b.Controls[0]
  7376  			cmp := v_0.Args[0]
  7377  			b.resetWithControl(BlockMIPSFPT, cmp)
  7378  			return true
  7379  		}
  7380  		// match: (NE (FPFlagFalse cmp) yes no)
  7381  		// result: (FPF cmp yes no)
  7382  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7383  			v_0 := b.Controls[0]
  7384  			cmp := v_0.Args[0]
  7385  			b.resetWithControl(BlockMIPSFPF, cmp)
  7386  			return true
  7387  		}
  7388  		// match: (NE (XORconst [1] cmp:(SGT _ _)) yes no)
  7389  		// result: (EQ cmp yes no)
  7390  		for b.Controls[0].Op == OpMIPSXORconst {
  7391  			v_0 := b.Controls[0]
  7392  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7393  				break
  7394  			}
  7395  			cmp := v_0.Args[0]
  7396  			if cmp.Op != OpMIPSSGT {
  7397  				break
  7398  			}
  7399  			b.resetWithControl(BlockMIPSEQ, cmp)
  7400  			return true
  7401  		}
  7402  		// match: (NE (XORconst [1] cmp:(SGTU _ _)) yes no)
  7403  		// result: (EQ cmp yes no)
  7404  		for b.Controls[0].Op == OpMIPSXORconst {
  7405  			v_0 := b.Controls[0]
  7406  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7407  				break
  7408  			}
  7409  			cmp := v_0.Args[0]
  7410  			if cmp.Op != OpMIPSSGTU {
  7411  				break
  7412  			}
  7413  			b.resetWithControl(BlockMIPSEQ, cmp)
  7414  			return true
  7415  		}
  7416  		// match: (NE (XORconst [1] cmp:(SGTconst _)) yes no)
  7417  		// result: (EQ cmp yes no)
  7418  		for b.Controls[0].Op == OpMIPSXORconst {
  7419  			v_0 := b.Controls[0]
  7420  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7421  				break
  7422  			}
  7423  			cmp := v_0.Args[0]
  7424  			if cmp.Op != OpMIPSSGTconst {
  7425  				break
  7426  			}
  7427  			b.resetWithControl(BlockMIPSEQ, cmp)
  7428  			return true
  7429  		}
  7430  		// match: (NE (XORconst [1] cmp:(SGTUconst _)) yes no)
  7431  		// result: (EQ cmp yes no)
  7432  		for b.Controls[0].Op == OpMIPSXORconst {
  7433  			v_0 := b.Controls[0]
  7434  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7435  				break
  7436  			}
  7437  			cmp := v_0.Args[0]
  7438  			if cmp.Op != OpMIPSSGTUconst {
  7439  				break
  7440  			}
  7441  			b.resetWithControl(BlockMIPSEQ, cmp)
  7442  			return true
  7443  		}
  7444  		// match: (NE (XORconst [1] cmp:(SGTzero _)) yes no)
  7445  		// result: (EQ cmp yes no)
  7446  		for b.Controls[0].Op == OpMIPSXORconst {
  7447  			v_0 := b.Controls[0]
  7448  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7449  				break
  7450  			}
  7451  			cmp := v_0.Args[0]
  7452  			if cmp.Op != OpMIPSSGTzero {
  7453  				break
  7454  			}
  7455  			b.resetWithControl(BlockMIPSEQ, cmp)
  7456  			return true
  7457  		}
  7458  		// match: (NE (XORconst [1] cmp:(SGTUzero _)) yes no)
  7459  		// result: (EQ cmp yes no)
  7460  		for b.Controls[0].Op == OpMIPSXORconst {
  7461  			v_0 := b.Controls[0]
  7462  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7463  				break
  7464  			}
  7465  			cmp := v_0.Args[0]
  7466  			if cmp.Op != OpMIPSSGTUzero {
  7467  				break
  7468  			}
  7469  			b.resetWithControl(BlockMIPSEQ, cmp)
  7470  			return true
  7471  		}
  7472  		// match: (NE (SGTUconst [1] x) yes no)
  7473  		// result: (EQ x yes no)
  7474  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7475  			v_0 := b.Controls[0]
  7476  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7477  				break
  7478  			}
  7479  			x := v_0.Args[0]
  7480  			b.resetWithControl(BlockMIPSEQ, x)
  7481  			return true
  7482  		}
  7483  		// match: (NE (SGTUzero x) yes no)
  7484  		// result: (NE x yes no)
  7485  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7486  			v_0 := b.Controls[0]
  7487  			x := v_0.Args[0]
  7488  			b.resetWithControl(BlockMIPSNE, x)
  7489  			return true
  7490  		}
  7491  		// match: (NE (SGTconst [0] x) yes no)
  7492  		// result: (LTZ x yes no)
  7493  		for b.Controls[0].Op == OpMIPSSGTconst {
  7494  			v_0 := b.Controls[0]
  7495  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7496  				break
  7497  			}
  7498  			x := v_0.Args[0]
  7499  			b.resetWithControl(BlockMIPSLTZ, x)
  7500  			return true
  7501  		}
  7502  		// match: (NE (SGTzero x) yes no)
  7503  		// result: (GTZ x yes no)
  7504  		for b.Controls[0].Op == OpMIPSSGTzero {
  7505  			v_0 := b.Controls[0]
  7506  			x := v_0.Args[0]
  7507  			b.resetWithControl(BlockMIPSGTZ, x)
  7508  			return true
  7509  		}
  7510  		// match: (NE (MOVWconst [0]) yes no)
  7511  		// result: (First no yes)
  7512  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7513  			v_0 := b.Controls[0]
  7514  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7515  				break
  7516  			}
  7517  			b.Reset(BlockFirst)
  7518  			b.swapSuccessors()
  7519  			return true
  7520  		}
  7521  		// match: (NE (MOVWconst [c]) yes no)
  7522  		// cond: c != 0
  7523  		// result: (First yes no)
  7524  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7525  			v_0 := b.Controls[0]
  7526  			c := auxIntToInt32(v_0.AuxInt)
  7527  			if !(c != 0) {
  7528  				break
  7529  			}
  7530  			b.Reset(BlockFirst)
  7531  			return true
  7532  		}
  7533  	}
  7534  	return false
  7535  }
  7536  

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