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Source file src/cmd/compile/internal/ssa/rewriteARM64.go

Documentation: cmd/compile/internal/ssa

     1  // Code generated from gen/ARM64.rules; DO NOT EDIT.
     2  // generated with: cd gen; go run *.go
     3  
     4  package ssa
     5  
     6  import "cmd/compile/internal/types"
     7  
     8  func rewriteValueARM64(v *Value) bool {
     9  	switch v.Op {
    10  	case OpARM64ADCSflags:
    11  		return rewriteValueARM64_OpARM64ADCSflags(v)
    12  	case OpARM64ADD:
    13  		return rewriteValueARM64_OpARM64ADD(v)
    14  	case OpARM64ADDconst:
    15  		return rewriteValueARM64_OpARM64ADDconst(v)
    16  	case OpARM64ADDshiftLL:
    17  		return rewriteValueARM64_OpARM64ADDshiftLL(v)
    18  	case OpARM64ADDshiftRA:
    19  		return rewriteValueARM64_OpARM64ADDshiftRA(v)
    20  	case OpARM64ADDshiftRL:
    21  		return rewriteValueARM64_OpARM64ADDshiftRL(v)
    22  	case OpARM64AND:
    23  		return rewriteValueARM64_OpARM64AND(v)
    24  	case OpARM64ANDconst:
    25  		return rewriteValueARM64_OpARM64ANDconst(v)
    26  	case OpARM64ANDshiftLL:
    27  		return rewriteValueARM64_OpARM64ANDshiftLL(v)
    28  	case OpARM64ANDshiftRA:
    29  		return rewriteValueARM64_OpARM64ANDshiftRA(v)
    30  	case OpARM64ANDshiftRL:
    31  		return rewriteValueARM64_OpARM64ANDshiftRL(v)
    32  	case OpARM64BIC:
    33  		return rewriteValueARM64_OpARM64BIC(v)
    34  	case OpARM64BICshiftLL:
    35  		return rewriteValueARM64_OpARM64BICshiftLL(v)
    36  	case OpARM64BICshiftRA:
    37  		return rewriteValueARM64_OpARM64BICshiftRA(v)
    38  	case OpARM64BICshiftRL:
    39  		return rewriteValueARM64_OpARM64BICshiftRL(v)
    40  	case OpARM64CMN:
    41  		return rewriteValueARM64_OpARM64CMN(v)
    42  	case OpARM64CMNW:
    43  		return rewriteValueARM64_OpARM64CMNW(v)
    44  	case OpARM64CMNWconst:
    45  		return rewriteValueARM64_OpARM64CMNWconst(v)
    46  	case OpARM64CMNconst:
    47  		return rewriteValueARM64_OpARM64CMNconst(v)
    48  	case OpARM64CMNshiftLL:
    49  		return rewriteValueARM64_OpARM64CMNshiftLL(v)
    50  	case OpARM64CMNshiftRA:
    51  		return rewriteValueARM64_OpARM64CMNshiftRA(v)
    52  	case OpARM64CMNshiftRL:
    53  		return rewriteValueARM64_OpARM64CMNshiftRL(v)
    54  	case OpARM64CMP:
    55  		return rewriteValueARM64_OpARM64CMP(v)
    56  	case OpARM64CMPW:
    57  		return rewriteValueARM64_OpARM64CMPW(v)
    58  	case OpARM64CMPWconst:
    59  		return rewriteValueARM64_OpARM64CMPWconst(v)
    60  	case OpARM64CMPconst:
    61  		return rewriteValueARM64_OpARM64CMPconst(v)
    62  	case OpARM64CMPshiftLL:
    63  		return rewriteValueARM64_OpARM64CMPshiftLL(v)
    64  	case OpARM64CMPshiftRA:
    65  		return rewriteValueARM64_OpARM64CMPshiftRA(v)
    66  	case OpARM64CMPshiftRL:
    67  		return rewriteValueARM64_OpARM64CMPshiftRL(v)
    68  	case OpARM64CSEL:
    69  		return rewriteValueARM64_OpARM64CSEL(v)
    70  	case OpARM64CSEL0:
    71  		return rewriteValueARM64_OpARM64CSEL0(v)
    72  	case OpARM64DIV:
    73  		return rewriteValueARM64_OpARM64DIV(v)
    74  	case OpARM64DIVW:
    75  		return rewriteValueARM64_OpARM64DIVW(v)
    76  	case OpARM64EON:
    77  		return rewriteValueARM64_OpARM64EON(v)
    78  	case OpARM64EONshiftLL:
    79  		return rewriteValueARM64_OpARM64EONshiftLL(v)
    80  	case OpARM64EONshiftRA:
    81  		return rewriteValueARM64_OpARM64EONshiftRA(v)
    82  	case OpARM64EONshiftRL:
    83  		return rewriteValueARM64_OpARM64EONshiftRL(v)
    84  	case OpARM64Equal:
    85  		return rewriteValueARM64_OpARM64Equal(v)
    86  	case OpARM64FADDD:
    87  		return rewriteValueARM64_OpARM64FADDD(v)
    88  	case OpARM64FADDS:
    89  		return rewriteValueARM64_OpARM64FADDS(v)
    90  	case OpARM64FCMPD:
    91  		return rewriteValueARM64_OpARM64FCMPD(v)
    92  	case OpARM64FCMPS:
    93  		return rewriteValueARM64_OpARM64FCMPS(v)
    94  	case OpARM64FMOVDfpgp:
    95  		return rewriteValueARM64_OpARM64FMOVDfpgp(v)
    96  	case OpARM64FMOVDgpfp:
    97  		return rewriteValueARM64_OpARM64FMOVDgpfp(v)
    98  	case OpARM64FMOVDload:
    99  		return rewriteValueARM64_OpARM64FMOVDload(v)
   100  	case OpARM64FMOVDloadidx:
   101  		return rewriteValueARM64_OpARM64FMOVDloadidx(v)
   102  	case OpARM64FMOVDstore:
   103  		return rewriteValueARM64_OpARM64FMOVDstore(v)
   104  	case OpARM64FMOVDstoreidx:
   105  		return rewriteValueARM64_OpARM64FMOVDstoreidx(v)
   106  	case OpARM64FMOVSload:
   107  		return rewriteValueARM64_OpARM64FMOVSload(v)
   108  	case OpARM64FMOVSloadidx:
   109  		return rewriteValueARM64_OpARM64FMOVSloadidx(v)
   110  	case OpARM64FMOVSstore:
   111  		return rewriteValueARM64_OpARM64FMOVSstore(v)
   112  	case OpARM64FMOVSstoreidx:
   113  		return rewriteValueARM64_OpARM64FMOVSstoreidx(v)
   114  	case OpARM64FMULD:
   115  		return rewriteValueARM64_OpARM64FMULD(v)
   116  	case OpARM64FMULS:
   117  		return rewriteValueARM64_OpARM64FMULS(v)
   118  	case OpARM64FNEGD:
   119  		return rewriteValueARM64_OpARM64FNEGD(v)
   120  	case OpARM64FNEGS:
   121  		return rewriteValueARM64_OpARM64FNEGS(v)
   122  	case OpARM64FNMULD:
   123  		return rewriteValueARM64_OpARM64FNMULD(v)
   124  	case OpARM64FNMULS:
   125  		return rewriteValueARM64_OpARM64FNMULS(v)
   126  	case OpARM64FSUBD:
   127  		return rewriteValueARM64_OpARM64FSUBD(v)
   128  	case OpARM64FSUBS:
   129  		return rewriteValueARM64_OpARM64FSUBS(v)
   130  	case OpARM64GreaterEqual:
   131  		return rewriteValueARM64_OpARM64GreaterEqual(v)
   132  	case OpARM64GreaterEqualF:
   133  		return rewriteValueARM64_OpARM64GreaterEqualF(v)
   134  	case OpARM64GreaterEqualU:
   135  		return rewriteValueARM64_OpARM64GreaterEqualU(v)
   136  	case OpARM64GreaterThan:
   137  		return rewriteValueARM64_OpARM64GreaterThan(v)
   138  	case OpARM64GreaterThanF:
   139  		return rewriteValueARM64_OpARM64GreaterThanF(v)
   140  	case OpARM64GreaterThanU:
   141  		return rewriteValueARM64_OpARM64GreaterThanU(v)
   142  	case OpARM64LessEqual:
   143  		return rewriteValueARM64_OpARM64LessEqual(v)
   144  	case OpARM64LessEqualF:
   145  		return rewriteValueARM64_OpARM64LessEqualF(v)
   146  	case OpARM64LessEqualU:
   147  		return rewriteValueARM64_OpARM64LessEqualU(v)
   148  	case OpARM64LessThan:
   149  		return rewriteValueARM64_OpARM64LessThan(v)
   150  	case OpARM64LessThanF:
   151  		return rewriteValueARM64_OpARM64LessThanF(v)
   152  	case OpARM64LessThanU:
   153  		return rewriteValueARM64_OpARM64LessThanU(v)
   154  	case OpARM64MADD:
   155  		return rewriteValueARM64_OpARM64MADD(v)
   156  	case OpARM64MADDW:
   157  		return rewriteValueARM64_OpARM64MADDW(v)
   158  	case OpARM64MNEG:
   159  		return rewriteValueARM64_OpARM64MNEG(v)
   160  	case OpARM64MNEGW:
   161  		return rewriteValueARM64_OpARM64MNEGW(v)
   162  	case OpARM64MOD:
   163  		return rewriteValueARM64_OpARM64MOD(v)
   164  	case OpARM64MODW:
   165  		return rewriteValueARM64_OpARM64MODW(v)
   166  	case OpARM64MOVBUload:
   167  		return rewriteValueARM64_OpARM64MOVBUload(v)
   168  	case OpARM64MOVBUloadidx:
   169  		return rewriteValueARM64_OpARM64MOVBUloadidx(v)
   170  	case OpARM64MOVBUreg:
   171  		return rewriteValueARM64_OpARM64MOVBUreg(v)
   172  	case OpARM64MOVBload:
   173  		return rewriteValueARM64_OpARM64MOVBload(v)
   174  	case OpARM64MOVBloadidx:
   175  		return rewriteValueARM64_OpARM64MOVBloadidx(v)
   176  	case OpARM64MOVBreg:
   177  		return rewriteValueARM64_OpARM64MOVBreg(v)
   178  	case OpARM64MOVBstore:
   179  		return rewriteValueARM64_OpARM64MOVBstore(v)
   180  	case OpARM64MOVBstoreidx:
   181  		return rewriteValueARM64_OpARM64MOVBstoreidx(v)
   182  	case OpARM64MOVBstorezero:
   183  		return rewriteValueARM64_OpARM64MOVBstorezero(v)
   184  	case OpARM64MOVBstorezeroidx:
   185  		return rewriteValueARM64_OpARM64MOVBstorezeroidx(v)
   186  	case OpARM64MOVDload:
   187  		return rewriteValueARM64_OpARM64MOVDload(v)
   188  	case OpARM64MOVDloadidx:
   189  		return rewriteValueARM64_OpARM64MOVDloadidx(v)
   190  	case OpARM64MOVDloadidx8:
   191  		return rewriteValueARM64_OpARM64MOVDloadidx8(v)
   192  	case OpARM64MOVDreg:
   193  		return rewriteValueARM64_OpARM64MOVDreg(v)
   194  	case OpARM64MOVDstore:
   195  		return rewriteValueARM64_OpARM64MOVDstore(v)
   196  	case OpARM64MOVDstoreidx:
   197  		return rewriteValueARM64_OpARM64MOVDstoreidx(v)
   198  	case OpARM64MOVDstoreidx8:
   199  		return rewriteValueARM64_OpARM64MOVDstoreidx8(v)
   200  	case OpARM64MOVDstorezero:
   201  		return rewriteValueARM64_OpARM64MOVDstorezero(v)
   202  	case OpARM64MOVDstorezeroidx:
   203  		return rewriteValueARM64_OpARM64MOVDstorezeroidx(v)
   204  	case OpARM64MOVDstorezeroidx8:
   205  		return rewriteValueARM64_OpARM64MOVDstorezeroidx8(v)
   206  	case OpARM64MOVHUload:
   207  		return rewriteValueARM64_OpARM64MOVHUload(v)
   208  	case OpARM64MOVHUloadidx:
   209  		return rewriteValueARM64_OpARM64MOVHUloadidx(v)
   210  	case OpARM64MOVHUloadidx2:
   211  		return rewriteValueARM64_OpARM64MOVHUloadidx2(v)
   212  	case OpARM64MOVHUreg:
   213  		return rewriteValueARM64_OpARM64MOVHUreg(v)
   214  	case OpARM64MOVHload:
   215  		return rewriteValueARM64_OpARM64MOVHload(v)
   216  	case OpARM64MOVHloadidx:
   217  		return rewriteValueARM64_OpARM64MOVHloadidx(v)
   218  	case OpARM64MOVHloadidx2:
   219  		return rewriteValueARM64_OpARM64MOVHloadidx2(v)
   220  	case OpARM64MOVHreg:
   221  		return rewriteValueARM64_OpARM64MOVHreg(v)
   222  	case OpARM64MOVHstore:
   223  		return rewriteValueARM64_OpARM64MOVHstore(v)
   224  	case OpARM64MOVHstoreidx:
   225  		return rewriteValueARM64_OpARM64MOVHstoreidx(v)
   226  	case OpARM64MOVHstoreidx2:
   227  		return rewriteValueARM64_OpARM64MOVHstoreidx2(v)
   228  	case OpARM64MOVHstorezero:
   229  		return rewriteValueARM64_OpARM64MOVHstorezero(v)
   230  	case OpARM64MOVHstorezeroidx:
   231  		return rewriteValueARM64_OpARM64MOVHstorezeroidx(v)
   232  	case OpARM64MOVHstorezeroidx2:
   233  		return rewriteValueARM64_OpARM64MOVHstorezeroidx2(v)
   234  	case OpARM64MOVQstorezero:
   235  		return rewriteValueARM64_OpARM64MOVQstorezero(v)
   236  	case OpARM64MOVWUload:
   237  		return rewriteValueARM64_OpARM64MOVWUload(v)
   238  	case OpARM64MOVWUloadidx:
   239  		return rewriteValueARM64_OpARM64MOVWUloadidx(v)
   240  	case OpARM64MOVWUloadidx4:
   241  		return rewriteValueARM64_OpARM64MOVWUloadidx4(v)
   242  	case OpARM64MOVWUreg:
   243  		return rewriteValueARM64_OpARM64MOVWUreg(v)
   244  	case OpARM64MOVWload:
   245  		return rewriteValueARM64_OpARM64MOVWload(v)
   246  	case OpARM64MOVWloadidx:
   247  		return rewriteValueARM64_OpARM64MOVWloadidx(v)
   248  	case OpARM64MOVWloadidx4:
   249  		return rewriteValueARM64_OpARM64MOVWloadidx4(v)
   250  	case OpARM64MOVWreg:
   251  		return rewriteValueARM64_OpARM64MOVWreg(v)
   252  	case OpARM64MOVWstore:
   253  		return rewriteValueARM64_OpARM64MOVWstore(v)
   254  	case OpARM64MOVWstoreidx:
   255  		return rewriteValueARM64_OpARM64MOVWstoreidx(v)
   256  	case OpARM64MOVWstoreidx4:
   257  		return rewriteValueARM64_OpARM64MOVWstoreidx4(v)
   258  	case OpARM64MOVWstorezero:
   259  		return rewriteValueARM64_OpARM64MOVWstorezero(v)
   260  	case OpARM64MOVWstorezeroidx:
   261  		return rewriteValueARM64_OpARM64MOVWstorezeroidx(v)
   262  	case OpARM64MOVWstorezeroidx4:
   263  		return rewriteValueARM64_OpARM64MOVWstorezeroidx4(v)
   264  	case OpARM64MSUB:
   265  		return rewriteValueARM64_OpARM64MSUB(v)
   266  	case OpARM64MSUBW:
   267  		return rewriteValueARM64_OpARM64MSUBW(v)
   268  	case OpARM64MUL:
   269  		return rewriteValueARM64_OpARM64MUL(v)
   270  	case OpARM64MULW:
   271  		return rewriteValueARM64_OpARM64MULW(v)
   272  	case OpARM64MVN:
   273  		return rewriteValueARM64_OpARM64MVN(v)
   274  	case OpARM64MVNshiftLL:
   275  		return rewriteValueARM64_OpARM64MVNshiftLL(v)
   276  	case OpARM64MVNshiftRA:
   277  		return rewriteValueARM64_OpARM64MVNshiftRA(v)
   278  	case OpARM64MVNshiftRL:
   279  		return rewriteValueARM64_OpARM64MVNshiftRL(v)
   280  	case OpARM64NEG:
   281  		return rewriteValueARM64_OpARM64NEG(v)
   282  	case OpARM64NEGshiftLL:
   283  		return rewriteValueARM64_OpARM64NEGshiftLL(v)
   284  	case OpARM64NEGshiftRA:
   285  		return rewriteValueARM64_OpARM64NEGshiftRA(v)
   286  	case OpARM64NEGshiftRL:
   287  		return rewriteValueARM64_OpARM64NEGshiftRL(v)
   288  	case OpARM64NotEqual:
   289  		return rewriteValueARM64_OpARM64NotEqual(v)
   290  	case OpARM64OR:
   291  		return rewriteValueARM64_OpARM64OR(v)
   292  	case OpARM64ORN:
   293  		return rewriteValueARM64_OpARM64ORN(v)
   294  	case OpARM64ORNshiftLL:
   295  		return rewriteValueARM64_OpARM64ORNshiftLL(v)
   296  	case OpARM64ORNshiftRA:
   297  		return rewriteValueARM64_OpARM64ORNshiftRA(v)
   298  	case OpARM64ORNshiftRL:
   299  		return rewriteValueARM64_OpARM64ORNshiftRL(v)
   300  	case OpARM64ORconst:
   301  		return rewriteValueARM64_OpARM64ORconst(v)
   302  	case OpARM64ORshiftLL:
   303  		return rewriteValueARM64_OpARM64ORshiftLL(v)
   304  	case OpARM64ORshiftRA:
   305  		return rewriteValueARM64_OpARM64ORshiftRA(v)
   306  	case OpARM64ORshiftRL:
   307  		return rewriteValueARM64_OpARM64ORshiftRL(v)
   308  	case OpARM64RORWconst:
   309  		return rewriteValueARM64_OpARM64RORWconst(v)
   310  	case OpARM64RORconst:
   311  		return rewriteValueARM64_OpARM64RORconst(v)
   312  	case OpARM64SBCSflags:
   313  		return rewriteValueARM64_OpARM64SBCSflags(v)
   314  	case OpARM64SLL:
   315  		return rewriteValueARM64_OpARM64SLL(v)
   316  	case OpARM64SLLconst:
   317  		return rewriteValueARM64_OpARM64SLLconst(v)
   318  	case OpARM64SRA:
   319  		return rewriteValueARM64_OpARM64SRA(v)
   320  	case OpARM64SRAconst:
   321  		return rewriteValueARM64_OpARM64SRAconst(v)
   322  	case OpARM64SRL:
   323  		return rewriteValueARM64_OpARM64SRL(v)
   324  	case OpARM64SRLconst:
   325  		return rewriteValueARM64_OpARM64SRLconst(v)
   326  	case OpARM64STP:
   327  		return rewriteValueARM64_OpARM64STP(v)
   328  	case OpARM64SUB:
   329  		return rewriteValueARM64_OpARM64SUB(v)
   330  	case OpARM64SUBconst:
   331  		return rewriteValueARM64_OpARM64SUBconst(v)
   332  	case OpARM64SUBshiftLL:
   333  		return rewriteValueARM64_OpARM64SUBshiftLL(v)
   334  	case OpARM64SUBshiftRA:
   335  		return rewriteValueARM64_OpARM64SUBshiftRA(v)
   336  	case OpARM64SUBshiftRL:
   337  		return rewriteValueARM64_OpARM64SUBshiftRL(v)
   338  	case OpARM64TST:
   339  		return rewriteValueARM64_OpARM64TST(v)
   340  	case OpARM64TSTW:
   341  		return rewriteValueARM64_OpARM64TSTW(v)
   342  	case OpARM64TSTWconst:
   343  		return rewriteValueARM64_OpARM64TSTWconst(v)
   344  	case OpARM64TSTconst:
   345  		return rewriteValueARM64_OpARM64TSTconst(v)
   346  	case OpARM64TSTshiftLL:
   347  		return rewriteValueARM64_OpARM64TSTshiftLL(v)
   348  	case OpARM64TSTshiftRA:
   349  		return rewriteValueARM64_OpARM64TSTshiftRA(v)
   350  	case OpARM64TSTshiftRL:
   351  		return rewriteValueARM64_OpARM64TSTshiftRL(v)
   352  	case OpARM64UBFIZ:
   353  		return rewriteValueARM64_OpARM64UBFIZ(v)
   354  	case OpARM64UBFX:
   355  		return rewriteValueARM64_OpARM64UBFX(v)
   356  	case OpARM64UDIV:
   357  		return rewriteValueARM64_OpARM64UDIV(v)
   358  	case OpARM64UDIVW:
   359  		return rewriteValueARM64_OpARM64UDIVW(v)
   360  	case OpARM64UMOD:
   361  		return rewriteValueARM64_OpARM64UMOD(v)
   362  	case OpARM64UMODW:
   363  		return rewriteValueARM64_OpARM64UMODW(v)
   364  	case OpARM64XOR:
   365  		return rewriteValueARM64_OpARM64XOR(v)
   366  	case OpARM64XORconst:
   367  		return rewriteValueARM64_OpARM64XORconst(v)
   368  	case OpARM64XORshiftLL:
   369  		return rewriteValueARM64_OpARM64XORshiftLL(v)
   370  	case OpARM64XORshiftRA:
   371  		return rewriteValueARM64_OpARM64XORshiftRA(v)
   372  	case OpARM64XORshiftRL:
   373  		return rewriteValueARM64_OpARM64XORshiftRL(v)
   374  	case OpAbs:
   375  		v.Op = OpARM64FABSD
   376  		return true
   377  	case OpAdd16:
   378  		v.Op = OpARM64ADD
   379  		return true
   380  	case OpAdd32:
   381  		v.Op = OpARM64ADD
   382  		return true
   383  	case OpAdd32F:
   384  		v.Op = OpARM64FADDS
   385  		return true
   386  	case OpAdd64:
   387  		v.Op = OpARM64ADD
   388  		return true
   389  	case OpAdd64F:
   390  		v.Op = OpARM64FADDD
   391  		return true
   392  	case OpAdd8:
   393  		v.Op = OpARM64ADD
   394  		return true
   395  	case OpAddPtr:
   396  		v.Op = OpARM64ADD
   397  		return true
   398  	case OpAddr:
   399  		return rewriteValueARM64_OpAddr(v)
   400  	case OpAnd16:
   401  		v.Op = OpARM64AND
   402  		return true
   403  	case OpAnd32:
   404  		v.Op = OpARM64AND
   405  		return true
   406  	case OpAnd64:
   407  		v.Op = OpARM64AND
   408  		return true
   409  	case OpAnd8:
   410  		v.Op = OpARM64AND
   411  		return true
   412  	case OpAndB:
   413  		v.Op = OpARM64AND
   414  		return true
   415  	case OpAtomicAdd32:
   416  		v.Op = OpARM64LoweredAtomicAdd32
   417  		return true
   418  	case OpAtomicAdd32Variant:
   419  		v.Op = OpARM64LoweredAtomicAdd32Variant
   420  		return true
   421  	case OpAtomicAdd64:
   422  		v.Op = OpARM64LoweredAtomicAdd64
   423  		return true
   424  	case OpAtomicAdd64Variant:
   425  		v.Op = OpARM64LoweredAtomicAdd64Variant
   426  		return true
   427  	case OpAtomicAnd32:
   428  		return rewriteValueARM64_OpAtomicAnd32(v)
   429  	case OpAtomicAnd32Variant:
   430  		return rewriteValueARM64_OpAtomicAnd32Variant(v)
   431  	case OpAtomicAnd8:
   432  		return rewriteValueARM64_OpAtomicAnd8(v)
   433  	case OpAtomicAnd8Variant:
   434  		return rewriteValueARM64_OpAtomicAnd8Variant(v)
   435  	case OpAtomicCompareAndSwap32:
   436  		v.Op = OpARM64LoweredAtomicCas32
   437  		return true
   438  	case OpAtomicCompareAndSwap32Variant:
   439  		v.Op = OpARM64LoweredAtomicCas32Variant
   440  		return true
   441  	case OpAtomicCompareAndSwap64:
   442  		v.Op = OpARM64LoweredAtomicCas64
   443  		return true
   444  	case OpAtomicCompareAndSwap64Variant:
   445  		v.Op = OpARM64LoweredAtomicCas64Variant
   446  		return true
   447  	case OpAtomicExchange32:
   448  		v.Op = OpARM64LoweredAtomicExchange32
   449  		return true
   450  	case OpAtomicExchange32Variant:
   451  		v.Op = OpARM64LoweredAtomicExchange32Variant
   452  		return true
   453  	case OpAtomicExchange64:
   454  		v.Op = OpARM64LoweredAtomicExchange64
   455  		return true
   456  	case OpAtomicExchange64Variant:
   457  		v.Op = OpARM64LoweredAtomicExchange64Variant
   458  		return true
   459  	case OpAtomicLoad32:
   460  		v.Op = OpARM64LDARW
   461  		return true
   462  	case OpAtomicLoad64:
   463  		v.Op = OpARM64LDAR
   464  		return true
   465  	case OpAtomicLoad8:
   466  		v.Op = OpARM64LDARB
   467  		return true
   468  	case OpAtomicLoadPtr:
   469  		v.Op = OpARM64LDAR
   470  		return true
   471  	case OpAtomicOr32:
   472  		return rewriteValueARM64_OpAtomicOr32(v)
   473  	case OpAtomicOr32Variant:
   474  		return rewriteValueARM64_OpAtomicOr32Variant(v)
   475  	case OpAtomicOr8:
   476  		return rewriteValueARM64_OpAtomicOr8(v)
   477  	case OpAtomicOr8Variant:
   478  		return rewriteValueARM64_OpAtomicOr8Variant(v)
   479  	case OpAtomicStore32:
   480  		v.Op = OpARM64STLRW
   481  		return true
   482  	case OpAtomicStore64:
   483  		v.Op = OpARM64STLR
   484  		return true
   485  	case OpAtomicStore8:
   486  		v.Op = OpARM64STLRB
   487  		return true
   488  	case OpAtomicStorePtrNoWB:
   489  		v.Op = OpARM64STLR
   490  		return true
   491  	case OpAvg64u:
   492  		return rewriteValueARM64_OpAvg64u(v)
   493  	case OpBitLen32:
   494  		return rewriteValueARM64_OpBitLen32(v)
   495  	case OpBitLen64:
   496  		return rewriteValueARM64_OpBitLen64(v)
   497  	case OpBitRev16:
   498  		return rewriteValueARM64_OpBitRev16(v)
   499  	case OpBitRev32:
   500  		v.Op = OpARM64RBITW
   501  		return true
   502  	case OpBitRev64:
   503  		v.Op = OpARM64RBIT
   504  		return true
   505  	case OpBitRev8:
   506  		return rewriteValueARM64_OpBitRev8(v)
   507  	case OpBswap32:
   508  		v.Op = OpARM64REVW
   509  		return true
   510  	case OpBswap64:
   511  		v.Op = OpARM64REV
   512  		return true
   513  	case OpCeil:
   514  		v.Op = OpARM64FRINTPD
   515  		return true
   516  	case OpClosureCall:
   517  		v.Op = OpARM64CALLclosure
   518  		return true
   519  	case OpCom16:
   520  		v.Op = OpARM64MVN
   521  		return true
   522  	case OpCom32:
   523  		v.Op = OpARM64MVN
   524  		return true
   525  	case OpCom64:
   526  		v.Op = OpARM64MVN
   527  		return true
   528  	case OpCom8:
   529  		v.Op = OpARM64MVN
   530  		return true
   531  	case OpCondSelect:
   532  		return rewriteValueARM64_OpCondSelect(v)
   533  	case OpConst16:
   534  		return rewriteValueARM64_OpConst16(v)
   535  	case OpConst32:
   536  		return rewriteValueARM64_OpConst32(v)
   537  	case OpConst32F:
   538  		return rewriteValueARM64_OpConst32F(v)
   539  	case OpConst64:
   540  		return rewriteValueARM64_OpConst64(v)
   541  	case OpConst64F:
   542  		return rewriteValueARM64_OpConst64F(v)
   543  	case OpConst8:
   544  		return rewriteValueARM64_OpConst8(v)
   545  	case OpConstBool:
   546  		return rewriteValueARM64_OpConstBool(v)
   547  	case OpConstNil:
   548  		return rewriteValueARM64_OpConstNil(v)
   549  	case OpCtz16:
   550  		return rewriteValueARM64_OpCtz16(v)
   551  	case OpCtz16NonZero:
   552  		v.Op = OpCtz32
   553  		return true
   554  	case OpCtz32:
   555  		return rewriteValueARM64_OpCtz32(v)
   556  	case OpCtz32NonZero:
   557  		v.Op = OpCtz32
   558  		return true
   559  	case OpCtz64:
   560  		return rewriteValueARM64_OpCtz64(v)
   561  	case OpCtz64NonZero:
   562  		v.Op = OpCtz64
   563  		return true
   564  	case OpCtz8:
   565  		return rewriteValueARM64_OpCtz8(v)
   566  	case OpCtz8NonZero:
   567  		v.Op = OpCtz32
   568  		return true
   569  	case OpCvt32Fto32:
   570  		v.Op = OpARM64FCVTZSSW
   571  		return true
   572  	case OpCvt32Fto32U:
   573  		v.Op = OpARM64FCVTZUSW
   574  		return true
   575  	case OpCvt32Fto64:
   576  		v.Op = OpARM64FCVTZSS
   577  		return true
   578  	case OpCvt32Fto64F:
   579  		v.Op = OpARM64FCVTSD
   580  		return true
   581  	case OpCvt32Fto64U:
   582  		v.Op = OpARM64FCVTZUS
   583  		return true
   584  	case OpCvt32Uto32F:
   585  		v.Op = OpARM64UCVTFWS
   586  		return true
   587  	case OpCvt32Uto64F:
   588  		v.Op = OpARM64UCVTFWD
   589  		return true
   590  	case OpCvt32to32F:
   591  		v.Op = OpARM64SCVTFWS
   592  		return true
   593  	case OpCvt32to64F:
   594  		v.Op = OpARM64SCVTFWD
   595  		return true
   596  	case OpCvt64Fto32:
   597  		v.Op = OpARM64FCVTZSDW
   598  		return true
   599  	case OpCvt64Fto32F:
   600  		v.Op = OpARM64FCVTDS
   601  		return true
   602  	case OpCvt64Fto32U:
   603  		v.Op = OpARM64FCVTZUDW
   604  		return true
   605  	case OpCvt64Fto64:
   606  		v.Op = OpARM64FCVTZSD
   607  		return true
   608  	case OpCvt64Fto64U:
   609  		v.Op = OpARM64FCVTZUD
   610  		return true
   611  	case OpCvt64Uto32F:
   612  		v.Op = OpARM64UCVTFS
   613  		return true
   614  	case OpCvt64Uto64F:
   615  		v.Op = OpARM64UCVTFD
   616  		return true
   617  	case OpCvt64to32F:
   618  		v.Op = OpARM64SCVTFS
   619  		return true
   620  	case OpCvt64to64F:
   621  		v.Op = OpARM64SCVTFD
   622  		return true
   623  	case OpCvtBoolToUint8:
   624  		v.Op = OpCopy
   625  		return true
   626  	case OpDiv16:
   627  		return rewriteValueARM64_OpDiv16(v)
   628  	case OpDiv16u:
   629  		return rewriteValueARM64_OpDiv16u(v)
   630  	case OpDiv32:
   631  		return rewriteValueARM64_OpDiv32(v)
   632  	case OpDiv32F:
   633  		v.Op = OpARM64FDIVS
   634  		return true
   635  	case OpDiv32u:
   636  		v.Op = OpARM64UDIVW
   637  		return true
   638  	case OpDiv64:
   639  		return rewriteValueARM64_OpDiv64(v)
   640  	case OpDiv64F:
   641  		v.Op = OpARM64FDIVD
   642  		return true
   643  	case OpDiv64u:
   644  		v.Op = OpARM64UDIV
   645  		return true
   646  	case OpDiv8:
   647  		return rewriteValueARM64_OpDiv8(v)
   648  	case OpDiv8u:
   649  		return rewriteValueARM64_OpDiv8u(v)
   650  	case OpEq16:
   651  		return rewriteValueARM64_OpEq16(v)
   652  	case OpEq32:
   653  		return rewriteValueARM64_OpEq32(v)
   654  	case OpEq32F:
   655  		return rewriteValueARM64_OpEq32F(v)
   656  	case OpEq64:
   657  		return rewriteValueARM64_OpEq64(v)
   658  	case OpEq64F:
   659  		return rewriteValueARM64_OpEq64F(v)
   660  	case OpEq8:
   661  		return rewriteValueARM64_OpEq8(v)
   662  	case OpEqB:
   663  		return rewriteValueARM64_OpEqB(v)
   664  	case OpEqPtr:
   665  		return rewriteValueARM64_OpEqPtr(v)
   666  	case OpFMA:
   667  		return rewriteValueARM64_OpFMA(v)
   668  	case OpFloor:
   669  		v.Op = OpARM64FRINTMD
   670  		return true
   671  	case OpGetCallerPC:
   672  		v.Op = OpARM64LoweredGetCallerPC
   673  		return true
   674  	case OpGetCallerSP:
   675  		v.Op = OpARM64LoweredGetCallerSP
   676  		return true
   677  	case OpGetClosurePtr:
   678  		v.Op = OpARM64LoweredGetClosurePtr
   679  		return true
   680  	case OpHmul32:
   681  		return rewriteValueARM64_OpHmul32(v)
   682  	case OpHmul32u:
   683  		return rewriteValueARM64_OpHmul32u(v)
   684  	case OpHmul64:
   685  		v.Op = OpARM64MULH
   686  		return true
   687  	case OpHmul64u:
   688  		v.Op = OpARM64UMULH
   689  		return true
   690  	case OpInterCall:
   691  		v.Op = OpARM64CALLinter
   692  		return true
   693  	case OpIsInBounds:
   694  		return rewriteValueARM64_OpIsInBounds(v)
   695  	case OpIsNonNil:
   696  		return rewriteValueARM64_OpIsNonNil(v)
   697  	case OpIsSliceInBounds:
   698  		return rewriteValueARM64_OpIsSliceInBounds(v)
   699  	case OpLeq16:
   700  		return rewriteValueARM64_OpLeq16(v)
   701  	case OpLeq16U:
   702  		return rewriteValueARM64_OpLeq16U(v)
   703  	case OpLeq32:
   704  		return rewriteValueARM64_OpLeq32(v)
   705  	case OpLeq32F:
   706  		return rewriteValueARM64_OpLeq32F(v)
   707  	case OpLeq32U:
   708  		return rewriteValueARM64_OpLeq32U(v)
   709  	case OpLeq64:
   710  		return rewriteValueARM64_OpLeq64(v)
   711  	case OpLeq64F:
   712  		return rewriteValueARM64_OpLeq64F(v)
   713  	case OpLeq64U:
   714  		return rewriteValueARM64_OpLeq64U(v)
   715  	case OpLeq8:
   716  		return rewriteValueARM64_OpLeq8(v)
   717  	case OpLeq8U:
   718  		return rewriteValueARM64_OpLeq8U(v)
   719  	case OpLess16:
   720  		return rewriteValueARM64_OpLess16(v)
   721  	case OpLess16U:
   722  		return rewriteValueARM64_OpLess16U(v)
   723  	case OpLess32:
   724  		return rewriteValueARM64_OpLess32(v)
   725  	case OpLess32F:
   726  		return rewriteValueARM64_OpLess32F(v)
   727  	case OpLess32U:
   728  		return rewriteValueARM64_OpLess32U(v)
   729  	case OpLess64:
   730  		return rewriteValueARM64_OpLess64(v)
   731  	case OpLess64F:
   732  		return rewriteValueARM64_OpLess64F(v)
   733  	case OpLess64U:
   734  		return rewriteValueARM64_OpLess64U(v)
   735  	case OpLess8:
   736  		return rewriteValueARM64_OpLess8(v)
   737  	case OpLess8U:
   738  		return rewriteValueARM64_OpLess8U(v)
   739  	case OpLoad:
   740  		return rewriteValueARM64_OpLoad(v)
   741  	case OpLocalAddr:
   742  		return rewriteValueARM64_OpLocalAddr(v)
   743  	case OpLsh16x16:
   744  		return rewriteValueARM64_OpLsh16x16(v)
   745  	case OpLsh16x32:
   746  		return rewriteValueARM64_OpLsh16x32(v)
   747  	case OpLsh16x64:
   748  		return rewriteValueARM64_OpLsh16x64(v)
   749  	case OpLsh16x8:
   750  		return rewriteValueARM64_OpLsh16x8(v)
   751  	case OpLsh32x16:
   752  		return rewriteValueARM64_OpLsh32x16(v)
   753  	case OpLsh32x32:
   754  		return rewriteValueARM64_OpLsh32x32(v)
   755  	case OpLsh32x64:
   756  		return rewriteValueARM64_OpLsh32x64(v)
   757  	case OpLsh32x8:
   758  		return rewriteValueARM64_OpLsh32x8(v)
   759  	case OpLsh64x16:
   760  		return rewriteValueARM64_OpLsh64x16(v)
   761  	case OpLsh64x32:
   762  		return rewriteValueARM64_OpLsh64x32(v)
   763  	case OpLsh64x64:
   764  		return rewriteValueARM64_OpLsh64x64(v)
   765  	case OpLsh64x8:
   766  		return rewriteValueARM64_OpLsh64x8(v)
   767  	case OpLsh8x16:
   768  		return rewriteValueARM64_OpLsh8x16(v)
   769  	case OpLsh8x32:
   770  		return rewriteValueARM64_OpLsh8x32(v)
   771  	case OpLsh8x64:
   772  		return rewriteValueARM64_OpLsh8x64(v)
   773  	case OpLsh8x8:
   774  		return rewriteValueARM64_OpLsh8x8(v)
   775  	case OpMod16:
   776  		return rewriteValueARM64_OpMod16(v)
   777  	case OpMod16u:
   778  		return rewriteValueARM64_OpMod16u(v)
   779  	case OpMod32:
   780  		return rewriteValueARM64_OpMod32(v)
   781  	case OpMod32u:
   782  		v.Op = OpARM64UMODW
   783  		return true
   784  	case OpMod64:
   785  		return rewriteValueARM64_OpMod64(v)
   786  	case OpMod64u:
   787  		v.Op = OpARM64UMOD
   788  		return true
   789  	case OpMod8:
   790  		return rewriteValueARM64_OpMod8(v)
   791  	case OpMod8u:
   792  		return rewriteValueARM64_OpMod8u(v)
   793  	case OpMove:
   794  		return rewriteValueARM64_OpMove(v)
   795  	case OpMul16:
   796  		v.Op = OpARM64MULW
   797  		return true
   798  	case OpMul32:
   799  		v.Op = OpARM64MULW
   800  		return true
   801  	case OpMul32F:
   802  		v.Op = OpARM64FMULS
   803  		return true
   804  	case OpMul64:
   805  		v.Op = OpARM64MUL
   806  		return true
   807  	case OpMul64F:
   808  		v.Op = OpARM64FMULD
   809  		return true
   810  	case OpMul64uhilo:
   811  		v.Op = OpARM64LoweredMuluhilo
   812  		return true
   813  	case OpMul8:
   814  		v.Op = OpARM64MULW
   815  		return true
   816  	case OpNeg16:
   817  		v.Op = OpARM64NEG
   818  		return true
   819  	case OpNeg32:
   820  		v.Op = OpARM64NEG
   821  		return true
   822  	case OpNeg32F:
   823  		v.Op = OpARM64FNEGS
   824  		return true
   825  	case OpNeg64:
   826  		v.Op = OpARM64NEG
   827  		return true
   828  	case OpNeg64F:
   829  		v.Op = OpARM64FNEGD
   830  		return true
   831  	case OpNeg8:
   832  		v.Op = OpARM64NEG
   833  		return true
   834  	case OpNeq16:
   835  		return rewriteValueARM64_OpNeq16(v)
   836  	case OpNeq32:
   837  		return rewriteValueARM64_OpNeq32(v)
   838  	case OpNeq32F:
   839  		return rewriteValueARM64_OpNeq32F(v)
   840  	case OpNeq64:
   841  		return rewriteValueARM64_OpNeq64(v)
   842  	case OpNeq64F:
   843  		return rewriteValueARM64_OpNeq64F(v)
   844  	case OpNeq8:
   845  		return rewriteValueARM64_OpNeq8(v)
   846  	case OpNeqB:
   847  		v.Op = OpARM64XOR
   848  		return true
   849  	case OpNeqPtr:
   850  		return rewriteValueARM64_OpNeqPtr(v)
   851  	case OpNilCheck:
   852  		v.Op = OpARM64LoweredNilCheck
   853  		return true
   854  	case OpNot:
   855  		return rewriteValueARM64_OpNot(v)
   856  	case OpOffPtr:
   857  		return rewriteValueARM64_OpOffPtr(v)
   858  	case OpOr16:
   859  		v.Op = OpARM64OR
   860  		return true
   861  	case OpOr32:
   862  		v.Op = OpARM64OR
   863  		return true
   864  	case OpOr64:
   865  		v.Op = OpARM64OR
   866  		return true
   867  	case OpOr8:
   868  		v.Op = OpARM64OR
   869  		return true
   870  	case OpOrB:
   871  		v.Op = OpARM64OR
   872  		return true
   873  	case OpPanicBounds:
   874  		return rewriteValueARM64_OpPanicBounds(v)
   875  	case OpPopCount16:
   876  		return rewriteValueARM64_OpPopCount16(v)
   877  	case OpPopCount32:
   878  		return rewriteValueARM64_OpPopCount32(v)
   879  	case OpPopCount64:
   880  		return rewriteValueARM64_OpPopCount64(v)
   881  	case OpRotateLeft16:
   882  		return rewriteValueARM64_OpRotateLeft16(v)
   883  	case OpRotateLeft32:
   884  		return rewriteValueARM64_OpRotateLeft32(v)
   885  	case OpRotateLeft64:
   886  		return rewriteValueARM64_OpRotateLeft64(v)
   887  	case OpRotateLeft8:
   888  		return rewriteValueARM64_OpRotateLeft8(v)
   889  	case OpRound:
   890  		v.Op = OpARM64FRINTAD
   891  		return true
   892  	case OpRound32F:
   893  		v.Op = OpARM64LoweredRound32F
   894  		return true
   895  	case OpRound64F:
   896  		v.Op = OpARM64LoweredRound64F
   897  		return true
   898  	case OpRoundToEven:
   899  		v.Op = OpARM64FRINTND
   900  		return true
   901  	case OpRsh16Ux16:
   902  		return rewriteValueARM64_OpRsh16Ux16(v)
   903  	case OpRsh16Ux32:
   904  		return rewriteValueARM64_OpRsh16Ux32(v)
   905  	case OpRsh16Ux64:
   906  		return rewriteValueARM64_OpRsh16Ux64(v)
   907  	case OpRsh16Ux8:
   908  		return rewriteValueARM64_OpRsh16Ux8(v)
   909  	case OpRsh16x16:
   910  		return rewriteValueARM64_OpRsh16x16(v)
   911  	case OpRsh16x32:
   912  		return rewriteValueARM64_OpRsh16x32(v)
   913  	case OpRsh16x64:
   914  		return rewriteValueARM64_OpRsh16x64(v)
   915  	case OpRsh16x8:
   916  		return rewriteValueARM64_OpRsh16x8(v)
   917  	case OpRsh32Ux16:
   918  		return rewriteValueARM64_OpRsh32Ux16(v)
   919  	case OpRsh32Ux32:
   920  		return rewriteValueARM64_OpRsh32Ux32(v)
   921  	case OpRsh32Ux64:
   922  		return rewriteValueARM64_OpRsh32Ux64(v)
   923  	case OpRsh32Ux8:
   924  		return rewriteValueARM64_OpRsh32Ux8(v)
   925  	case OpRsh32x16:
   926  		return rewriteValueARM64_OpRsh32x16(v)
   927  	case OpRsh32x32:
   928  		return rewriteValueARM64_OpRsh32x32(v)
   929  	case OpRsh32x64:
   930  		return rewriteValueARM64_OpRsh32x64(v)
   931  	case OpRsh32x8:
   932  		return rewriteValueARM64_OpRsh32x8(v)
   933  	case OpRsh64Ux16:
   934  		return rewriteValueARM64_OpRsh64Ux16(v)
   935  	case OpRsh64Ux32:
   936  		return rewriteValueARM64_OpRsh64Ux32(v)
   937  	case OpRsh64Ux64:
   938  		return rewriteValueARM64_OpRsh64Ux64(v)
   939  	case OpRsh64Ux8:
   940  		return rewriteValueARM64_OpRsh64Ux8(v)
   941  	case OpRsh64x16:
   942  		return rewriteValueARM64_OpRsh64x16(v)
   943  	case OpRsh64x32:
   944  		return rewriteValueARM64_OpRsh64x32(v)
   945  	case OpRsh64x64:
   946  		return rewriteValueARM64_OpRsh64x64(v)
   947  	case OpRsh64x8:
   948  		return rewriteValueARM64_OpRsh64x8(v)
   949  	case OpRsh8Ux16:
   950  		return rewriteValueARM64_OpRsh8Ux16(v)
   951  	case OpRsh8Ux32:
   952  		return rewriteValueARM64_OpRsh8Ux32(v)
   953  	case OpRsh8Ux64:
   954  		return rewriteValueARM64_OpRsh8Ux64(v)
   955  	case OpRsh8Ux8:
   956  		return rewriteValueARM64_OpRsh8Ux8(v)
   957  	case OpRsh8x16:
   958  		return rewriteValueARM64_OpRsh8x16(v)
   959  	case OpRsh8x32:
   960  		return rewriteValueARM64_OpRsh8x32(v)
   961  	case OpRsh8x64:
   962  		return rewriteValueARM64_OpRsh8x64(v)
   963  	case OpRsh8x8:
   964  		return rewriteValueARM64_OpRsh8x8(v)
   965  	case OpSelect0:
   966  		return rewriteValueARM64_OpSelect0(v)
   967  	case OpSelect1:
   968  		return rewriteValueARM64_OpSelect1(v)
   969  	case OpSignExt16to32:
   970  		v.Op = OpARM64MOVHreg
   971  		return true
   972  	case OpSignExt16to64:
   973  		v.Op = OpARM64MOVHreg
   974  		return true
   975  	case OpSignExt32to64:
   976  		v.Op = OpARM64MOVWreg
   977  		return true
   978  	case OpSignExt8to16:
   979  		v.Op = OpARM64MOVBreg
   980  		return true
   981  	case OpSignExt8to32:
   982  		v.Op = OpARM64MOVBreg
   983  		return true
   984  	case OpSignExt8to64:
   985  		v.Op = OpARM64MOVBreg
   986  		return true
   987  	case OpSlicemask:
   988  		return rewriteValueARM64_OpSlicemask(v)
   989  	case OpSqrt:
   990  		v.Op = OpARM64FSQRTD
   991  		return true
   992  	case OpStaticCall:
   993  		v.Op = OpARM64CALLstatic
   994  		return true
   995  	case OpStore:
   996  		return rewriteValueARM64_OpStore(v)
   997  	case OpSub16:
   998  		v.Op = OpARM64SUB
   999  		return true
  1000  	case OpSub32:
  1001  		v.Op = OpARM64SUB
  1002  		return true
  1003  	case OpSub32F:
  1004  		v.Op = OpARM64FSUBS
  1005  		return true
  1006  	case OpSub64:
  1007  		v.Op = OpARM64SUB
  1008  		return true
  1009  	case OpSub64F:
  1010  		v.Op = OpARM64FSUBD
  1011  		return true
  1012  	case OpSub8:
  1013  		v.Op = OpARM64SUB
  1014  		return true
  1015  	case OpSubPtr:
  1016  		v.Op = OpARM64SUB
  1017  		return true
  1018  	case OpTrunc:
  1019  		v.Op = OpARM64FRINTZD
  1020  		return true
  1021  	case OpTrunc16to8:
  1022  		v.Op = OpCopy
  1023  		return true
  1024  	case OpTrunc32to16:
  1025  		v.Op = OpCopy
  1026  		return true
  1027  	case OpTrunc32to8:
  1028  		v.Op = OpCopy
  1029  		return true
  1030  	case OpTrunc64to16:
  1031  		v.Op = OpCopy
  1032  		return true
  1033  	case OpTrunc64to32:
  1034  		v.Op = OpCopy
  1035  		return true
  1036  	case OpTrunc64to8:
  1037  		v.Op = OpCopy
  1038  		return true
  1039  	case OpWB:
  1040  		v.Op = OpARM64LoweredWB
  1041  		return true
  1042  	case OpXor16:
  1043  		v.Op = OpARM64XOR
  1044  		return true
  1045  	case OpXor32:
  1046  		v.Op = OpARM64XOR
  1047  		return true
  1048  	case OpXor64:
  1049  		v.Op = OpARM64XOR
  1050  		return true
  1051  	case OpXor8:
  1052  		v.Op = OpARM64XOR
  1053  		return true
  1054  	case OpZero:
  1055  		return rewriteValueARM64_OpZero(v)
  1056  	case OpZeroExt16to32:
  1057  		v.Op = OpARM64MOVHUreg
  1058  		return true
  1059  	case OpZeroExt16to64:
  1060  		v.Op = OpARM64MOVHUreg
  1061  		return true
  1062  	case OpZeroExt32to64:
  1063  		v.Op = OpARM64MOVWUreg
  1064  		return true
  1065  	case OpZeroExt8to16:
  1066  		v.Op = OpARM64MOVBUreg
  1067  		return true
  1068  	case OpZeroExt8to32:
  1069  		v.Op = OpARM64MOVBUreg
  1070  		return true
  1071  	case OpZeroExt8to64:
  1072  		v.Op = OpARM64MOVBUreg
  1073  		return true
  1074  	}
  1075  	return false
  1076  }
  1077  func rewriteValueARM64_OpARM64ADCSflags(v *Value) bool {
  1078  	v_2 := v.Args[2]
  1079  	v_1 := v.Args[1]
  1080  	v_0 := v.Args[0]
  1081  	b := v.Block
  1082  	typ := &b.Func.Config.Types
  1083  	// match: (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (ADCzerocarry <typ.UInt64> c))))
  1084  	// result: (ADCSflags x y c)
  1085  	for {
  1086  		x := v_0
  1087  		y := v_1
  1088  		if v_2.Op != OpSelect1 || v_2.Type != types.TypeFlags {
  1089  			break
  1090  		}
  1091  		v_2_0 := v_2.Args[0]
  1092  		if v_2_0.Op != OpARM64ADDSconstflags || auxIntToInt64(v_2_0.AuxInt) != -1 {
  1093  			break
  1094  		}
  1095  		v_2_0_0 := v_2_0.Args[0]
  1096  		if v_2_0_0.Op != OpARM64ADCzerocarry || v_2_0_0.Type != typ.UInt64 {
  1097  			break
  1098  		}
  1099  		c := v_2_0_0.Args[0]
  1100  		v.reset(OpARM64ADCSflags)
  1101  		v.AddArg3(x, y, c)
  1102  		return true
  1103  	}
  1104  	// match: (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (MOVDconst [0]))))
  1105  	// result: (ADDSflags x y)
  1106  	for {
  1107  		x := v_0
  1108  		y := v_1
  1109  		if v_2.Op != OpSelect1 || v_2.Type != types.TypeFlags {
  1110  			break
  1111  		}
  1112  		v_2_0 := v_2.Args[0]
  1113  		if v_2_0.Op != OpARM64ADDSconstflags || auxIntToInt64(v_2_0.AuxInt) != -1 {
  1114  			break
  1115  		}
  1116  		v_2_0_0 := v_2_0.Args[0]
  1117  		if v_2_0_0.Op != OpARM64MOVDconst || auxIntToInt64(v_2_0_0.AuxInt) != 0 {
  1118  			break
  1119  		}
  1120  		v.reset(OpARM64ADDSflags)
  1121  		v.AddArg2(x, y)
  1122  		return true
  1123  	}
  1124  	return false
  1125  }
  1126  func rewriteValueARM64_OpARM64ADD(v *Value) bool {
  1127  	v_1 := v.Args[1]
  1128  	v_0 := v.Args[0]
  1129  	b := v.Block
  1130  	typ := &b.Func.Config.Types
  1131  	// match: (ADD x (MOVDconst [c]))
  1132  	// result: (ADDconst [c] x)
  1133  	for {
  1134  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1135  			x := v_0
  1136  			if v_1.Op != OpARM64MOVDconst {
  1137  				continue
  1138  			}
  1139  			c := auxIntToInt64(v_1.AuxInt)
  1140  			v.reset(OpARM64ADDconst)
  1141  			v.AuxInt = int64ToAuxInt(c)
  1142  			v.AddArg(x)
  1143  			return true
  1144  		}
  1145  		break
  1146  	}
  1147  	// match: (ADD a l:(MUL x y))
  1148  	// cond: l.Uses==1 && clobber(l)
  1149  	// result: (MADD a x y)
  1150  	for {
  1151  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1152  			a := v_0
  1153  			l := v_1
  1154  			if l.Op != OpARM64MUL {
  1155  				continue
  1156  			}
  1157  			y := l.Args[1]
  1158  			x := l.Args[0]
  1159  			if !(l.Uses == 1 && clobber(l)) {
  1160  				continue
  1161  			}
  1162  			v.reset(OpARM64MADD)
  1163  			v.AddArg3(a, x, y)
  1164  			return true
  1165  		}
  1166  		break
  1167  	}
  1168  	// match: (ADD a l:(MNEG x y))
  1169  	// cond: l.Uses==1 && clobber(l)
  1170  	// result: (MSUB a x y)
  1171  	for {
  1172  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1173  			a := v_0
  1174  			l := v_1
  1175  			if l.Op != OpARM64MNEG {
  1176  				continue
  1177  			}
  1178  			y := l.Args[1]
  1179  			x := l.Args[0]
  1180  			if !(l.Uses == 1 && clobber(l)) {
  1181  				continue
  1182  			}
  1183  			v.reset(OpARM64MSUB)
  1184  			v.AddArg3(a, x, y)
  1185  			return true
  1186  		}
  1187  		break
  1188  	}
  1189  	// match: (ADD a l:(MULW x y))
  1190  	// cond: a.Type.Size() != 8 && l.Uses==1 && clobber(l)
  1191  	// result: (MADDW a x y)
  1192  	for {
  1193  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1194  			a := v_0
  1195  			l := v_1
  1196  			if l.Op != OpARM64MULW {
  1197  				continue
  1198  			}
  1199  			y := l.Args[1]
  1200  			x := l.Args[0]
  1201  			if !(a.Type.Size() != 8 && l.Uses == 1 && clobber(l)) {
  1202  				continue
  1203  			}
  1204  			v.reset(OpARM64MADDW)
  1205  			v.AddArg3(a, x, y)
  1206  			return true
  1207  		}
  1208  		break
  1209  	}
  1210  	// match: (ADD a l:(MNEGW x y))
  1211  	// cond: a.Type.Size() != 8 && l.Uses==1 && clobber(l)
  1212  	// result: (MSUBW a x y)
  1213  	for {
  1214  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1215  			a := v_0
  1216  			l := v_1
  1217  			if l.Op != OpARM64MNEGW {
  1218  				continue
  1219  			}
  1220  			y := l.Args[1]
  1221  			x := l.Args[0]
  1222  			if !(a.Type.Size() != 8 && l.Uses == 1 && clobber(l)) {
  1223  				continue
  1224  			}
  1225  			v.reset(OpARM64MSUBW)
  1226  			v.AddArg3(a, x, y)
  1227  			return true
  1228  		}
  1229  		break
  1230  	}
  1231  	// match: (ADD x (NEG y))
  1232  	// result: (SUB x y)
  1233  	for {
  1234  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1235  			x := v_0
  1236  			if v_1.Op != OpARM64NEG {
  1237  				continue
  1238  			}
  1239  			y := v_1.Args[0]
  1240  			v.reset(OpARM64SUB)
  1241  			v.AddArg2(x, y)
  1242  			return true
  1243  		}
  1244  		break
  1245  	}
  1246  	// match: (ADD x0 x1:(SLLconst [c] y))
  1247  	// cond: clobberIfDead(x1)
  1248  	// result: (ADDshiftLL x0 y [c])
  1249  	for {
  1250  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1251  			x0 := v_0
  1252  			x1 := v_1
  1253  			if x1.Op != OpARM64SLLconst {
  1254  				continue
  1255  			}
  1256  			c := auxIntToInt64(x1.AuxInt)
  1257  			y := x1.Args[0]
  1258  			if !(clobberIfDead(x1)) {
  1259  				continue
  1260  			}
  1261  			v.reset(OpARM64ADDshiftLL)
  1262  			v.AuxInt = int64ToAuxInt(c)
  1263  			v.AddArg2(x0, y)
  1264  			return true
  1265  		}
  1266  		break
  1267  	}
  1268  	// match: (ADD x0 x1:(SRLconst [c] y))
  1269  	// cond: clobberIfDead(x1)
  1270  	// result: (ADDshiftRL x0 y [c])
  1271  	for {
  1272  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1273  			x0 := v_0
  1274  			x1 := v_1
  1275  			if x1.Op != OpARM64SRLconst {
  1276  				continue
  1277  			}
  1278  			c := auxIntToInt64(x1.AuxInt)
  1279  			y := x1.Args[0]
  1280  			if !(clobberIfDead(x1)) {
  1281  				continue
  1282  			}
  1283  			v.reset(OpARM64ADDshiftRL)
  1284  			v.AuxInt = int64ToAuxInt(c)
  1285  			v.AddArg2(x0, y)
  1286  			return true
  1287  		}
  1288  		break
  1289  	}
  1290  	// match: (ADD x0 x1:(SRAconst [c] y))
  1291  	// cond: clobberIfDead(x1)
  1292  	// result: (ADDshiftRA x0 y [c])
  1293  	for {
  1294  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1295  			x0 := v_0
  1296  			x1 := v_1
  1297  			if x1.Op != OpARM64SRAconst {
  1298  				continue
  1299  			}
  1300  			c := auxIntToInt64(x1.AuxInt)
  1301  			y := x1.Args[0]
  1302  			if !(clobberIfDead(x1)) {
  1303  				continue
  1304  			}
  1305  			v.reset(OpARM64ADDshiftRA)
  1306  			v.AuxInt = int64ToAuxInt(c)
  1307  			v.AddArg2(x0, y)
  1308  			return true
  1309  		}
  1310  		break
  1311  	}
  1312  	// match: (ADD (SLL x (ANDconst <t> [63] y)) (CSEL0 <typ.UInt64> [cc] (SRL <typ.UInt64> x (SUB <t> (MOVDconst [64]) (ANDconst <t> [63] y))) (CMPconst [64] (SUB <t> (MOVDconst [64]) (ANDconst <t> [63] y)))))
  1313  	// cond: cc == OpARM64LessThanU
  1314  	// result: (ROR x (NEG <t> y))
  1315  	for {
  1316  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1317  			if v_0.Op != OpARM64SLL {
  1318  				continue
  1319  			}
  1320  			_ = v_0.Args[1]
  1321  			x := v_0.Args[0]
  1322  			v_0_1 := v_0.Args[1]
  1323  			if v_0_1.Op != OpARM64ANDconst {
  1324  				continue
  1325  			}
  1326  			t := v_0_1.Type
  1327  			if auxIntToInt64(v_0_1.AuxInt) != 63 {
  1328  				continue
  1329  			}
  1330  			y := v_0_1.Args[0]
  1331  			if v_1.Op != OpARM64CSEL0 || v_1.Type != typ.UInt64 {
  1332  				continue
  1333  			}
  1334  			cc := auxIntToOp(v_1.AuxInt)
  1335  			_ = v_1.Args[1]
  1336  			v_1_0 := v_1.Args[0]
  1337  			if v_1_0.Op != OpARM64SRL || v_1_0.Type != typ.UInt64 {
  1338  				continue
  1339  			}
  1340  			_ = v_1_0.Args[1]
  1341  			if x != v_1_0.Args[0] {
  1342  				continue
  1343  			}
  1344  			v_1_0_1 := v_1_0.Args[1]
  1345  			if v_1_0_1.Op != OpARM64SUB || v_1_0_1.Type != t {
  1346  				continue
  1347  			}
  1348  			_ = v_1_0_1.Args[1]
  1349  			v_1_0_1_0 := v_1_0_1.Args[0]
  1350  			if v_1_0_1_0.Op != OpARM64MOVDconst || auxIntToInt64(v_1_0_1_0.AuxInt) != 64 {
  1351  				continue
  1352  			}
  1353  			v_1_0_1_1 := v_1_0_1.Args[1]
  1354  			if v_1_0_1_1.Op != OpARM64ANDconst || v_1_0_1_1.Type != t || auxIntToInt64(v_1_0_1_1.AuxInt) != 63 || y != v_1_0_1_1.Args[0] {
  1355  				continue
  1356  			}
  1357  			v_1_1 := v_1.Args[1]
  1358  			if v_1_1.Op != OpARM64CMPconst || auxIntToInt64(v_1_1.AuxInt) != 64 {
  1359  				continue
  1360  			}
  1361  			v_1_1_0 := v_1_1.Args[0]
  1362  			if v_1_1_0.Op != OpARM64SUB || v_1_1_0.Type != t {
  1363  				continue
  1364  			}
  1365  			_ = v_1_1_0.Args[1]
  1366  			v_1_1_0_0 := v_1_1_0.Args[0]
  1367  			if v_1_1_0_0.Op != OpARM64MOVDconst || auxIntToInt64(v_1_1_0_0.AuxInt) != 64 {
  1368  				continue
  1369  			}
  1370  			v_1_1_0_1 := v_1_1_0.Args[1]
  1371  			if v_1_1_0_1.Op != OpARM64ANDconst || v_1_1_0_1.Type != t || auxIntToInt64(v_1_1_0_1.AuxInt) != 63 || y != v_1_1_0_1.Args[0] || !(cc == OpARM64LessThanU) {
  1372  				continue
  1373  			}
  1374  			v.reset(OpARM64ROR)
  1375  			v0 := b.NewValue0(v.Pos, OpARM64NEG, t)
  1376  			v0.AddArg(y)
  1377  			v.AddArg2(x, v0)
  1378  			return true
  1379  		}
  1380  		break
  1381  	}
  1382  	// match: (ADD (SRL <typ.UInt64> x (ANDconst <t> [63] y)) (CSEL0 <typ.UInt64> [cc] (SLL x (SUB <t> (MOVDconst [64]) (ANDconst <t> [63] y))) (CMPconst [64] (SUB <t> (MOVDconst [64]) (ANDconst <t> [63] y)))))
  1383  	// cond: cc == OpARM64LessThanU
  1384  	// result: (ROR x y)
  1385  	for {
  1386  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1387  			if v_0.Op != OpARM64SRL || v_0.Type != typ.UInt64 {
  1388  				continue
  1389  			}
  1390  			_ = v_0.Args[1]
  1391  			x := v_0.Args[0]
  1392  			v_0_1 := v_0.Args[1]
  1393  			if v_0_1.Op != OpARM64ANDconst {
  1394  				continue
  1395  			}
  1396  			t := v_0_1.Type
  1397  			if auxIntToInt64(v_0_1.AuxInt) != 63 {
  1398  				continue
  1399  			}
  1400  			y := v_0_1.Args[0]
  1401  			if v_1.Op != OpARM64CSEL0 || v_1.Type != typ.UInt64 {
  1402  				continue
  1403  			}
  1404  			cc := auxIntToOp(v_1.AuxInt)
  1405  			_ = v_1.Args[1]
  1406  			v_1_0 := v_1.Args[0]
  1407  			if v_1_0.Op != OpARM64SLL {
  1408  				continue
  1409  			}
  1410  			_ = v_1_0.Args[1]
  1411  			if x != v_1_0.Args[0] {
  1412  				continue
  1413  			}
  1414  			v_1_0_1 := v_1_0.Args[1]
  1415  			if v_1_0_1.Op != OpARM64SUB || v_1_0_1.Type != t {
  1416  				continue
  1417  			}
  1418  			_ = v_1_0_1.Args[1]
  1419  			v_1_0_1_0 := v_1_0_1.Args[0]
  1420  			if v_1_0_1_0.Op != OpARM64MOVDconst || auxIntToInt64(v_1_0_1_0.AuxInt) != 64 {
  1421  				continue
  1422  			}
  1423  			v_1_0_1_1 := v_1_0_1.Args[1]
  1424  			if v_1_0_1_1.Op != OpARM64ANDconst || v_1_0_1_1.Type != t || auxIntToInt64(v_1_0_1_1.AuxInt) != 63 || y != v_1_0_1_1.Args[0] {
  1425  				continue
  1426  			}
  1427  			v_1_1 := v_1.Args[1]
  1428  			if v_1_1.Op != OpARM64CMPconst || auxIntToInt64(v_1_1.AuxInt) != 64 {
  1429  				continue
  1430  			}
  1431  			v_1_1_0 := v_1_1.Args[0]
  1432  			if v_1_1_0.Op != OpARM64SUB || v_1_1_0.Type != t {
  1433  				continue
  1434  			}
  1435  			_ = v_1_1_0.Args[1]
  1436  			v_1_1_0_0 := v_1_1_0.Args[0]
  1437  			if v_1_1_0_0.Op != OpARM64MOVDconst || auxIntToInt64(v_1_1_0_0.AuxInt) != 64 {
  1438  				continue
  1439  			}
  1440  			v_1_1_0_1 := v_1_1_0.Args[1]
  1441  			if v_1_1_0_1.Op != OpARM64ANDconst || v_1_1_0_1.Type != t || auxIntToInt64(v_1_1_0_1.AuxInt) != 63 || y != v_1_1_0_1.Args[0] || !(cc == OpARM64LessThanU) {
  1442  				continue
  1443  			}
  1444  			v.reset(OpARM64ROR)
  1445  			v.AddArg2(x, y)
  1446  			return true
  1447  		}
  1448  		break
  1449  	}
  1450  	// match: (ADD (SLL x (ANDconst <t> [31] y)) (CSEL0 <typ.UInt32> [cc] (SRL <typ.UInt32> (MOVWUreg x) (SUB <t> (MOVDconst [32]) (ANDconst <t> [31] y))) (CMPconst [64] (SUB <t> (MOVDconst [32]) (ANDconst <t> [31] y)))))
  1451  	// cond: cc == OpARM64LessThanU
  1452  	// result: (RORW x (NEG <t> y))
  1453  	for {
  1454  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1455  			if v_0.Op != OpARM64SLL {
  1456  				continue
  1457  			}
  1458  			_ = v_0.Args[1]
  1459  			x := v_0.Args[0]
  1460  			v_0_1 := v_0.Args[1]
  1461  			if v_0_1.Op != OpARM64ANDconst {
  1462  				continue
  1463  			}
  1464  			t := v_0_1.Type
  1465  			if auxIntToInt64(v_0_1.AuxInt) != 31 {
  1466  				continue
  1467  			}
  1468  			y := v_0_1.Args[0]
  1469  			if v_1.Op != OpARM64CSEL0 || v_1.Type != typ.UInt32 {
  1470  				continue
  1471  			}
  1472  			cc := auxIntToOp(v_1.AuxInt)
  1473  			_ = v_1.Args[1]
  1474  			v_1_0 := v_1.Args[0]
  1475  			if v_1_0.Op != OpARM64SRL || v_1_0.Type != typ.UInt32 {
  1476  				continue
  1477  			}
  1478  			_ = v_1_0.Args[1]
  1479  			v_1_0_0 := v_1_0.Args[0]
  1480  			if v_1_0_0.Op != OpARM64MOVWUreg || x != v_1_0_0.Args[0] {
  1481  				continue
  1482  			}
  1483  			v_1_0_1 := v_1_0.Args[1]
  1484  			if v_1_0_1.Op != OpARM64SUB || v_1_0_1.Type != t {
  1485  				continue
  1486  			}
  1487  			_ = v_1_0_1.Args[1]
  1488  			v_1_0_1_0 := v_1_0_1.Args[0]
  1489  			if v_1_0_1_0.Op != OpARM64MOVDconst || auxIntToInt64(v_1_0_1_0.AuxInt) != 32 {
  1490  				continue
  1491  			}
  1492  			v_1_0_1_1 := v_1_0_1.Args[1]
  1493  			if v_1_0_1_1.Op != OpARM64ANDconst || v_1_0_1_1.Type != t || auxIntToInt64(v_1_0_1_1.AuxInt) != 31 || y != v_1_0_1_1.Args[0] {
  1494  				continue
  1495  			}
  1496  			v_1_1 := v_1.Args[1]
  1497  			if v_1_1.Op != OpARM64CMPconst || auxIntToInt64(v_1_1.AuxInt) != 64 {
  1498  				continue
  1499  			}
  1500  			v_1_1_0 := v_1_1.Args[0]
  1501  			if v_1_1_0.Op != OpARM64SUB || v_1_1_0.Type != t {
  1502  				continue
  1503  			}
  1504  			_ = v_1_1_0.Args[1]
  1505  			v_1_1_0_0 := v_1_1_0.Args[0]
  1506  			if v_1_1_0_0.Op != OpARM64MOVDconst || auxIntToInt64(v_1_1_0_0.AuxInt) != 32 {
  1507  				continue
  1508  			}
  1509  			v_1_1_0_1 := v_1_1_0.Args[1]
  1510  			if v_1_1_0_1.Op != OpARM64ANDconst || v_1_1_0_1.Type != t || auxIntToInt64(v_1_1_0_1.AuxInt) != 31 || y != v_1_1_0_1.Args[0] || !(cc == OpARM64LessThanU) {
  1511  				continue
  1512  			}
  1513  			v.reset(OpARM64RORW)
  1514  			v0 := b.NewValue0(v.Pos, OpARM64NEG, t)
  1515  			v0.AddArg(y)
  1516  			v.AddArg2(x, v0)
  1517  			return true
  1518  		}
  1519  		break
  1520  	}
  1521  	// match: (ADD (SRL <typ.UInt32> (MOVWUreg x) (ANDconst <t> [31] y)) (CSEL0 <typ.UInt32> [cc] (SLL x (SUB <t> (MOVDconst [32]) (ANDconst <t> [31] y))) (CMPconst [64] (SUB <t> (MOVDconst [32]) (ANDconst <t> [31] y)))))
  1522  	// cond: cc == OpARM64LessThanU
  1523  	// result: (RORW x y)
  1524  	for {
  1525  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1526  			if v_0.Op != OpARM64SRL || v_0.Type != typ.UInt32 {
  1527  				continue
  1528  			}
  1529  			_ = v_0.Args[1]
  1530  			v_0_0 := v_0.Args[0]
  1531  			if v_0_0.Op != OpARM64MOVWUreg {
  1532  				continue
  1533  			}
  1534  			x := v_0_0.Args[0]
  1535  			v_0_1 := v_0.Args[1]
  1536  			if v_0_1.Op != OpARM64ANDconst {
  1537  				continue
  1538  			}
  1539  			t := v_0_1.Type
  1540  			if auxIntToInt64(v_0_1.AuxInt) != 31 {
  1541  				continue
  1542  			}
  1543  			y := v_0_1.Args[0]
  1544  			if v_1.Op != OpARM64CSEL0 || v_1.Type != typ.UInt32 {
  1545  				continue
  1546  			}
  1547  			cc := auxIntToOp(v_1.AuxInt)
  1548  			_ = v_1.Args[1]
  1549  			v_1_0 := v_1.Args[0]
  1550  			if v_1_0.Op != OpARM64SLL {
  1551  				continue
  1552  			}
  1553  			_ = v_1_0.Args[1]
  1554  			if x != v_1_0.Args[0] {
  1555  				continue
  1556  			}
  1557  			v_1_0_1 := v_1_0.Args[1]
  1558  			if v_1_0_1.Op != OpARM64SUB || v_1_0_1.Type != t {
  1559  				continue
  1560  			}
  1561  			_ = v_1_0_1.Args[1]
  1562  			v_1_0_1_0 := v_1_0_1.Args[0]
  1563  			if v_1_0_1_0.Op != OpARM64MOVDconst || auxIntToInt64(v_1_0_1_0.AuxInt) != 32 {
  1564  				continue
  1565  			}
  1566  			v_1_0_1_1 := v_1_0_1.Args[1]
  1567  			if v_1_0_1_1.Op != OpARM64ANDconst || v_1_0_1_1.Type != t || auxIntToInt64(v_1_0_1_1.AuxInt) != 31 || y != v_1_0_1_1.Args[0] {
  1568  				continue
  1569  			}
  1570  			v_1_1 := v_1.Args[1]
  1571  			if v_1_1.Op != OpARM64CMPconst || auxIntToInt64(v_1_1.AuxInt) != 64 {
  1572  				continue
  1573  			}
  1574  			v_1_1_0 := v_1_1.Args[0]
  1575  			if v_1_1_0.Op != OpARM64SUB || v_1_1_0.Type != t {
  1576  				continue
  1577  			}
  1578  			_ = v_1_1_0.Args[1]
  1579  			v_1_1_0_0 := v_1_1_0.Args[0]
  1580  			if v_1_1_0_0.Op != OpARM64MOVDconst || auxIntToInt64(v_1_1_0_0.AuxInt) != 32 {
  1581  				continue
  1582  			}
  1583  			v_1_1_0_1 := v_1_1_0.Args[1]
  1584  			if v_1_1_0_1.Op != OpARM64ANDconst || v_1_1_0_1.Type != t || auxIntToInt64(v_1_1_0_1.AuxInt) != 31 || y != v_1_1_0_1.Args[0] || !(cc == OpARM64LessThanU) {
  1585  				continue
  1586  			}
  1587  			v.reset(OpARM64RORW)
  1588  			v.AddArg2(x, y)
  1589  			return true
  1590  		}
  1591  		break
  1592  	}
  1593  	return false
  1594  }
  1595  func rewriteValueARM64_OpARM64ADDconst(v *Value) bool {
  1596  	v_0 := v.Args[0]
  1597  	// match: (ADDconst [off1] (MOVDaddr [off2] {sym} ptr))
  1598  	// cond: is32Bit(off1+int64(off2))
  1599  	// result: (MOVDaddr [int32(off1)+off2] {sym} ptr)
  1600  	for {
  1601  		off1 := auxIntToInt64(v.AuxInt)
  1602  		if v_0.Op != OpARM64MOVDaddr {
  1603  			break
  1604  		}
  1605  		off2 := auxIntToInt32(v_0.AuxInt)
  1606  		sym := auxToSym(v_0.Aux)
  1607  		ptr := v_0.Args[0]
  1608  		if !(is32Bit(off1 + int64(off2))) {
  1609  			break
  1610  		}
  1611  		v.reset(OpARM64MOVDaddr)
  1612  		v.AuxInt = int32ToAuxInt(int32(off1) + off2)
  1613  		v.Aux = symToAux(sym)
  1614  		v.AddArg(ptr)
  1615  		return true
  1616  	}
  1617  	// match: (ADDconst [0] x)
  1618  	// result: x
  1619  	for {
  1620  		if auxIntToInt64(v.AuxInt) != 0 {
  1621  			break
  1622  		}
  1623  		x := v_0
  1624  		v.copyOf(x)
  1625  		return true
  1626  	}
  1627  	// match: (ADDconst [c] (MOVDconst [d]))
  1628  	// result: (MOVDconst [c+d])
  1629  	for {
  1630  		c := auxIntToInt64(v.AuxInt)
  1631  		if v_0.Op != OpARM64MOVDconst {
  1632  			break
  1633  		}
  1634  		d := auxIntToInt64(v_0.AuxInt)
  1635  		v.reset(OpARM64MOVDconst)
  1636  		v.AuxInt = int64ToAuxInt(c + d)
  1637  		return true
  1638  	}
  1639  	// match: (ADDconst [c] (ADDconst [d] x))
  1640  	// result: (ADDconst [c+d] x)
  1641  	for {
  1642  		c := auxIntToInt64(v.AuxInt)
  1643  		if v_0.Op != OpARM64ADDconst {
  1644  			break
  1645  		}
  1646  		d := auxIntToInt64(v_0.AuxInt)
  1647  		x := v_0.Args[0]
  1648  		v.reset(OpARM64ADDconst)
  1649  		v.AuxInt = int64ToAuxInt(c + d)
  1650  		v.AddArg(x)
  1651  		return true
  1652  	}
  1653  	// match: (ADDconst [c] (SUBconst [d] x))
  1654  	// result: (ADDconst [c-d] x)
  1655  	for {
  1656  		c := auxIntToInt64(v.AuxInt)
  1657  		if v_0.Op != OpARM64SUBconst {
  1658  			break
  1659  		}
  1660  		d := auxIntToInt64(v_0.AuxInt)
  1661  		x := v_0.Args[0]
  1662  		v.reset(OpARM64ADDconst)
  1663  		v.AuxInt = int64ToAuxInt(c - d)
  1664  		v.AddArg(x)
  1665  		return true
  1666  	}
  1667  	return false
  1668  }
  1669  func rewriteValueARM64_OpARM64ADDshiftLL(v *Value) bool {
  1670  	v_1 := v.Args[1]
  1671  	v_0 := v.Args[0]
  1672  	b := v.Block
  1673  	typ := &b.Func.Config.Types
  1674  	// match: (ADDshiftLL (MOVDconst [c]) x [d])
  1675  	// result: (ADDconst [c] (SLLconst <x.Type> x [d]))
  1676  	for {
  1677  		d := auxIntToInt64(v.AuxInt)
  1678  		if v_0.Op != OpARM64MOVDconst {
  1679  			break
  1680  		}
  1681  		c := auxIntToInt64(v_0.AuxInt)
  1682  		x := v_1
  1683  		v.reset(OpARM64ADDconst)
  1684  		v.AuxInt = int64ToAuxInt(c)
  1685  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  1686  		v0.AuxInt = int64ToAuxInt(d)
  1687  		v0.AddArg(x)
  1688  		v.AddArg(v0)
  1689  		return true
  1690  	}
  1691  	// match: (ADDshiftLL x (MOVDconst [c]) [d])
  1692  	// result: (ADDconst x [int64(uint64(c)<<uint64(d))])
  1693  	for {
  1694  		d := auxIntToInt64(v.AuxInt)
  1695  		x := v_0
  1696  		if v_1.Op != OpARM64MOVDconst {
  1697  			break
  1698  		}
  1699  		c := auxIntToInt64(v_1.AuxInt)
  1700  		v.reset(OpARM64ADDconst)
  1701  		v.AuxInt = int64ToAuxInt(int64(uint64(c) << uint64(d)))
  1702  		v.AddArg(x)
  1703  		return true
  1704  	}
  1705  	// match: (ADDshiftLL [c] (SRLconst x [64-c]) x)
  1706  	// result: (RORconst [64-c] x)
  1707  	for {
  1708  		c := auxIntToInt64(v.AuxInt)
  1709  		if v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != 64-c {
  1710  			break
  1711  		}
  1712  		x := v_0.Args[0]
  1713  		if x != v_1 {
  1714  			break
  1715  		}
  1716  		v.reset(OpARM64RORconst)
  1717  		v.AuxInt = int64ToAuxInt(64 - c)
  1718  		v.AddArg(x)
  1719  		return true
  1720  	}
  1721  	// match: (ADDshiftLL <t> [c] (UBFX [bfc] x) x)
  1722  	// cond: c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)
  1723  	// result: (RORWconst [32-c] x)
  1724  	for {
  1725  		t := v.Type
  1726  		c := auxIntToInt64(v.AuxInt)
  1727  		if v_0.Op != OpARM64UBFX {
  1728  			break
  1729  		}
  1730  		bfc := auxIntToArm64BitField(v_0.AuxInt)
  1731  		x := v_0.Args[0]
  1732  		if x != v_1 || !(c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)) {
  1733  			break
  1734  		}
  1735  		v.reset(OpARM64RORWconst)
  1736  		v.AuxInt = int64ToAuxInt(32 - c)
  1737  		v.AddArg(x)
  1738  		return true
  1739  	}
  1740  	// match: (ADDshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [armBFAuxInt(8, 8)] x) x)
  1741  	// result: (REV16W x)
  1742  	for {
  1743  		if v.Type != typ.UInt16 || auxIntToInt64(v.AuxInt) != 8 || v_0.Op != OpARM64UBFX || v_0.Type != typ.UInt16 || auxIntToArm64BitField(v_0.AuxInt) != armBFAuxInt(8, 8) {
  1744  			break
  1745  		}
  1746  		x := v_0.Args[0]
  1747  		if x != v_1 {
  1748  			break
  1749  		}
  1750  		v.reset(OpARM64REV16W)
  1751  		v.AddArg(x)
  1752  		return true
  1753  	}
  1754  	// match: (ADDshiftLL [c] (SRLconst x [64-c]) x2)
  1755  	// result: (EXTRconst [64-c] x2 x)
  1756  	for {
  1757  		c := auxIntToInt64(v.AuxInt)
  1758  		if v_0.Op != OpARM64SRLconst || auxIntToInt64(v_0.AuxInt) != 64-c {
  1759  			break
  1760  		}
  1761  		x := v_0.Args[0]
  1762  		x2 := v_1
  1763  		v.reset(OpARM64EXTRconst)
  1764  		v.AuxInt = int64ToAuxInt(64 - c)
  1765  		v.AddArg2(x2, x)
  1766  		return true
  1767  	}
  1768  	// match: (ADDshiftLL <t> [c] (UBFX [bfc] x) x2)
  1769  	// cond: c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)
  1770  	// result: (EXTRWconst [32-c] x2 x)
  1771  	for {
  1772  		t := v.Type
  1773  		c := auxIntToInt64(v.AuxInt)
  1774  		if v_0.Op != OpARM64UBFX {
  1775  			break
  1776  		}
  1777  		bfc := auxIntToArm64BitField(v_0.AuxInt)
  1778  		x := v_0.Args[0]
  1779  		x2 := v_1
  1780  		if !(c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)) {
  1781  			break
  1782  		}
  1783  		v.reset(OpARM64EXTRWconst)
  1784  		v.AuxInt = int64ToAuxInt(32 - c)
  1785  		v.AddArg2(x2, x)
  1786  		return true
  1787  	}
  1788  	return false
  1789  }
  1790  func rewriteValueARM64_OpARM64ADDshiftRA(v *Value) bool {
  1791  	v_1 := v.Args[1]
  1792  	v_0 := v.Args[0]
  1793  	b := v.Block
  1794  	// match: (ADDshiftRA (MOVDconst [c]) x [d])
  1795  	// result: (ADDconst [c] (SRAconst <x.Type> x [d]))
  1796  	for {
  1797  		d := auxIntToInt64(v.AuxInt)
  1798  		if v_0.Op != OpARM64MOVDconst {
  1799  			break
  1800  		}
  1801  		c := auxIntToInt64(v_0.AuxInt)
  1802  		x := v_1
  1803  		v.reset(OpARM64ADDconst)
  1804  		v.AuxInt = int64ToAuxInt(c)
  1805  		v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
  1806  		v0.AuxInt = int64ToAuxInt(d)
  1807  		v0.AddArg(x)
  1808  		v.AddArg(v0)
  1809  		return true
  1810  	}
  1811  	// match: (ADDshiftRA x (MOVDconst [c]) [d])
  1812  	// result: (ADDconst x [c>>uint64(d)])
  1813  	for {
  1814  		d := auxIntToInt64(v.AuxInt)
  1815  		x := v_0
  1816  		if v_1.Op != OpARM64MOVDconst {
  1817  			break
  1818  		}
  1819  		c := auxIntToInt64(v_1.AuxInt)
  1820  		v.reset(OpARM64ADDconst)
  1821  		v.AuxInt = int64ToAuxInt(c >> uint64(d))
  1822  		v.AddArg(x)
  1823  		return true
  1824  	}
  1825  	return false
  1826  }
  1827  func rewriteValueARM64_OpARM64ADDshiftRL(v *Value) bool {
  1828  	v_1 := v.Args[1]
  1829  	v_0 := v.Args[0]
  1830  	b := v.Block
  1831  	// match: (ADDshiftRL (MOVDconst [c]) x [d])
  1832  	// result: (ADDconst [c] (SRLconst <x.Type> x [d]))
  1833  	for {
  1834  		d := auxIntToInt64(v.AuxInt)
  1835  		if v_0.Op != OpARM64MOVDconst {
  1836  			break
  1837  		}
  1838  		c := auxIntToInt64(v_0.AuxInt)
  1839  		x := v_1
  1840  		v.reset(OpARM64ADDconst)
  1841  		v.AuxInt = int64ToAuxInt(c)
  1842  		v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
  1843  		v0.AuxInt = int64ToAuxInt(d)
  1844  		v0.AddArg(x)
  1845  		v.AddArg(v0)
  1846  		return true
  1847  	}
  1848  	// match: (ADDshiftRL x (MOVDconst [c]) [d])
  1849  	// result: (ADDconst x [int64(uint64(c)>>uint64(d))])
  1850  	for {
  1851  		d := auxIntToInt64(v.AuxInt)
  1852  		x := v_0
  1853  		if v_1.Op != OpARM64MOVDconst {
  1854  			break
  1855  		}
  1856  		c := auxIntToInt64(v_1.AuxInt)
  1857  		v.reset(OpARM64ADDconst)
  1858  		v.AuxInt = int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  1859  		v.AddArg(x)
  1860  		return true
  1861  	}
  1862  	// match: (ADDshiftRL [c] (SLLconst x [64-c]) x)
  1863  	// result: (RORconst [ c] x)
  1864  	for {
  1865  		c := auxIntToInt64(v.AuxInt)
  1866  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 64-c {
  1867  			break
  1868  		}
  1869  		x := v_0.Args[0]
  1870  		if x != v_1 {
  1871  			break
  1872  		}
  1873  		v.reset(OpARM64RORconst)
  1874  		v.AuxInt = int64ToAuxInt(c)
  1875  		v.AddArg(x)
  1876  		return true
  1877  	}
  1878  	// match: (ADDshiftRL <t> [c] (SLLconst x [32-c]) (MOVWUreg x))
  1879  	// cond: c < 32 && t.Size() == 4
  1880  	// result: (RORWconst [c] x)
  1881  	for {
  1882  		t := v.Type
  1883  		c := auxIntToInt64(v.AuxInt)
  1884  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 32-c {
  1885  			break
  1886  		}
  1887  		x := v_0.Args[0]
  1888  		if v_1.Op != OpARM64MOVWUreg || x != v_1.Args[0] || !(c < 32 && t.Size() == 4) {
  1889  			break
  1890  		}
  1891  		v.reset(OpARM64RORWconst)
  1892  		v.AuxInt = int64ToAuxInt(c)
  1893  		v.AddArg(x)
  1894  		return true
  1895  	}
  1896  	return false
  1897  }
  1898  func rewriteValueARM64_OpARM64AND(v *Value) bool {
  1899  	v_1 := v.Args[1]
  1900  	v_0 := v.Args[0]
  1901  	// match: (AND x (MOVDconst [c]))
  1902  	// result: (ANDconst [c] x)
  1903  	for {
  1904  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1905  			x := v_0
  1906  			if v_1.Op != OpARM64MOVDconst {
  1907  				continue
  1908  			}
  1909  			c := auxIntToInt64(v_1.AuxInt)
  1910  			v.reset(OpARM64ANDconst)
  1911  			v.AuxInt = int64ToAuxInt(c)
  1912  			v.AddArg(x)
  1913  			return true
  1914  		}
  1915  		break
  1916  	}
  1917  	// match: (AND x x)
  1918  	// result: x
  1919  	for {
  1920  		x := v_0
  1921  		if x != v_1 {
  1922  			break
  1923  		}
  1924  		v.copyOf(x)
  1925  		return true
  1926  	}
  1927  	// match: (AND x (MVN y))
  1928  	// result: (BIC x y)
  1929  	for {
  1930  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1931  			x := v_0
  1932  			if v_1.Op != OpARM64MVN {
  1933  				continue
  1934  			}
  1935  			y := v_1.Args[0]
  1936  			v.reset(OpARM64BIC)
  1937  			v.AddArg2(x, y)
  1938  			return true
  1939  		}
  1940  		break
  1941  	}
  1942  	// match: (AND x0 x1:(SLLconst [c] y))
  1943  	// cond: clobberIfDead(x1)
  1944  	// result: (ANDshiftLL x0 y [c])
  1945  	for {
  1946  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1947  			x0 := v_0
  1948  			x1 := v_1
  1949  			if x1.Op != OpARM64SLLconst {
  1950  				continue
  1951  			}
  1952  			c := auxIntToInt64(x1.AuxInt)
  1953  			y := x1.Args[0]
  1954  			if !(clobberIfDead(x1)) {
  1955  				continue
  1956  			}
  1957  			v.reset(OpARM64ANDshiftLL)
  1958  			v.AuxInt = int64ToAuxInt(c)
  1959  			v.AddArg2(x0, y)
  1960  			return true
  1961  		}
  1962  		break
  1963  	}
  1964  	// match: (AND x0 x1:(SRLconst [c] y))
  1965  	// cond: clobberIfDead(x1)
  1966  	// result: (ANDshiftRL x0 y [c])
  1967  	for {
  1968  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1969  			x0 := v_0
  1970  			x1 := v_1
  1971  			if x1.Op != OpARM64SRLconst {
  1972  				continue
  1973  			}
  1974  			c := auxIntToInt64(x1.AuxInt)
  1975  			y := x1.Args[0]
  1976  			if !(clobberIfDead(x1)) {
  1977  				continue
  1978  			}
  1979  			v.reset(OpARM64ANDshiftRL)
  1980  			v.AuxInt = int64ToAuxInt(c)
  1981  			v.AddArg2(x0, y)
  1982  			return true
  1983  		}
  1984  		break
  1985  	}
  1986  	// match: (AND x0 x1:(SRAconst [c] y))
  1987  	// cond: clobberIfDead(x1)
  1988  	// result: (ANDshiftRA x0 y [c])
  1989  	for {
  1990  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  1991  			x0 := v_0
  1992  			x1 := v_1
  1993  			if x1.Op != OpARM64SRAconst {
  1994  				continue
  1995  			}
  1996  			c := auxIntToInt64(x1.AuxInt)
  1997  			y := x1.Args[0]
  1998  			if !(clobberIfDead(x1)) {
  1999  				continue
  2000  			}
  2001  			v.reset(OpARM64ANDshiftRA)
  2002  			v.AuxInt = int64ToAuxInt(c)
  2003  			v.AddArg2(x0, y)
  2004  			return true
  2005  		}
  2006  		break
  2007  	}
  2008  	return false
  2009  }
  2010  func rewriteValueARM64_OpARM64ANDconst(v *Value) bool {
  2011  	v_0 := v.Args[0]
  2012  	// match: (ANDconst [0] _)
  2013  	// result: (MOVDconst [0])
  2014  	for {
  2015  		if auxIntToInt64(v.AuxInt) != 0 {
  2016  			break
  2017  		}
  2018  		v.reset(OpARM64MOVDconst)
  2019  		v.AuxInt = int64ToAuxInt(0)
  2020  		return true
  2021  	}
  2022  	// match: (ANDconst [-1] x)
  2023  	// result: x
  2024  	for {
  2025  		if auxIntToInt64(v.AuxInt) != -1 {
  2026  			break
  2027  		}
  2028  		x := v_0
  2029  		v.copyOf(x)
  2030  		return true
  2031  	}
  2032  	// match: (ANDconst [c] (MOVDconst [d]))
  2033  	// result: (MOVDconst [c&d])
  2034  	for {
  2035  		c := auxIntToInt64(v.AuxInt)
  2036  		if v_0.Op != OpARM64MOVDconst {
  2037  			break
  2038  		}
  2039  		d := auxIntToInt64(v_0.AuxInt)
  2040  		v.reset(OpARM64MOVDconst)
  2041  		v.AuxInt = int64ToAuxInt(c & d)
  2042  		return true
  2043  	}
  2044  	// match: (ANDconst [c] (ANDconst [d] x))
  2045  	// result: (ANDconst [c&d] x)
  2046  	for {
  2047  		c := auxIntToInt64(v.AuxInt)
  2048  		if v_0.Op != OpARM64ANDconst {
  2049  			break
  2050  		}
  2051  		d := auxIntToInt64(v_0.AuxInt)
  2052  		x := v_0.Args[0]
  2053  		v.reset(OpARM64ANDconst)
  2054  		v.AuxInt = int64ToAuxInt(c & d)
  2055  		v.AddArg(x)
  2056  		return true
  2057  	}
  2058  	// match: (ANDconst [c] (MOVWUreg x))
  2059  	// result: (ANDconst [c&(1<<32-1)] x)
  2060  	for {
  2061  		c := auxIntToInt64(v.AuxInt)
  2062  		if v_0.Op != OpARM64MOVWUreg {
  2063  			break
  2064  		}
  2065  		x := v_0.Args[0]
  2066  		v.reset(OpARM64ANDconst)
  2067  		v.AuxInt = int64ToAuxInt(c & (1<<32 - 1))
  2068  		v.AddArg(x)
  2069  		return true
  2070  	}
  2071  	// match: (ANDconst [c] (MOVHUreg x))
  2072  	// result: (ANDconst [c&(1<<16-1)] x)
  2073  	for {
  2074  		c := auxIntToInt64(v.AuxInt)
  2075  		if v_0.Op != OpARM64MOVHUreg {
  2076  			break
  2077  		}
  2078  		x := v_0.Args[0]
  2079  		v.reset(OpARM64ANDconst)
  2080  		v.AuxInt = int64ToAuxInt(c & (1<<16 - 1))
  2081  		v.AddArg(x)
  2082  		return true
  2083  	}
  2084  	// match: (ANDconst [c] (MOVBUreg x))
  2085  	// result: (ANDconst [c&(1<<8-1)] x)
  2086  	for {
  2087  		c := auxIntToInt64(v.AuxInt)
  2088  		if v_0.Op != OpARM64MOVBUreg {
  2089  			break
  2090  		}
  2091  		x := v_0.Args[0]
  2092  		v.reset(OpARM64ANDconst)
  2093  		v.AuxInt = int64ToAuxInt(c & (1<<8 - 1))
  2094  		v.AddArg(x)
  2095  		return true
  2096  	}
  2097  	// match: (ANDconst [ac] (SLLconst [sc] x))
  2098  	// cond: isARM64BFMask(sc, ac, sc)
  2099  	// result: (UBFIZ [armBFAuxInt(sc, arm64BFWidth(ac, sc))] x)
  2100  	for {
  2101  		ac := auxIntToInt64(v.AuxInt)
  2102  		if v_0.Op != OpARM64SLLconst {
  2103  			break
  2104  		}
  2105  		sc := auxIntToInt64(v_0.AuxInt)
  2106  		x := v_0.Args[0]
  2107  		if !(isARM64BFMask(sc, ac, sc)) {
  2108  			break
  2109  		}
  2110  		v.reset(OpARM64UBFIZ)
  2111  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, arm64BFWidth(ac, sc)))
  2112  		v.AddArg(x)
  2113  		return true
  2114  	}
  2115  	// match: (ANDconst [ac] (SRLconst [sc] x))
  2116  	// cond: isARM64BFMask(sc, ac, 0)
  2117  	// result: (UBFX [armBFAuxInt(sc, arm64BFWidth(ac, 0))] x)
  2118  	for {
  2119  		ac := auxIntToInt64(v.AuxInt)
  2120  		if v_0.Op != OpARM64SRLconst {
  2121  			break
  2122  		}
  2123  		sc := auxIntToInt64(v_0.AuxInt)
  2124  		x := v_0.Args[0]
  2125  		if !(isARM64BFMask(sc, ac, 0)) {
  2126  			break
  2127  		}
  2128  		v.reset(OpARM64UBFX)
  2129  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, arm64BFWidth(ac, 0)))
  2130  		v.AddArg(x)
  2131  		return true
  2132  	}
  2133  	return false
  2134  }
  2135  func rewriteValueARM64_OpARM64ANDshiftLL(v *Value) bool {
  2136  	v_1 := v.Args[1]
  2137  	v_0 := v.Args[0]
  2138  	b := v.Block
  2139  	// match: (ANDshiftLL (MOVDconst [c]) x [d])
  2140  	// result: (ANDconst [c] (SLLconst <x.Type> x [d]))
  2141  	for {
  2142  		d := auxIntToInt64(v.AuxInt)
  2143  		if v_0.Op != OpARM64MOVDconst {
  2144  			break
  2145  		}
  2146  		c := auxIntToInt64(v_0.AuxInt)
  2147  		x := v_1
  2148  		v.reset(OpARM64ANDconst)
  2149  		v.AuxInt = int64ToAuxInt(c)
  2150  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  2151  		v0.AuxInt = int64ToAuxInt(d)
  2152  		v0.AddArg(x)
  2153  		v.AddArg(v0)
  2154  		return true
  2155  	}
  2156  	// match: (ANDshiftLL x (MOVDconst [c]) [d])
  2157  	// result: (ANDconst x [int64(uint64(c)<<uint64(d))])
  2158  	for {
  2159  		d := auxIntToInt64(v.AuxInt)
  2160  		x := v_0
  2161  		if v_1.Op != OpARM64MOVDconst {
  2162  			break
  2163  		}
  2164  		c := auxIntToInt64(v_1.AuxInt)
  2165  		v.reset(OpARM64ANDconst)
  2166  		v.AuxInt = int64ToAuxInt(int64(uint64(c) << uint64(d)))
  2167  		v.AddArg(x)
  2168  		return true
  2169  	}
  2170  	// match: (ANDshiftLL x y:(SLLconst x [c]) [d])
  2171  	// cond: c==d
  2172  	// result: y
  2173  	for {
  2174  		d := auxIntToInt64(v.AuxInt)
  2175  		x := v_0
  2176  		y := v_1
  2177  		if y.Op != OpARM64SLLconst {
  2178  			break
  2179  		}
  2180  		c := auxIntToInt64(y.AuxInt)
  2181  		if x != y.Args[0] || !(c == d) {
  2182  			break
  2183  		}
  2184  		v.copyOf(y)
  2185  		return true
  2186  	}
  2187  	return false
  2188  }
  2189  func rewriteValueARM64_OpARM64ANDshiftRA(v *Value) bool {
  2190  	v_1 := v.Args[1]
  2191  	v_0 := v.Args[0]
  2192  	b := v.Block
  2193  	// match: (ANDshiftRA (MOVDconst [c]) x [d])
  2194  	// result: (ANDconst [c] (SRAconst <x.Type> x [d]))
  2195  	for {
  2196  		d := auxIntToInt64(v.AuxInt)
  2197  		if v_0.Op != OpARM64MOVDconst {
  2198  			break
  2199  		}
  2200  		c := auxIntToInt64(v_0.AuxInt)
  2201  		x := v_1
  2202  		v.reset(OpARM64ANDconst)
  2203  		v.AuxInt = int64ToAuxInt(c)
  2204  		v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
  2205  		v0.AuxInt = int64ToAuxInt(d)
  2206  		v0.AddArg(x)
  2207  		v.AddArg(v0)
  2208  		return true
  2209  	}
  2210  	// match: (ANDshiftRA x (MOVDconst [c]) [d])
  2211  	// result: (ANDconst x [c>>uint64(d)])
  2212  	for {
  2213  		d := auxIntToInt64(v.AuxInt)
  2214  		x := v_0
  2215  		if v_1.Op != OpARM64MOVDconst {
  2216  			break
  2217  		}
  2218  		c := auxIntToInt64(v_1.AuxInt)
  2219  		v.reset(OpARM64ANDconst)
  2220  		v.AuxInt = int64ToAuxInt(c >> uint64(d))
  2221  		v.AddArg(x)
  2222  		return true
  2223  	}
  2224  	// match: (ANDshiftRA x y:(SRAconst x [c]) [d])
  2225  	// cond: c==d
  2226  	// result: y
  2227  	for {
  2228  		d := auxIntToInt64(v.AuxInt)
  2229  		x := v_0
  2230  		y := v_1
  2231  		if y.Op != OpARM64SRAconst {
  2232  			break
  2233  		}
  2234  		c := auxIntToInt64(y.AuxInt)
  2235  		if x != y.Args[0] || !(c == d) {
  2236  			break
  2237  		}
  2238  		v.copyOf(y)
  2239  		return true
  2240  	}
  2241  	return false
  2242  }
  2243  func rewriteValueARM64_OpARM64ANDshiftRL(v *Value) bool {
  2244  	v_1 := v.Args[1]
  2245  	v_0 := v.Args[0]
  2246  	b := v.Block
  2247  	// match: (ANDshiftRL (MOVDconst [c]) x [d])
  2248  	// result: (ANDconst [c] (SRLconst <x.Type> x [d]))
  2249  	for {
  2250  		d := auxIntToInt64(v.AuxInt)
  2251  		if v_0.Op != OpARM64MOVDconst {
  2252  			break
  2253  		}
  2254  		c := auxIntToInt64(v_0.AuxInt)
  2255  		x := v_1
  2256  		v.reset(OpARM64ANDconst)
  2257  		v.AuxInt = int64ToAuxInt(c)
  2258  		v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
  2259  		v0.AuxInt = int64ToAuxInt(d)
  2260  		v0.AddArg(x)
  2261  		v.AddArg(v0)
  2262  		return true
  2263  	}
  2264  	// match: (ANDshiftRL x (MOVDconst [c]) [d])
  2265  	// result: (ANDconst x [int64(uint64(c)>>uint64(d))])
  2266  	for {
  2267  		d := auxIntToInt64(v.AuxInt)
  2268  		x := v_0
  2269  		if v_1.Op != OpARM64MOVDconst {
  2270  			break
  2271  		}
  2272  		c := auxIntToInt64(v_1.AuxInt)
  2273  		v.reset(OpARM64ANDconst)
  2274  		v.AuxInt = int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  2275  		v.AddArg(x)
  2276  		return true
  2277  	}
  2278  	// match: (ANDshiftRL x y:(SRLconst x [c]) [d])
  2279  	// cond: c==d
  2280  	// result: y
  2281  	for {
  2282  		d := auxIntToInt64(v.AuxInt)
  2283  		x := v_0
  2284  		y := v_1
  2285  		if y.Op != OpARM64SRLconst {
  2286  			break
  2287  		}
  2288  		c := auxIntToInt64(y.AuxInt)
  2289  		if x != y.Args[0] || !(c == d) {
  2290  			break
  2291  		}
  2292  		v.copyOf(y)
  2293  		return true
  2294  	}
  2295  	return false
  2296  }
  2297  func rewriteValueARM64_OpARM64BIC(v *Value) bool {
  2298  	v_1 := v.Args[1]
  2299  	v_0 := v.Args[0]
  2300  	// match: (BIC x (MOVDconst [c]))
  2301  	// result: (ANDconst [^c] x)
  2302  	for {
  2303  		x := v_0
  2304  		if v_1.Op != OpARM64MOVDconst {
  2305  			break
  2306  		}
  2307  		c := auxIntToInt64(v_1.AuxInt)
  2308  		v.reset(OpARM64ANDconst)
  2309  		v.AuxInt = int64ToAuxInt(^c)
  2310  		v.AddArg(x)
  2311  		return true
  2312  	}
  2313  	// match: (BIC x x)
  2314  	// result: (MOVDconst [0])
  2315  	for {
  2316  		x := v_0
  2317  		if x != v_1 {
  2318  			break
  2319  		}
  2320  		v.reset(OpARM64MOVDconst)
  2321  		v.AuxInt = int64ToAuxInt(0)
  2322  		return true
  2323  	}
  2324  	// match: (BIC x0 x1:(SLLconst [c] y))
  2325  	// cond: clobberIfDead(x1)
  2326  	// result: (BICshiftLL x0 y [c])
  2327  	for {
  2328  		x0 := v_0
  2329  		x1 := v_1
  2330  		if x1.Op != OpARM64SLLconst {
  2331  			break
  2332  		}
  2333  		c := auxIntToInt64(x1.AuxInt)
  2334  		y := x1.Args[0]
  2335  		if !(clobberIfDead(x1)) {
  2336  			break
  2337  		}
  2338  		v.reset(OpARM64BICshiftLL)
  2339  		v.AuxInt = int64ToAuxInt(c)
  2340  		v.AddArg2(x0, y)
  2341  		return true
  2342  	}
  2343  	// match: (BIC x0 x1:(SRLconst [c] y))
  2344  	// cond: clobberIfDead(x1)
  2345  	// result: (BICshiftRL x0 y [c])
  2346  	for {
  2347  		x0 := v_0
  2348  		x1 := v_1
  2349  		if x1.Op != OpARM64SRLconst {
  2350  			break
  2351  		}
  2352  		c := auxIntToInt64(x1.AuxInt)
  2353  		y := x1.Args[0]
  2354  		if !(clobberIfDead(x1)) {
  2355  			break
  2356  		}
  2357  		v.reset(OpARM64BICshiftRL)
  2358  		v.AuxInt = int64ToAuxInt(c)
  2359  		v.AddArg2(x0, y)
  2360  		return true
  2361  	}
  2362  	// match: (BIC x0 x1:(SRAconst [c] y))
  2363  	// cond: clobberIfDead(x1)
  2364  	// result: (BICshiftRA x0 y [c])
  2365  	for {
  2366  		x0 := v_0
  2367  		x1 := v_1
  2368  		if x1.Op != OpARM64SRAconst {
  2369  			break
  2370  		}
  2371  		c := auxIntToInt64(x1.AuxInt)
  2372  		y := x1.Args[0]
  2373  		if !(clobberIfDead(x1)) {
  2374  			break
  2375  		}
  2376  		v.reset(OpARM64BICshiftRA)
  2377  		v.AuxInt = int64ToAuxInt(c)
  2378  		v.AddArg2(x0, y)
  2379  		return true
  2380  	}
  2381  	return false
  2382  }
  2383  func rewriteValueARM64_OpARM64BICshiftLL(v *Value) bool {
  2384  	v_1 := v.Args[1]
  2385  	v_0 := v.Args[0]
  2386  	// match: (BICshiftLL x (MOVDconst [c]) [d])
  2387  	// result: (ANDconst x [^int64(uint64(c)<<uint64(d))])
  2388  	for {
  2389  		d := auxIntToInt64(v.AuxInt)
  2390  		x := v_0
  2391  		if v_1.Op != OpARM64MOVDconst {
  2392  			break
  2393  		}
  2394  		c := auxIntToInt64(v_1.AuxInt)
  2395  		v.reset(OpARM64ANDconst)
  2396  		v.AuxInt = int64ToAuxInt(^int64(uint64(c) << uint64(d)))
  2397  		v.AddArg(x)
  2398  		return true
  2399  	}
  2400  	// match: (BICshiftLL x (SLLconst x [c]) [d])
  2401  	// cond: c==d
  2402  	// result: (MOVDconst [0])
  2403  	for {
  2404  		d := auxIntToInt64(v.AuxInt)
  2405  		x := v_0
  2406  		if v_1.Op != OpARM64SLLconst {
  2407  			break
  2408  		}
  2409  		c := auxIntToInt64(v_1.AuxInt)
  2410  		if x != v_1.Args[0] || !(c == d) {
  2411  			break
  2412  		}
  2413  		v.reset(OpARM64MOVDconst)
  2414  		v.AuxInt = int64ToAuxInt(0)
  2415  		return true
  2416  	}
  2417  	return false
  2418  }
  2419  func rewriteValueARM64_OpARM64BICshiftRA(v *Value) bool {
  2420  	v_1 := v.Args[1]
  2421  	v_0 := v.Args[0]
  2422  	// match: (BICshiftRA x (MOVDconst [c]) [d])
  2423  	// result: (ANDconst x [^(c>>uint64(d))])
  2424  	for {
  2425  		d := auxIntToInt64(v.AuxInt)
  2426  		x := v_0
  2427  		if v_1.Op != OpARM64MOVDconst {
  2428  			break
  2429  		}
  2430  		c := auxIntToInt64(v_1.AuxInt)
  2431  		v.reset(OpARM64ANDconst)
  2432  		v.AuxInt = int64ToAuxInt(^(c >> uint64(d)))
  2433  		v.AddArg(x)
  2434  		return true
  2435  	}
  2436  	// match: (BICshiftRA x (SRAconst x [c]) [d])
  2437  	// cond: c==d
  2438  	// result: (MOVDconst [0])
  2439  	for {
  2440  		d := auxIntToInt64(v.AuxInt)
  2441  		x := v_0
  2442  		if v_1.Op != OpARM64SRAconst {
  2443  			break
  2444  		}
  2445  		c := auxIntToInt64(v_1.AuxInt)
  2446  		if x != v_1.Args[0] || !(c == d) {
  2447  			break
  2448  		}
  2449  		v.reset(OpARM64MOVDconst)
  2450  		v.AuxInt = int64ToAuxInt(0)
  2451  		return true
  2452  	}
  2453  	return false
  2454  }
  2455  func rewriteValueARM64_OpARM64BICshiftRL(v *Value) bool {
  2456  	v_1 := v.Args[1]
  2457  	v_0 := v.Args[0]
  2458  	// match: (BICshiftRL x (MOVDconst [c]) [d])
  2459  	// result: (ANDconst x [^int64(uint64(c)>>uint64(d))])
  2460  	for {
  2461  		d := auxIntToInt64(v.AuxInt)
  2462  		x := v_0
  2463  		if v_1.Op != OpARM64MOVDconst {
  2464  			break
  2465  		}
  2466  		c := auxIntToInt64(v_1.AuxInt)
  2467  		v.reset(OpARM64ANDconst)
  2468  		v.AuxInt = int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
  2469  		v.AddArg(x)
  2470  		return true
  2471  	}
  2472  	// match: (BICshiftRL x (SRLconst x [c]) [d])
  2473  	// cond: c==d
  2474  	// result: (MOVDconst [0])
  2475  	for {
  2476  		d := auxIntToInt64(v.AuxInt)
  2477  		x := v_0
  2478  		if v_1.Op != OpARM64SRLconst {
  2479  			break
  2480  		}
  2481  		c := auxIntToInt64(v_1.AuxInt)
  2482  		if x != v_1.Args[0] || !(c == d) {
  2483  			break
  2484  		}
  2485  		v.reset(OpARM64MOVDconst)
  2486  		v.AuxInt = int64ToAuxInt(0)
  2487  		return true
  2488  	}
  2489  	return false
  2490  }
  2491  func rewriteValueARM64_OpARM64CMN(v *Value) bool {
  2492  	v_1 := v.Args[1]
  2493  	v_0 := v.Args[0]
  2494  	// match: (CMN x (MOVDconst [c]))
  2495  	// result: (CMNconst [c] x)
  2496  	for {
  2497  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2498  			x := v_0
  2499  			if v_1.Op != OpARM64MOVDconst {
  2500  				continue
  2501  			}
  2502  			c := auxIntToInt64(v_1.AuxInt)
  2503  			v.reset(OpARM64CMNconst)
  2504  			v.AuxInt = int64ToAuxInt(c)
  2505  			v.AddArg(x)
  2506  			return true
  2507  		}
  2508  		break
  2509  	}
  2510  	// match: (CMN x0 x1:(SLLconst [c] y))
  2511  	// cond: clobberIfDead(x1)
  2512  	// result: (CMNshiftLL x0 y [c])
  2513  	for {
  2514  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2515  			x0 := v_0
  2516  			x1 := v_1
  2517  			if x1.Op != OpARM64SLLconst {
  2518  				continue
  2519  			}
  2520  			c := auxIntToInt64(x1.AuxInt)
  2521  			y := x1.Args[0]
  2522  			if !(clobberIfDead(x1)) {
  2523  				continue
  2524  			}
  2525  			v.reset(OpARM64CMNshiftLL)
  2526  			v.AuxInt = int64ToAuxInt(c)
  2527  			v.AddArg2(x0, y)
  2528  			return true
  2529  		}
  2530  		break
  2531  	}
  2532  	// match: (CMN x0 x1:(SRLconst [c] y))
  2533  	// cond: clobberIfDead(x1)
  2534  	// result: (CMNshiftRL x0 y [c])
  2535  	for {
  2536  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2537  			x0 := v_0
  2538  			x1 := v_1
  2539  			if x1.Op != OpARM64SRLconst {
  2540  				continue
  2541  			}
  2542  			c := auxIntToInt64(x1.AuxInt)
  2543  			y := x1.Args[0]
  2544  			if !(clobberIfDead(x1)) {
  2545  				continue
  2546  			}
  2547  			v.reset(OpARM64CMNshiftRL)
  2548  			v.AuxInt = int64ToAuxInt(c)
  2549  			v.AddArg2(x0, y)
  2550  			return true
  2551  		}
  2552  		break
  2553  	}
  2554  	// match: (CMN x0 x1:(SRAconst [c] y))
  2555  	// cond: clobberIfDead(x1)
  2556  	// result: (CMNshiftRA x0 y [c])
  2557  	for {
  2558  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2559  			x0 := v_0
  2560  			x1 := v_1
  2561  			if x1.Op != OpARM64SRAconst {
  2562  				continue
  2563  			}
  2564  			c := auxIntToInt64(x1.AuxInt)
  2565  			y := x1.Args[0]
  2566  			if !(clobberIfDead(x1)) {
  2567  				continue
  2568  			}
  2569  			v.reset(OpARM64CMNshiftRA)
  2570  			v.AuxInt = int64ToAuxInt(c)
  2571  			v.AddArg2(x0, y)
  2572  			return true
  2573  		}
  2574  		break
  2575  	}
  2576  	return false
  2577  }
  2578  func rewriteValueARM64_OpARM64CMNW(v *Value) bool {
  2579  	v_1 := v.Args[1]
  2580  	v_0 := v.Args[0]
  2581  	// match: (CMNW x (MOVDconst [c]))
  2582  	// result: (CMNWconst [int32(c)] x)
  2583  	for {
  2584  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2585  			x := v_0
  2586  			if v_1.Op != OpARM64MOVDconst {
  2587  				continue
  2588  			}
  2589  			c := auxIntToInt64(v_1.AuxInt)
  2590  			v.reset(OpARM64CMNWconst)
  2591  			v.AuxInt = int32ToAuxInt(int32(c))
  2592  			v.AddArg(x)
  2593  			return true
  2594  		}
  2595  		break
  2596  	}
  2597  	return false
  2598  }
  2599  func rewriteValueARM64_OpARM64CMNWconst(v *Value) bool {
  2600  	v_0 := v.Args[0]
  2601  	// match: (CMNWconst (MOVDconst [x]) [y])
  2602  	// result: (FlagConstant [addFlags32(int32(x),y)])
  2603  	for {
  2604  		y := auxIntToInt32(v.AuxInt)
  2605  		if v_0.Op != OpARM64MOVDconst {
  2606  			break
  2607  		}
  2608  		x := auxIntToInt64(v_0.AuxInt)
  2609  		v.reset(OpARM64FlagConstant)
  2610  		v.AuxInt = flagConstantToAuxInt(addFlags32(int32(x), y))
  2611  		return true
  2612  	}
  2613  	return false
  2614  }
  2615  func rewriteValueARM64_OpARM64CMNconst(v *Value) bool {
  2616  	v_0 := v.Args[0]
  2617  	// match: (CMNconst (MOVDconst [x]) [y])
  2618  	// result: (FlagConstant [addFlags64(x,y)])
  2619  	for {
  2620  		y := auxIntToInt64(v.AuxInt)
  2621  		if v_0.Op != OpARM64MOVDconst {
  2622  			break
  2623  		}
  2624  		x := auxIntToInt64(v_0.AuxInt)
  2625  		v.reset(OpARM64FlagConstant)
  2626  		v.AuxInt = flagConstantToAuxInt(addFlags64(x, y))
  2627  		return true
  2628  	}
  2629  	return false
  2630  }
  2631  func rewriteValueARM64_OpARM64CMNshiftLL(v *Value) bool {
  2632  	v_1 := v.Args[1]
  2633  	v_0 := v.Args[0]
  2634  	b := v.Block
  2635  	// match: (CMNshiftLL (MOVDconst [c]) x [d])
  2636  	// result: (CMNconst [c] (SLLconst <x.Type> x [d]))
  2637  	for {
  2638  		d := auxIntToInt64(v.AuxInt)
  2639  		if v_0.Op != OpARM64MOVDconst {
  2640  			break
  2641  		}
  2642  		c := auxIntToInt64(v_0.AuxInt)
  2643  		x := v_1
  2644  		v.reset(OpARM64CMNconst)
  2645  		v.AuxInt = int64ToAuxInt(c)
  2646  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  2647  		v0.AuxInt = int64ToAuxInt(d)
  2648  		v0.AddArg(x)
  2649  		v.AddArg(v0)
  2650  		return true
  2651  	}
  2652  	// match: (CMNshiftLL x (MOVDconst [c]) [d])
  2653  	// result: (CMNconst x [int64(uint64(c)<<uint64(d))])
  2654  	for {
  2655  		d := auxIntToInt64(v.AuxInt)
  2656  		x := v_0
  2657  		if v_1.Op != OpARM64MOVDconst {
  2658  			break
  2659  		}
  2660  		c := auxIntToInt64(v_1.AuxInt)
  2661  		v.reset(OpARM64CMNconst)
  2662  		v.AuxInt = int64ToAuxInt(int64(uint64(c) << uint64(d)))
  2663  		v.AddArg(x)
  2664  		return true
  2665  	}
  2666  	return false
  2667  }
  2668  func rewriteValueARM64_OpARM64CMNshiftRA(v *Value) bool {
  2669  	v_1 := v.Args[1]
  2670  	v_0 := v.Args[0]
  2671  	b := v.Block
  2672  	// match: (CMNshiftRA (MOVDconst [c]) x [d])
  2673  	// result: (CMNconst [c] (SRAconst <x.Type> x [d]))
  2674  	for {
  2675  		d := auxIntToInt64(v.AuxInt)
  2676  		if v_0.Op != OpARM64MOVDconst {
  2677  			break
  2678  		}
  2679  		c := auxIntToInt64(v_0.AuxInt)
  2680  		x := v_1
  2681  		v.reset(OpARM64CMNconst)
  2682  		v.AuxInt = int64ToAuxInt(c)
  2683  		v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
  2684  		v0.AuxInt = int64ToAuxInt(d)
  2685  		v0.AddArg(x)
  2686  		v.AddArg(v0)
  2687  		return true
  2688  	}
  2689  	// match: (CMNshiftRA x (MOVDconst [c]) [d])
  2690  	// result: (CMNconst x [c>>uint64(d)])
  2691  	for {
  2692  		d := auxIntToInt64(v.AuxInt)
  2693  		x := v_0
  2694  		if v_1.Op != OpARM64MOVDconst {
  2695  			break
  2696  		}
  2697  		c := auxIntToInt64(v_1.AuxInt)
  2698  		v.reset(OpARM64CMNconst)
  2699  		v.AuxInt = int64ToAuxInt(c >> uint64(d))
  2700  		v.AddArg(x)
  2701  		return true
  2702  	}
  2703  	return false
  2704  }
  2705  func rewriteValueARM64_OpARM64CMNshiftRL(v *Value) bool {
  2706  	v_1 := v.Args[1]
  2707  	v_0 := v.Args[0]
  2708  	b := v.Block
  2709  	// match: (CMNshiftRL (MOVDconst [c]) x [d])
  2710  	// result: (CMNconst [c] (SRLconst <x.Type> x [d]))
  2711  	for {
  2712  		d := auxIntToInt64(v.AuxInt)
  2713  		if v_0.Op != OpARM64MOVDconst {
  2714  			break
  2715  		}
  2716  		c := auxIntToInt64(v_0.AuxInt)
  2717  		x := v_1
  2718  		v.reset(OpARM64CMNconst)
  2719  		v.AuxInt = int64ToAuxInt(c)
  2720  		v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
  2721  		v0.AuxInt = int64ToAuxInt(d)
  2722  		v0.AddArg(x)
  2723  		v.AddArg(v0)
  2724  		return true
  2725  	}
  2726  	// match: (CMNshiftRL x (MOVDconst [c]) [d])
  2727  	// result: (CMNconst x [int64(uint64(c)>>uint64(d))])
  2728  	for {
  2729  		d := auxIntToInt64(v.AuxInt)
  2730  		x := v_0
  2731  		if v_1.Op != OpARM64MOVDconst {
  2732  			break
  2733  		}
  2734  		c := auxIntToInt64(v_1.AuxInt)
  2735  		v.reset(OpARM64CMNconst)
  2736  		v.AuxInt = int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  2737  		v.AddArg(x)
  2738  		return true
  2739  	}
  2740  	return false
  2741  }
  2742  func rewriteValueARM64_OpARM64CMP(v *Value) bool {
  2743  	v_1 := v.Args[1]
  2744  	v_0 := v.Args[0]
  2745  	b := v.Block
  2746  	// match: (CMP x (MOVDconst [c]))
  2747  	// result: (CMPconst [c] x)
  2748  	for {
  2749  		x := v_0
  2750  		if v_1.Op != OpARM64MOVDconst {
  2751  			break
  2752  		}
  2753  		c := auxIntToInt64(v_1.AuxInt)
  2754  		v.reset(OpARM64CMPconst)
  2755  		v.AuxInt = int64ToAuxInt(c)
  2756  		v.AddArg(x)
  2757  		return true
  2758  	}
  2759  	// match: (CMP (MOVDconst [c]) x)
  2760  	// result: (InvertFlags (CMPconst [c] x))
  2761  	for {
  2762  		if v_0.Op != OpARM64MOVDconst {
  2763  			break
  2764  		}
  2765  		c := auxIntToInt64(v_0.AuxInt)
  2766  		x := v_1
  2767  		v.reset(OpARM64InvertFlags)
  2768  		v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
  2769  		v0.AuxInt = int64ToAuxInt(c)
  2770  		v0.AddArg(x)
  2771  		v.AddArg(v0)
  2772  		return true
  2773  	}
  2774  	// match: (CMP x y)
  2775  	// cond: x.ID > y.ID
  2776  	// result: (InvertFlags (CMP y x))
  2777  	for {
  2778  		x := v_0
  2779  		y := v_1
  2780  		if !(x.ID > y.ID) {
  2781  			break
  2782  		}
  2783  		v.reset(OpARM64InvertFlags)
  2784  		v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
  2785  		v0.AddArg2(y, x)
  2786  		v.AddArg(v0)
  2787  		return true
  2788  	}
  2789  	// match: (CMP x0 x1:(SLLconst [c] y))
  2790  	// cond: clobberIfDead(x1)
  2791  	// result: (CMPshiftLL x0 y [c])
  2792  	for {
  2793  		x0 := v_0
  2794  		x1 := v_1
  2795  		if x1.Op != OpARM64SLLconst {
  2796  			break
  2797  		}
  2798  		c := auxIntToInt64(x1.AuxInt)
  2799  		y := x1.Args[0]
  2800  		if !(clobberIfDead(x1)) {
  2801  			break
  2802  		}
  2803  		v.reset(OpARM64CMPshiftLL)
  2804  		v.AuxInt = int64ToAuxInt(c)
  2805  		v.AddArg2(x0, y)
  2806  		return true
  2807  	}
  2808  	// match: (CMP x0:(SLLconst [c] y) x1)
  2809  	// cond: clobberIfDead(x0)
  2810  	// result: (InvertFlags (CMPshiftLL x1 y [c]))
  2811  	for {
  2812  		x0 := v_0
  2813  		if x0.Op != OpARM64SLLconst {
  2814  			break
  2815  		}
  2816  		c := auxIntToInt64(x0.AuxInt)
  2817  		y := x0.Args[0]
  2818  		x1 := v_1
  2819  		if !(clobberIfDead(x0)) {
  2820  			break
  2821  		}
  2822  		v.reset(OpARM64InvertFlags)
  2823  		v0 := b.NewValue0(v.Pos, OpARM64CMPshiftLL, types.TypeFlags)
  2824  		v0.AuxInt = int64ToAuxInt(c)
  2825  		v0.AddArg2(x1, y)
  2826  		v.AddArg(v0)
  2827  		return true
  2828  	}
  2829  	// match: (CMP x0 x1:(SRLconst [c] y))
  2830  	// cond: clobberIfDead(x1)
  2831  	// result: (CMPshiftRL x0 y [c])
  2832  	for {
  2833  		x0 := v_0
  2834  		x1 := v_1
  2835  		if x1.Op != OpARM64SRLconst {
  2836  			break
  2837  		}
  2838  		c := auxIntToInt64(x1.AuxInt)
  2839  		y := x1.Args[0]
  2840  		if !(clobberIfDead(x1)) {
  2841  			break
  2842  		}
  2843  		v.reset(OpARM64CMPshiftRL)
  2844  		v.AuxInt = int64ToAuxInt(c)
  2845  		v.AddArg2(x0, y)
  2846  		return true
  2847  	}
  2848  	// match: (CMP x0:(SRLconst [c] y) x1)
  2849  	// cond: clobberIfDead(x0)
  2850  	// result: (InvertFlags (CMPshiftRL x1 y [c]))
  2851  	for {
  2852  		x0 := v_0
  2853  		if x0.Op != OpARM64SRLconst {
  2854  			break
  2855  		}
  2856  		c := auxIntToInt64(x0.AuxInt)
  2857  		y := x0.Args[0]
  2858  		x1 := v_1
  2859  		if !(clobberIfDead(x0)) {
  2860  			break
  2861  		}
  2862  		v.reset(OpARM64InvertFlags)
  2863  		v0 := b.NewValue0(v.Pos, OpARM64CMPshiftRL, types.TypeFlags)
  2864  		v0.AuxInt = int64ToAuxInt(c)
  2865  		v0.AddArg2(x1, y)
  2866  		v.AddArg(v0)
  2867  		return true
  2868  	}
  2869  	// match: (CMP x0 x1:(SRAconst [c] y))
  2870  	// cond: clobberIfDead(x1)
  2871  	// result: (CMPshiftRA x0 y [c])
  2872  	for {
  2873  		x0 := v_0
  2874  		x1 := v_1
  2875  		if x1.Op != OpARM64SRAconst {
  2876  			break
  2877  		}
  2878  		c := auxIntToInt64(x1.AuxInt)
  2879  		y := x1.Args[0]
  2880  		if !(clobberIfDead(x1)) {
  2881  			break
  2882  		}
  2883  		v.reset(OpARM64CMPshiftRA)
  2884  		v.AuxInt = int64ToAuxInt(c)
  2885  		v.AddArg2(x0, y)
  2886  		return true
  2887  	}
  2888  	// match: (CMP x0:(SRAconst [c] y) x1)
  2889  	// cond: clobberIfDead(x0)
  2890  	// result: (InvertFlags (CMPshiftRA x1 y [c]))
  2891  	for {
  2892  		x0 := v_0
  2893  		if x0.Op != OpARM64SRAconst {
  2894  			break
  2895  		}
  2896  		c := auxIntToInt64(x0.AuxInt)
  2897  		y := x0.Args[0]
  2898  		x1 := v_1
  2899  		if !(clobberIfDead(x0)) {
  2900  			break
  2901  		}
  2902  		v.reset(OpARM64InvertFlags)
  2903  		v0 := b.NewValue0(v.Pos, OpARM64CMPshiftRA, types.TypeFlags)
  2904  		v0.AuxInt = int64ToAuxInt(c)
  2905  		v0.AddArg2(x1, y)
  2906  		v.AddArg(v0)
  2907  		return true
  2908  	}
  2909  	return false
  2910  }
  2911  func rewriteValueARM64_OpARM64CMPW(v *Value) bool {
  2912  	v_1 := v.Args[1]
  2913  	v_0 := v.Args[0]
  2914  	b := v.Block
  2915  	// match: (CMPW x (MOVDconst [c]))
  2916  	// result: (CMPWconst [int32(c)] x)
  2917  	for {
  2918  		x := v_0
  2919  		if v_1.Op != OpARM64MOVDconst {
  2920  			break
  2921  		}
  2922  		c := auxIntToInt64(v_1.AuxInt)
  2923  		v.reset(OpARM64CMPWconst)
  2924  		v.AuxInt = int32ToAuxInt(int32(c))
  2925  		v.AddArg(x)
  2926  		return true
  2927  	}
  2928  	// match: (CMPW (MOVDconst [c]) x)
  2929  	// result: (InvertFlags (CMPWconst [int32(c)] x))
  2930  	for {
  2931  		if v_0.Op != OpARM64MOVDconst {
  2932  			break
  2933  		}
  2934  		c := auxIntToInt64(v_0.AuxInt)
  2935  		x := v_1
  2936  		v.reset(OpARM64InvertFlags)
  2937  		v0 := b.NewValue0(v.Pos, OpARM64CMPWconst, types.TypeFlags)
  2938  		v0.AuxInt = int32ToAuxInt(int32(c))
  2939  		v0.AddArg(x)
  2940  		v.AddArg(v0)
  2941  		return true
  2942  	}
  2943  	// match: (CMPW x y)
  2944  	// cond: x.ID > y.ID
  2945  	// result: (InvertFlags (CMPW y x))
  2946  	for {
  2947  		x := v_0
  2948  		y := v_1
  2949  		if !(x.ID > y.ID) {
  2950  			break
  2951  		}
  2952  		v.reset(OpARM64InvertFlags)
  2953  		v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
  2954  		v0.AddArg2(y, x)
  2955  		v.AddArg(v0)
  2956  		return true
  2957  	}
  2958  	return false
  2959  }
  2960  func rewriteValueARM64_OpARM64CMPWconst(v *Value) bool {
  2961  	v_0 := v.Args[0]
  2962  	// match: (CMPWconst (MOVDconst [x]) [y])
  2963  	// result: (FlagConstant [subFlags32(int32(x),y)])
  2964  	for {
  2965  		y := auxIntToInt32(v.AuxInt)
  2966  		if v_0.Op != OpARM64MOVDconst {
  2967  			break
  2968  		}
  2969  		x := auxIntToInt64(v_0.AuxInt)
  2970  		v.reset(OpARM64FlagConstant)
  2971  		v.AuxInt = flagConstantToAuxInt(subFlags32(int32(x), y))
  2972  		return true
  2973  	}
  2974  	// match: (CMPWconst (MOVBUreg _) [c])
  2975  	// cond: 0xff < c
  2976  	// result: (FlagConstant [subFlags64(0,1)])
  2977  	for {
  2978  		c := auxIntToInt32(v.AuxInt)
  2979  		if v_0.Op != OpARM64MOVBUreg || !(0xff < c) {
  2980  			break
  2981  		}
  2982  		v.reset(OpARM64FlagConstant)
  2983  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  2984  		return true
  2985  	}
  2986  	// match: (CMPWconst (MOVHUreg _) [c])
  2987  	// cond: 0xffff < c
  2988  	// result: (FlagConstant [subFlags64(0,1)])
  2989  	for {
  2990  		c := auxIntToInt32(v.AuxInt)
  2991  		if v_0.Op != OpARM64MOVHUreg || !(0xffff < c) {
  2992  			break
  2993  		}
  2994  		v.reset(OpARM64FlagConstant)
  2995  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  2996  		return true
  2997  	}
  2998  	return false
  2999  }
  3000  func rewriteValueARM64_OpARM64CMPconst(v *Value) bool {
  3001  	v_0 := v.Args[0]
  3002  	// match: (CMPconst (MOVDconst [x]) [y])
  3003  	// result: (FlagConstant [subFlags64(x,y)])
  3004  	for {
  3005  		y := auxIntToInt64(v.AuxInt)
  3006  		if v_0.Op != OpARM64MOVDconst {
  3007  			break
  3008  		}
  3009  		x := auxIntToInt64(v_0.AuxInt)
  3010  		v.reset(OpARM64FlagConstant)
  3011  		v.AuxInt = flagConstantToAuxInt(subFlags64(x, y))
  3012  		return true
  3013  	}
  3014  	// match: (CMPconst (MOVBUreg _) [c])
  3015  	// cond: 0xff < c
  3016  	// result: (FlagConstant [subFlags64(0,1)])
  3017  	for {
  3018  		c := auxIntToInt64(v.AuxInt)
  3019  		if v_0.Op != OpARM64MOVBUreg || !(0xff < c) {
  3020  			break
  3021  		}
  3022  		v.reset(OpARM64FlagConstant)
  3023  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  3024  		return true
  3025  	}
  3026  	// match: (CMPconst (MOVHUreg _) [c])
  3027  	// cond: 0xffff < c
  3028  	// result: (FlagConstant [subFlags64(0,1)])
  3029  	for {
  3030  		c := auxIntToInt64(v.AuxInt)
  3031  		if v_0.Op != OpARM64MOVHUreg || !(0xffff < c) {
  3032  			break
  3033  		}
  3034  		v.reset(OpARM64FlagConstant)
  3035  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  3036  		return true
  3037  	}
  3038  	// match: (CMPconst (MOVWUreg _) [c])
  3039  	// cond: 0xffffffff < c
  3040  	// result: (FlagConstant [subFlags64(0,1)])
  3041  	for {
  3042  		c := auxIntToInt64(v.AuxInt)
  3043  		if v_0.Op != OpARM64MOVWUreg || !(0xffffffff < c) {
  3044  			break
  3045  		}
  3046  		v.reset(OpARM64FlagConstant)
  3047  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  3048  		return true
  3049  	}
  3050  	// match: (CMPconst (ANDconst _ [m]) [n])
  3051  	// cond: 0 <= m && m < n
  3052  	// result: (FlagConstant [subFlags64(0,1)])
  3053  	for {
  3054  		n := auxIntToInt64(v.AuxInt)
  3055  		if v_0.Op != OpARM64ANDconst {
  3056  			break
  3057  		}
  3058  		m := auxIntToInt64(v_0.AuxInt)
  3059  		if !(0 <= m && m < n) {
  3060  			break
  3061  		}
  3062  		v.reset(OpARM64FlagConstant)
  3063  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  3064  		return true
  3065  	}
  3066  	// match: (CMPconst (SRLconst _ [c]) [n])
  3067  	// cond: 0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n)
  3068  	// result: (FlagConstant [subFlags64(0,1)])
  3069  	for {
  3070  		n := auxIntToInt64(v.AuxInt)
  3071  		if v_0.Op != OpARM64SRLconst {
  3072  			break
  3073  		}
  3074  		c := auxIntToInt64(v_0.AuxInt)
  3075  		if !(0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n)) {
  3076  			break
  3077  		}
  3078  		v.reset(OpARM64FlagConstant)
  3079  		v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1))
  3080  		return true
  3081  	}
  3082  	return false
  3083  }
  3084  func rewriteValueARM64_OpARM64CMPshiftLL(v *Value) bool {
  3085  	v_1 := v.Args[1]
  3086  	v_0 := v.Args[0]
  3087  	b := v.Block
  3088  	// match: (CMPshiftLL (MOVDconst [c]) x [d])
  3089  	// result: (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d])))
  3090  	for {
  3091  		d := auxIntToInt64(v.AuxInt)
  3092  		if v_0.Op != OpARM64MOVDconst {
  3093  			break
  3094  		}
  3095  		c := auxIntToInt64(v_0.AuxInt)
  3096  		x := v_1
  3097  		v.reset(OpARM64InvertFlags)
  3098  		v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
  3099  		v0.AuxInt = int64ToAuxInt(c)
  3100  		v1 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  3101  		v1.AuxInt = int64ToAuxInt(d)
  3102  		v1.AddArg(x)
  3103  		v0.AddArg(v1)
  3104  		v.AddArg(v0)
  3105  		return true
  3106  	}
  3107  	// match: (CMPshiftLL x (MOVDconst [c]) [d])
  3108  	// result: (CMPconst x [int64(uint64(c)<<uint64(d))])
  3109  	for {
  3110  		d := auxIntToInt64(v.AuxInt)
  3111  		x := v_0
  3112  		if v_1.Op != OpARM64MOVDconst {
  3113  			break
  3114  		}
  3115  		c := auxIntToInt64(v_1.AuxInt)
  3116  		v.reset(OpARM64CMPconst)
  3117  		v.AuxInt = int64ToAuxInt(int64(uint64(c) << uint64(d)))
  3118  		v.AddArg(x)
  3119  		return true
  3120  	}
  3121  	return false
  3122  }
  3123  func rewriteValueARM64_OpARM64CMPshiftRA(v *Value) bool {
  3124  	v_1 := v.Args[1]
  3125  	v_0 := v.Args[0]
  3126  	b := v.Block
  3127  	// match: (CMPshiftRA (MOVDconst [c]) x [d])
  3128  	// result: (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d])))
  3129  	for {
  3130  		d := auxIntToInt64(v.AuxInt)
  3131  		if v_0.Op != OpARM64MOVDconst {
  3132  			break
  3133  		}
  3134  		c := auxIntToInt64(v_0.AuxInt)
  3135  		x := v_1
  3136  		v.reset(OpARM64InvertFlags)
  3137  		v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
  3138  		v0.AuxInt = int64ToAuxInt(c)
  3139  		v1 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
  3140  		v1.AuxInt = int64ToAuxInt(d)
  3141  		v1.AddArg(x)
  3142  		v0.AddArg(v1)
  3143  		v.AddArg(v0)
  3144  		return true
  3145  	}
  3146  	// match: (CMPshiftRA x (MOVDconst [c]) [d])
  3147  	// result: (CMPconst x [c>>uint64(d)])
  3148  	for {
  3149  		d := auxIntToInt64(v.AuxInt)
  3150  		x := v_0
  3151  		if v_1.Op != OpARM64MOVDconst {
  3152  			break
  3153  		}
  3154  		c := auxIntToInt64(v_1.AuxInt)
  3155  		v.reset(OpARM64CMPconst)
  3156  		v.AuxInt = int64ToAuxInt(c >> uint64(d))
  3157  		v.AddArg(x)
  3158  		return true
  3159  	}
  3160  	return false
  3161  }
  3162  func rewriteValueARM64_OpARM64CMPshiftRL(v *Value) bool {
  3163  	v_1 := v.Args[1]
  3164  	v_0 := v.Args[0]
  3165  	b := v.Block
  3166  	// match: (CMPshiftRL (MOVDconst [c]) x [d])
  3167  	// result: (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d])))
  3168  	for {
  3169  		d := auxIntToInt64(v.AuxInt)
  3170  		if v_0.Op != OpARM64MOVDconst {
  3171  			break
  3172  		}
  3173  		c := auxIntToInt64(v_0.AuxInt)
  3174  		x := v_1
  3175  		v.reset(OpARM64InvertFlags)
  3176  		v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
  3177  		v0.AuxInt = int64ToAuxInt(c)
  3178  		v1 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
  3179  		v1.AuxInt = int64ToAuxInt(d)
  3180  		v1.AddArg(x)
  3181  		v0.AddArg(v1)
  3182  		v.AddArg(v0)
  3183  		return true
  3184  	}
  3185  	// match: (CMPshiftRL x (MOVDconst [c]) [d])
  3186  	// result: (CMPconst x [int64(uint64(c)>>uint64(d))])
  3187  	for {
  3188  		d := auxIntToInt64(v.AuxInt)
  3189  		x := v_0
  3190  		if v_1.Op != OpARM64MOVDconst {
  3191  			break
  3192  		}
  3193  		c := auxIntToInt64(v_1.AuxInt)
  3194  		v.reset(OpARM64CMPconst)
  3195  		v.AuxInt = int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  3196  		v.AddArg(x)
  3197  		return true
  3198  	}
  3199  	return false
  3200  }
  3201  func rewriteValueARM64_OpARM64CSEL(v *Value) bool {
  3202  	v_2 := v.Args[2]
  3203  	v_1 := v.Args[1]
  3204  	v_0 := v.Args[0]
  3205  	// match: (CSEL [cc] x (MOVDconst [0]) flag)
  3206  	// result: (CSEL0 [cc] x flag)
  3207  	for {
  3208  		cc := auxIntToOp(v.AuxInt)
  3209  		x := v_0
  3210  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
  3211  			break
  3212  		}
  3213  		flag := v_2
  3214  		v.reset(OpARM64CSEL0)
  3215  		v.AuxInt = opToAuxInt(cc)
  3216  		v.AddArg2(x, flag)
  3217  		return true
  3218  	}
  3219  	// match: (CSEL [cc] (MOVDconst [0]) y flag)
  3220  	// result: (CSEL0 [arm64Negate(cc)] y flag)
  3221  	for {
  3222  		cc := auxIntToOp(v.AuxInt)
  3223  		if v_0.Op != OpARM64MOVDconst || auxIntToInt64(v_0.AuxInt) != 0 {
  3224  			break
  3225  		}
  3226  		y := v_1
  3227  		flag := v_2
  3228  		v.reset(OpARM64CSEL0)
  3229  		v.AuxInt = opToAuxInt(arm64Negate(cc))
  3230  		v.AddArg2(y, flag)
  3231  		return true
  3232  	}
  3233  	// match: (CSEL [cc] x y (InvertFlags cmp))
  3234  	// result: (CSEL [arm64Invert(cc)] x y cmp)
  3235  	for {
  3236  		cc := auxIntToOp(v.AuxInt)
  3237  		x := v_0
  3238  		y := v_1
  3239  		if v_2.Op != OpARM64InvertFlags {
  3240  			break
  3241  		}
  3242  		cmp := v_2.Args[0]
  3243  		v.reset(OpARM64CSEL)
  3244  		v.AuxInt = opToAuxInt(arm64Invert(cc))
  3245  		v.AddArg3(x, y, cmp)
  3246  		return true
  3247  	}
  3248  	// match: (CSEL [cc] x _ flag)
  3249  	// cond: ccARM64Eval(cc, flag) > 0
  3250  	// result: x
  3251  	for {
  3252  		cc := auxIntToOp(v.AuxInt)
  3253  		x := v_0
  3254  		flag := v_2
  3255  		if !(ccARM64Eval(cc, flag) > 0) {
  3256  			break
  3257  		}
  3258  		v.copyOf(x)
  3259  		return true
  3260  	}
  3261  	// match: (CSEL [cc] _ y flag)
  3262  	// cond: ccARM64Eval(cc, flag) < 0
  3263  	// result: y
  3264  	for {
  3265  		cc := auxIntToOp(v.AuxInt)
  3266  		y := v_1
  3267  		flag := v_2
  3268  		if !(ccARM64Eval(cc, flag) < 0) {
  3269  			break
  3270  		}
  3271  		v.copyOf(y)
  3272  		return true
  3273  	}
  3274  	// match: (CSEL [cc] x y (CMPWconst [0] boolval))
  3275  	// cond: cc == OpARM64NotEqual && flagArg(boolval) != nil
  3276  	// result: (CSEL [boolval.Op] x y flagArg(boolval))
  3277  	for {
  3278  		cc := auxIntToOp(v.AuxInt)
  3279  		x := v_0
  3280  		y := v_1
  3281  		if v_2.Op != OpARM64CMPWconst || auxIntToInt32(v_2.AuxInt) != 0 {
  3282  			break
  3283  		}
  3284  		boolval := v_2.Args[0]
  3285  		if !(cc == OpARM64NotEqual && flagArg(boolval) != nil) {
  3286  			break
  3287  		}
  3288  		v.reset(OpARM64CSEL)
  3289  		v.AuxInt = opToAuxInt(boolval.Op)
  3290  		v.AddArg3(x, y, flagArg(boolval))
  3291  		return true
  3292  	}
  3293  	// match: (CSEL [cc] x y (CMPWconst [0] boolval))
  3294  	// cond: cc == OpARM64Equal && flagArg(boolval) != nil
  3295  	// result: (CSEL [arm64Negate(boolval.Op)] x y flagArg(boolval))
  3296  	for {
  3297  		cc := auxIntToOp(v.AuxInt)
  3298  		x := v_0
  3299  		y := v_1
  3300  		if v_2.Op != OpARM64CMPWconst || auxIntToInt32(v_2.AuxInt) != 0 {
  3301  			break
  3302  		}
  3303  		boolval := v_2.Args[0]
  3304  		if !(cc == OpARM64Equal && flagArg(boolval) != nil) {
  3305  			break
  3306  		}
  3307  		v.reset(OpARM64CSEL)
  3308  		v.AuxInt = opToAuxInt(arm64Negate(boolval.Op))
  3309  		v.AddArg3(x, y, flagArg(boolval))
  3310  		return true
  3311  	}
  3312  	return false
  3313  }
  3314  func rewriteValueARM64_OpARM64CSEL0(v *Value) bool {
  3315  	v_1 := v.Args[1]
  3316  	v_0 := v.Args[0]
  3317  	// match: (CSEL0 [cc] x (InvertFlags cmp))
  3318  	// result: (CSEL0 [arm64Invert(cc)] x cmp)
  3319  	for {
  3320  		cc := auxIntToOp(v.AuxInt)
  3321  		x := v_0
  3322  		if v_1.Op != OpARM64InvertFlags {
  3323  			break
  3324  		}
  3325  		cmp := v_1.Args[0]
  3326  		v.reset(OpARM64CSEL0)
  3327  		v.AuxInt = opToAuxInt(arm64Invert(cc))
  3328  		v.AddArg2(x, cmp)
  3329  		return true
  3330  	}
  3331  	// match: (CSEL0 [cc] x flag)
  3332  	// cond: ccARM64Eval(cc, flag) > 0
  3333  	// result: x
  3334  	for {
  3335  		cc := auxIntToOp(v.AuxInt)
  3336  		x := v_0
  3337  		flag := v_1
  3338  		if !(ccARM64Eval(cc, flag) > 0) {
  3339  			break
  3340  		}
  3341  		v.copyOf(x)
  3342  		return true
  3343  	}
  3344  	// match: (CSEL0 [cc] _ flag)
  3345  	// cond: ccARM64Eval(cc, flag) < 0
  3346  	// result: (MOVDconst [0])
  3347  	for {
  3348  		cc := auxIntToOp(v.AuxInt)
  3349  		flag := v_1
  3350  		if !(ccARM64Eval(cc, flag) < 0) {
  3351  			break
  3352  		}
  3353  		v.reset(OpARM64MOVDconst)
  3354  		v.AuxInt = int64ToAuxInt(0)
  3355  		return true
  3356  	}
  3357  	// match: (CSEL0 [cc] x (CMPWconst [0] boolval))
  3358  	// cond: cc == OpARM64NotEqual && flagArg(boolval) != nil
  3359  	// result: (CSEL0 [boolval.Op] x flagArg(boolval))
  3360  	for {
  3361  		cc := auxIntToOp(v.AuxInt)
  3362  		x := v_0
  3363  		if v_1.Op != OpARM64CMPWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3364  			break
  3365  		}
  3366  		boolval := v_1.Args[0]
  3367  		if !(cc == OpARM64NotEqual && flagArg(boolval) != nil) {
  3368  			break
  3369  		}
  3370  		v.reset(OpARM64CSEL0)
  3371  		v.AuxInt = opToAuxInt(boolval.Op)
  3372  		v.AddArg2(x, flagArg(boolval))
  3373  		return true
  3374  	}
  3375  	// match: (CSEL0 [cc] x (CMPWconst [0] boolval))
  3376  	// cond: cc == OpARM64Equal && flagArg(boolval) != nil
  3377  	// result: (CSEL0 [arm64Negate(boolval.Op)] x flagArg(boolval))
  3378  	for {
  3379  		cc := auxIntToOp(v.AuxInt)
  3380  		x := v_0
  3381  		if v_1.Op != OpARM64CMPWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3382  			break
  3383  		}
  3384  		boolval := v_1.Args[0]
  3385  		if !(cc == OpARM64Equal && flagArg(boolval) != nil) {
  3386  			break
  3387  		}
  3388  		v.reset(OpARM64CSEL0)
  3389  		v.AuxInt = opToAuxInt(arm64Negate(boolval.Op))
  3390  		v.AddArg2(x, flagArg(boolval))
  3391  		return true
  3392  	}
  3393  	return false
  3394  }
  3395  func rewriteValueARM64_OpARM64DIV(v *Value) bool {
  3396  	v_1 := v.Args[1]
  3397  	v_0 := v.Args[0]
  3398  	// match: (DIV (MOVDconst [c]) (MOVDconst [d]))
  3399  	// cond: d != 0
  3400  	// result: (MOVDconst [c/d])
  3401  	for {
  3402  		if v_0.Op != OpARM64MOVDconst {
  3403  			break
  3404  		}
  3405  		c := auxIntToInt64(v_0.AuxInt)
  3406  		if v_1.Op != OpARM64MOVDconst {
  3407  			break
  3408  		}
  3409  		d := auxIntToInt64(v_1.AuxInt)
  3410  		if !(d != 0) {
  3411  			break
  3412  		}
  3413  		v.reset(OpARM64MOVDconst)
  3414  		v.AuxInt = int64ToAuxInt(c / d)
  3415  		return true
  3416  	}
  3417  	return false
  3418  }
  3419  func rewriteValueARM64_OpARM64DIVW(v *Value) bool {
  3420  	v_1 := v.Args[1]
  3421  	v_0 := v.Args[0]
  3422  	// match: (DIVW (MOVDconst [c]) (MOVDconst [d]))
  3423  	// cond: d != 0
  3424  	// result: (MOVDconst [int64(int32(c)/int32(d))])
  3425  	for {
  3426  		if v_0.Op != OpARM64MOVDconst {
  3427  			break
  3428  		}
  3429  		c := auxIntToInt64(v_0.AuxInt)
  3430  		if v_1.Op != OpARM64MOVDconst {
  3431  			break
  3432  		}
  3433  		d := auxIntToInt64(v_1.AuxInt)
  3434  		if !(d != 0) {
  3435  			break
  3436  		}
  3437  		v.reset(OpARM64MOVDconst)
  3438  		v.AuxInt = int64ToAuxInt(int64(int32(c) / int32(d)))
  3439  		return true
  3440  	}
  3441  	return false
  3442  }
  3443  func rewriteValueARM64_OpARM64EON(v *Value) bool {
  3444  	v_1 := v.Args[1]
  3445  	v_0 := v.Args[0]
  3446  	// match: (EON x (MOVDconst [c]))
  3447  	// result: (XORconst [^c] x)
  3448  	for {
  3449  		x := v_0
  3450  		if v_1.Op != OpARM64MOVDconst {
  3451  			break
  3452  		}
  3453  		c := auxIntToInt64(v_1.AuxInt)
  3454  		v.reset(OpARM64XORconst)
  3455  		v.AuxInt = int64ToAuxInt(^c)
  3456  		v.AddArg(x)
  3457  		return true
  3458  	}
  3459  	// match: (EON x x)
  3460  	// result: (MOVDconst [-1])
  3461  	for {
  3462  		x := v_0
  3463  		if x != v_1 {
  3464  			break
  3465  		}
  3466  		v.reset(OpARM64MOVDconst)
  3467  		v.AuxInt = int64ToAuxInt(-1)
  3468  		return true
  3469  	}
  3470  	// match: (EON x0 x1:(SLLconst [c] y))
  3471  	// cond: clobberIfDead(x1)
  3472  	// result: (EONshiftLL x0 y [c])
  3473  	for {
  3474  		x0 := v_0
  3475  		x1 := v_1
  3476  		if x1.Op != OpARM64SLLconst {
  3477  			break
  3478  		}
  3479  		c := auxIntToInt64(x1.AuxInt)
  3480  		y := x1.Args[0]
  3481  		if !(clobberIfDead(x1)) {
  3482  			break
  3483  		}
  3484  		v.reset(OpARM64EONshiftLL)
  3485  		v.AuxInt = int64ToAuxInt(c)
  3486  		v.AddArg2(x0, y)
  3487  		return true
  3488  	}
  3489  	// match: (EON x0 x1:(SRLconst [c] y))
  3490  	// cond: clobberIfDead(x1)
  3491  	// result: (EONshiftRL x0 y [c])
  3492  	for {
  3493  		x0 := v_0
  3494  		x1 := v_1
  3495  		if x1.Op != OpARM64SRLconst {
  3496  			break
  3497  		}
  3498  		c := auxIntToInt64(x1.AuxInt)
  3499  		y := x1.Args[0]
  3500  		if !(clobberIfDead(x1)) {
  3501  			break
  3502  		}
  3503  		v.reset(OpARM64EONshiftRL)
  3504  		v.AuxInt = int64ToAuxInt(c)
  3505  		v.AddArg2(x0, y)
  3506  		return true
  3507  	}
  3508  	// match: (EON x0 x1:(SRAconst [c] y))
  3509  	// cond: clobberIfDead(x1)
  3510  	// result: (EONshiftRA x0 y [c])
  3511  	for {
  3512  		x0 := v_0
  3513  		x1 := v_1
  3514  		if x1.Op != OpARM64SRAconst {
  3515  			break
  3516  		}
  3517  		c := auxIntToInt64(x1.AuxInt)
  3518  		y := x1.Args[0]
  3519  		if !(clobberIfDead(x1)) {
  3520  			break
  3521  		}
  3522  		v.reset(OpARM64EONshiftRA)
  3523  		v.AuxInt = int64ToAuxInt(c)
  3524  		v.AddArg2(x0, y)
  3525  		return true
  3526  	}
  3527  	return false
  3528  }
  3529  func rewriteValueARM64_OpARM64EONshiftLL(v *Value) bool {
  3530  	v_1 := v.Args[1]
  3531  	v_0 := v.Args[0]
  3532  	// match: (EONshiftLL x (MOVDconst [c]) [d])
  3533  	// result: (XORconst x [^int64(uint64(c)<<uint64(d))])
  3534  	for {
  3535  		d := auxIntToInt64(v.AuxInt)
  3536  		x := v_0
  3537  		if v_1.Op != OpARM64MOVDconst {
  3538  			break
  3539  		}
  3540  		c := auxIntToInt64(v_1.AuxInt)
  3541  		v.reset(OpARM64XORconst)
  3542  		v.AuxInt = int64ToAuxInt(^int64(uint64(c) << uint64(d)))
  3543  		v.AddArg(x)
  3544  		return true
  3545  	}
  3546  	// match: (EONshiftLL x (SLLconst x [c]) [d])
  3547  	// cond: c==d
  3548  	// result: (MOVDconst [-1])
  3549  	for {
  3550  		d := auxIntToInt64(v.AuxInt)
  3551  		x := v_0
  3552  		if v_1.Op != OpARM64SLLconst {
  3553  			break
  3554  		}
  3555  		c := auxIntToInt64(v_1.AuxInt)
  3556  		if x != v_1.Args[0] || !(c == d) {
  3557  			break
  3558  		}
  3559  		v.reset(OpARM64MOVDconst)
  3560  		v.AuxInt = int64ToAuxInt(-1)
  3561  		return true
  3562  	}
  3563  	return false
  3564  }
  3565  func rewriteValueARM64_OpARM64EONshiftRA(v *Value) bool {
  3566  	v_1 := v.Args[1]
  3567  	v_0 := v.Args[0]
  3568  	// match: (EONshiftRA x (MOVDconst [c]) [d])
  3569  	// result: (XORconst x [^(c>>uint64(d))])
  3570  	for {
  3571  		d := auxIntToInt64(v.AuxInt)
  3572  		x := v_0
  3573  		if v_1.Op != OpARM64MOVDconst {
  3574  			break
  3575  		}
  3576  		c := auxIntToInt64(v_1.AuxInt)
  3577  		v.reset(OpARM64XORconst)
  3578  		v.AuxInt = int64ToAuxInt(^(c >> uint64(d)))
  3579  		v.AddArg(x)
  3580  		return true
  3581  	}
  3582  	// match: (EONshiftRA x (SRAconst x [c]) [d])
  3583  	// cond: c==d
  3584  	// result: (MOVDconst [-1])
  3585  	for {
  3586  		d := auxIntToInt64(v.AuxInt)
  3587  		x := v_0
  3588  		if v_1.Op != OpARM64SRAconst {
  3589  			break
  3590  		}
  3591  		c := auxIntToInt64(v_1.AuxInt)
  3592  		if x != v_1.Args[0] || !(c == d) {
  3593  			break
  3594  		}
  3595  		v.reset(OpARM64MOVDconst)
  3596  		v.AuxInt = int64ToAuxInt(-1)
  3597  		return true
  3598  	}
  3599  	return false
  3600  }
  3601  func rewriteValueARM64_OpARM64EONshiftRL(v *Value) bool {
  3602  	v_1 := v.Args[1]
  3603  	v_0 := v.Args[0]
  3604  	// match: (EONshiftRL x (MOVDconst [c]) [d])
  3605  	// result: (XORconst x [^int64(uint64(c)>>uint64(d))])
  3606  	for {
  3607  		d := auxIntToInt64(v.AuxInt)
  3608  		x := v_0
  3609  		if v_1.Op != OpARM64MOVDconst {
  3610  			break
  3611  		}
  3612  		c := auxIntToInt64(v_1.AuxInt)
  3613  		v.reset(OpARM64XORconst)
  3614  		v.AuxInt = int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
  3615  		v.AddArg(x)
  3616  		return true
  3617  	}
  3618  	// match: (EONshiftRL x (SRLconst x [c]) [d])
  3619  	// cond: c==d
  3620  	// result: (MOVDconst [-1])
  3621  	for {
  3622  		d := auxIntToInt64(v.AuxInt)
  3623  		x := v_0
  3624  		if v_1.Op != OpARM64SRLconst {
  3625  			break
  3626  		}
  3627  		c := auxIntToInt64(v_1.AuxInt)
  3628  		if x != v_1.Args[0] || !(c == d) {
  3629  			break
  3630  		}
  3631  		v.reset(OpARM64MOVDconst)
  3632  		v.AuxInt = int64ToAuxInt(-1)
  3633  		return true
  3634  	}
  3635  	return false
  3636  }
  3637  func rewriteValueARM64_OpARM64Equal(v *Value) bool {
  3638  	v_0 := v.Args[0]
  3639  	// match: (Equal (FlagConstant [fc]))
  3640  	// result: (MOVDconst [b2i(fc.eq())])
  3641  	for {
  3642  		if v_0.Op != OpARM64FlagConstant {
  3643  			break
  3644  		}
  3645  		fc := auxIntToFlagConstant(v_0.AuxInt)
  3646  		v.reset(OpARM64MOVDconst)
  3647  		v.AuxInt = int64ToAuxInt(b2i(fc.eq()))
  3648  		return true
  3649  	}
  3650  	// match: (Equal (InvertFlags x))
  3651  	// result: (Equal x)
  3652  	for {
  3653  		if v_0.Op != OpARM64InvertFlags {
  3654  			break
  3655  		}
  3656  		x := v_0.Args[0]
  3657  		v.reset(OpARM64Equal)
  3658  		v.AddArg(x)
  3659  		return true
  3660  	}
  3661  	return false
  3662  }
  3663  func rewriteValueARM64_OpARM64FADDD(v *Value) bool {
  3664  	v_1 := v.Args[1]
  3665  	v_0 := v.Args[0]
  3666  	// match: (FADDD a (FMULD x y))
  3667  	// result: (FMADDD a x y)
  3668  	for {
  3669  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3670  			a := v_0
  3671  			if v_1.Op != OpARM64FMULD {
  3672  				continue
  3673  			}
  3674  			y := v_1.Args[1]
  3675  			x := v_1.Args[0]
  3676  			v.reset(OpARM64FMADDD)
  3677  			v.AddArg3(a, x, y)
  3678  			return true
  3679  		}
  3680  		break
  3681  	}
  3682  	// match: (FADDD a (FNMULD x y))
  3683  	// result: (FMSUBD a x y)
  3684  	for {
  3685  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3686  			a := v_0
  3687  			if v_1.Op != OpARM64FNMULD {
  3688  				continue
  3689  			}
  3690  			y := v_1.Args[1]
  3691  			x := v_1.Args[0]
  3692  			v.reset(OpARM64FMSUBD)
  3693  			v.AddArg3(a, x, y)
  3694  			return true
  3695  		}
  3696  		break
  3697  	}
  3698  	return false
  3699  }
  3700  func rewriteValueARM64_OpARM64FADDS(v *Value) bool {
  3701  	v_1 := v.Args[1]
  3702  	v_0 := v.Args[0]
  3703  	// match: (FADDS a (FMULS x y))
  3704  	// result: (FMADDS a x y)
  3705  	for {
  3706  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3707  			a := v_0
  3708  			if v_1.Op != OpARM64FMULS {
  3709  				continue
  3710  			}
  3711  			y := v_1.Args[1]
  3712  			x := v_1.Args[0]
  3713  			v.reset(OpARM64FMADDS)
  3714  			v.AddArg3(a, x, y)
  3715  			return true
  3716  		}
  3717  		break
  3718  	}
  3719  	// match: (FADDS a (FNMULS x y))
  3720  	// result: (FMSUBS a x y)
  3721  	for {
  3722  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3723  			a := v_0
  3724  			if v_1.Op != OpARM64FNMULS {
  3725  				continue
  3726  			}
  3727  			y := v_1.Args[1]
  3728  			x := v_1.Args[0]
  3729  			v.reset(OpARM64FMSUBS)
  3730  			v.AddArg3(a, x, y)
  3731  			return true
  3732  		}
  3733  		break
  3734  	}
  3735  	return false
  3736  }
  3737  func rewriteValueARM64_OpARM64FCMPD(v *Value) bool {
  3738  	v_1 := v.Args[1]
  3739  	v_0 := v.Args[0]
  3740  	b := v.Block
  3741  	// match: (FCMPD x (FMOVDconst [0]))
  3742  	// result: (FCMPD0 x)
  3743  	for {
  3744  		x := v_0
  3745  		if v_1.Op != OpARM64FMOVDconst || auxIntToFloat64(v_1.AuxInt) != 0 {
  3746  			break
  3747  		}
  3748  		v.reset(OpARM64FCMPD0)
  3749  		v.AddArg(x)
  3750  		return true
  3751  	}
  3752  	// match: (FCMPD (FMOVDconst [0]) x)
  3753  	// result: (InvertFlags (FCMPD0 x))
  3754  	for {
  3755  		if v_0.Op != OpARM64FMOVDconst || auxIntToFloat64(v_0.AuxInt) != 0 {
  3756  			break
  3757  		}
  3758  		x := v_1
  3759  		v.reset(OpARM64InvertFlags)
  3760  		v0 := b.NewValue0(v.Pos, OpARM64FCMPD0, types.TypeFlags)
  3761  		v0.AddArg(x)
  3762  		v.AddArg(v0)
  3763  		return true
  3764  	}
  3765  	return false
  3766  }
  3767  func rewriteValueARM64_OpARM64FCMPS(v *Value) bool {
  3768  	v_1 := v.Args[1]
  3769  	v_0 := v.Args[0]
  3770  	b := v.Block
  3771  	// match: (FCMPS x (FMOVSconst [0]))
  3772  	// result: (FCMPS0 x)
  3773  	for {
  3774  		x := v_0
  3775  		if v_1.Op != OpARM64FMOVSconst || auxIntToFloat64(v_1.AuxInt) != 0 {
  3776  			break
  3777  		}
  3778  		v.reset(OpARM64FCMPS0)
  3779  		v.AddArg(x)
  3780  		return true
  3781  	}
  3782  	// match: (FCMPS (FMOVSconst [0]) x)
  3783  	// result: (InvertFlags (FCMPS0 x))
  3784  	for {
  3785  		if v_0.Op != OpARM64FMOVSconst || auxIntToFloat64(v_0.AuxInt) != 0 {
  3786  			break
  3787  		}
  3788  		x := v_1
  3789  		v.reset(OpARM64InvertFlags)
  3790  		v0 := b.NewValue0(v.Pos, OpARM64FCMPS0, types.TypeFlags)
  3791  		v0.AddArg(x)
  3792  		v.AddArg(v0)
  3793  		return true
  3794  	}
  3795  	return false
  3796  }
  3797  func rewriteValueARM64_OpARM64FMOVDfpgp(v *Value) bool {
  3798  	v_0 := v.Args[0]
  3799  	b := v.Block
  3800  	// match: (FMOVDfpgp <t> (Arg [off] {sym}))
  3801  	// result: @b.Func.Entry (Arg <t> [off] {sym})
  3802  	for {
  3803  		t := v.Type
  3804  		if v_0.Op != OpArg {
  3805  			break
  3806  		}
  3807  		off := auxIntToInt32(v_0.AuxInt)
  3808  		sym := auxToSym(v_0.Aux)
  3809  		b = b.Func.Entry
  3810  		v0 := b.NewValue0(v.Pos, OpArg, t)
  3811  		v.copyOf(v0)
  3812  		v0.AuxInt = int32ToAuxInt(off)
  3813  		v0.Aux = symToAux(sym)
  3814  		return true
  3815  	}
  3816  	return false
  3817  }
  3818  func rewriteValueARM64_OpARM64FMOVDgpfp(v *Value) bool {
  3819  	v_0 := v.Args[0]
  3820  	b := v.Block
  3821  	// match: (FMOVDgpfp <t> (Arg [off] {sym}))
  3822  	// result: @b.Func.Entry (Arg <t> [off] {sym})
  3823  	for {
  3824  		t := v.Type
  3825  		if v_0.Op != OpArg {
  3826  			break
  3827  		}
  3828  		off := auxIntToInt32(v_0.AuxInt)
  3829  		sym := auxToSym(v_0.Aux)
  3830  		b = b.Func.Entry
  3831  		v0 := b.NewValue0(v.Pos, OpArg, t)
  3832  		v.copyOf(v0)
  3833  		v0.AuxInt = int32ToAuxInt(off)
  3834  		v0.Aux = symToAux(sym)
  3835  		return true
  3836  	}
  3837  	return false
  3838  }
  3839  func rewriteValueARM64_OpARM64FMOVDload(v *Value) bool {
  3840  	v_1 := v.Args[1]
  3841  	v_0 := v.Args[0]
  3842  	b := v.Block
  3843  	config := b.Func.Config
  3844  	// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr val _))
  3845  	// result: (FMOVDgpfp val)
  3846  	for {
  3847  		off := auxIntToInt32(v.AuxInt)
  3848  		sym := auxToSym(v.Aux)
  3849  		ptr := v_0
  3850  		if v_1.Op != OpARM64MOVDstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3851  			break
  3852  		}
  3853  		val := v_1.Args[1]
  3854  		if ptr != v_1.Args[0] {
  3855  			break
  3856  		}
  3857  		v.reset(OpARM64FMOVDgpfp)
  3858  		v.AddArg(val)
  3859  		return true
  3860  	}
  3861  	// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  3862  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3863  	// result: (FMOVDload [off1+int32(off2)] {sym} ptr mem)
  3864  	for {
  3865  		off1 := auxIntToInt32(v.AuxInt)
  3866  		sym := auxToSym(v.Aux)
  3867  		if v_0.Op != OpARM64ADDconst {
  3868  			break
  3869  		}
  3870  		off2 := auxIntToInt64(v_0.AuxInt)
  3871  		ptr := v_0.Args[0]
  3872  		mem := v_1
  3873  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3874  			break
  3875  		}
  3876  		v.reset(OpARM64FMOVDload)
  3877  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3878  		v.Aux = symToAux(sym)
  3879  		v.AddArg2(ptr, mem)
  3880  		return true
  3881  	}
  3882  	// match: (FMOVDload [off] {sym} (ADD ptr idx) mem)
  3883  	// cond: off == 0 && sym == nil
  3884  	// result: (FMOVDloadidx ptr idx mem)
  3885  	for {
  3886  		off := auxIntToInt32(v.AuxInt)
  3887  		sym := auxToSym(v.Aux)
  3888  		if v_0.Op != OpARM64ADD {
  3889  			break
  3890  		}
  3891  		idx := v_0.Args[1]
  3892  		ptr := v_0.Args[0]
  3893  		mem := v_1
  3894  		if !(off == 0 && sym == nil) {
  3895  			break
  3896  		}
  3897  		v.reset(OpARM64FMOVDloadidx)
  3898  		v.AddArg3(ptr, idx, mem)
  3899  		return true
  3900  	}
  3901  	// match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  3902  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3903  	// result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3904  	for {
  3905  		off1 := auxIntToInt32(v.AuxInt)
  3906  		sym1 := auxToSym(v.Aux)
  3907  		if v_0.Op != OpARM64MOVDaddr {
  3908  			break
  3909  		}
  3910  		off2 := auxIntToInt32(v_0.AuxInt)
  3911  		sym2 := auxToSym(v_0.Aux)
  3912  		ptr := v_0.Args[0]
  3913  		mem := v_1
  3914  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3915  			break
  3916  		}
  3917  		v.reset(OpARM64FMOVDload)
  3918  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3919  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3920  		v.AddArg2(ptr, mem)
  3921  		return true
  3922  	}
  3923  	return false
  3924  }
  3925  func rewriteValueARM64_OpARM64FMOVDloadidx(v *Value) bool {
  3926  	v_2 := v.Args[2]
  3927  	v_1 := v.Args[1]
  3928  	v_0 := v.Args[0]
  3929  	// match: (FMOVDloadidx ptr (MOVDconst [c]) mem)
  3930  	// cond: is32Bit(c)
  3931  	// result: (FMOVDload [int32(c)] ptr mem)
  3932  	for {
  3933  		ptr := v_0
  3934  		if v_1.Op != OpARM64MOVDconst {
  3935  			break
  3936  		}
  3937  		c := auxIntToInt64(v_1.AuxInt)
  3938  		mem := v_2
  3939  		if !(is32Bit(c)) {
  3940  			break
  3941  		}
  3942  		v.reset(OpARM64FMOVDload)
  3943  		v.AuxInt = int32ToAuxInt(int32(c))
  3944  		v.AddArg2(ptr, mem)
  3945  		return true
  3946  	}
  3947  	// match: (FMOVDloadidx (MOVDconst [c]) ptr mem)
  3948  	// cond: is32Bit(c)
  3949  	// result: (FMOVDload [int32(c)] ptr mem)
  3950  	for {
  3951  		if v_0.Op != OpARM64MOVDconst {
  3952  			break
  3953  		}
  3954  		c := auxIntToInt64(v_0.AuxInt)
  3955  		ptr := v_1
  3956  		mem := v_2
  3957  		if !(is32Bit(c)) {
  3958  			break
  3959  		}
  3960  		v.reset(OpARM64FMOVDload)
  3961  		v.AuxInt = int32ToAuxInt(int32(c))
  3962  		v.AddArg2(ptr, mem)
  3963  		return true
  3964  	}
  3965  	return false
  3966  }
  3967  func rewriteValueARM64_OpARM64FMOVDstore(v *Value) bool {
  3968  	v_2 := v.Args[2]
  3969  	v_1 := v.Args[1]
  3970  	v_0 := v.Args[0]
  3971  	b := v.Block
  3972  	config := b.Func.Config
  3973  	// match: (FMOVDstore [off] {sym} ptr (FMOVDgpfp val) mem)
  3974  	// result: (MOVDstore [off] {sym} ptr val mem)
  3975  	for {
  3976  		off := auxIntToInt32(v.AuxInt)
  3977  		sym := auxToSym(v.Aux)
  3978  		ptr := v_0
  3979  		if v_1.Op != OpARM64FMOVDgpfp {
  3980  			break
  3981  		}
  3982  		val := v_1.Args[0]
  3983  		mem := v_2
  3984  		v.reset(OpARM64MOVDstore)
  3985  		v.AuxInt = int32ToAuxInt(off)
  3986  		v.Aux = symToAux(sym)
  3987  		v.AddArg3(ptr, val, mem)
  3988  		return true
  3989  	}
  3990  	// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  3991  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3992  	// result: (FMOVDstore [off1+int32(off2)] {sym} ptr val mem)
  3993  	for {
  3994  		off1 := auxIntToInt32(v.AuxInt)
  3995  		sym := auxToSym(v.Aux)
  3996  		if v_0.Op != OpARM64ADDconst {
  3997  			break
  3998  		}
  3999  		off2 := auxIntToInt64(v_0.AuxInt)
  4000  		ptr := v_0.Args[0]
  4001  		val := v_1
  4002  		mem := v_2
  4003  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4004  			break
  4005  		}
  4006  		v.reset(OpARM64FMOVDstore)
  4007  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  4008  		v.Aux = symToAux(sym)
  4009  		v.AddArg3(ptr, val, mem)
  4010  		return true
  4011  	}
  4012  	// match: (FMOVDstore [off] {sym} (ADD ptr idx) val mem)
  4013  	// cond: off == 0 && sym == nil
  4014  	// result: (FMOVDstoreidx ptr idx val mem)
  4015  	for {
  4016  		off := auxIntToInt32(v.AuxInt)
  4017  		sym := auxToSym(v.Aux)
  4018  		if v_0.Op != OpARM64ADD {
  4019  			break
  4020  		}
  4021  		idx := v_0.Args[1]
  4022  		ptr := v_0.Args[0]
  4023  		val := v_1
  4024  		mem := v_2
  4025  		if !(off == 0 && sym == nil) {
  4026  			break
  4027  		}
  4028  		v.reset(OpARM64FMOVDstoreidx)
  4029  		v.AddArg4(ptr, idx, val, mem)
  4030  		return true
  4031  	}
  4032  	// match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  4033  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4034  	// result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  4035  	for {
  4036  		off1 := auxIntToInt32(v.AuxInt)
  4037  		sym1 := auxToSym(v.Aux)
  4038  		if v_0.Op != OpARM64MOVDaddr {
  4039  			break
  4040  		}
  4041  		off2 := auxIntToInt32(v_0.AuxInt)
  4042  		sym2 := auxToSym(v_0.Aux)
  4043  		ptr := v_0.Args[0]
  4044  		val := v_1
  4045  		mem := v_2
  4046  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4047  			break
  4048  		}
  4049  		v.reset(OpARM64FMOVDstore)
  4050  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4051  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4052  		v.AddArg3(ptr, val, mem)
  4053  		return true
  4054  	}
  4055  	return false
  4056  }
  4057  func rewriteValueARM64_OpARM64FMOVDstoreidx(v *Value) bool {
  4058  	v_3 := v.Args[3]
  4059  	v_2 := v.Args[2]
  4060  	v_1 := v.Args[1]
  4061  	v_0 := v.Args[0]
  4062  	// match: (FMOVDstoreidx ptr (MOVDconst [c]) val mem)
  4063  	// cond: is32Bit(c)
  4064  	// result: (FMOVDstore [int32(c)] ptr val mem)
  4065  	for {
  4066  		ptr := v_0
  4067  		if v_1.Op != OpARM64MOVDconst {
  4068  			break
  4069  		}
  4070  		c := auxIntToInt64(v_1.AuxInt)
  4071  		val := v_2
  4072  		mem := v_3
  4073  		if !(is32Bit(c)) {
  4074  			break
  4075  		}
  4076  		v.reset(OpARM64FMOVDstore)
  4077  		v.AuxInt = int32ToAuxInt(int32(c))
  4078  		v.AddArg3(ptr, val, mem)
  4079  		return true
  4080  	}
  4081  	// match: (FMOVDstoreidx (MOVDconst [c]) idx val mem)
  4082  	// cond: is32Bit(c)
  4083  	// result: (FMOVDstore [int32(c)] idx val mem)
  4084  	for {
  4085  		if v_0.Op != OpARM64MOVDconst {
  4086  			break
  4087  		}
  4088  		c := auxIntToInt64(v_0.AuxInt)
  4089  		idx := v_1
  4090  		val := v_2
  4091  		mem := v_3
  4092  		if !(is32Bit(c)) {
  4093  			break
  4094  		}
  4095  		v.reset(OpARM64FMOVDstore)
  4096  		v.AuxInt = int32ToAuxInt(int32(c))
  4097  		v.AddArg3(idx, val, mem)
  4098  		return true
  4099  	}
  4100  	return false
  4101  }
  4102  func rewriteValueARM64_OpARM64FMOVSload(v *Value) bool {
  4103  	v_1 := v.Args[1]
  4104  	v_0 := v.Args[0]
  4105  	b := v.Block
  4106  	config := b.Func.Config
  4107  	// match: (FMOVSload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  4108  	// result: (FMOVSgpfp val)
  4109  	for {
  4110  		off := auxIntToInt32(v.AuxInt)
  4111  		sym := auxToSym(v.Aux)
  4112  		ptr := v_0
  4113  		if v_1.Op != OpARM64MOVWstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  4114  			break
  4115  		}
  4116  		val := v_1.Args[1]
  4117  		if ptr != v_1.Args[0] {
  4118  			break
  4119  		}
  4120  		v.reset(OpARM64FMOVSgpfp)
  4121  		v.AddArg(val)
  4122  		return true
  4123  	}
  4124  	// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
  4125  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4126  	// result: (FMOVSload [off1+int32(off2)] {sym} ptr mem)
  4127  	for {
  4128  		off1 := auxIntToInt32(v.AuxInt)
  4129  		sym := auxToSym(v.Aux)
  4130  		if v_0.Op != OpARM64ADDconst {
  4131  			break
  4132  		}
  4133  		off2 := auxIntToInt64(v_0.AuxInt)
  4134  		ptr := v_0.Args[0]
  4135  		mem := v_1
  4136  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4137  			break
  4138  		}
  4139  		v.reset(OpARM64FMOVSload)
  4140  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  4141  		v.Aux = symToAux(sym)
  4142  		v.AddArg2(ptr, mem)
  4143  		return true
  4144  	}
  4145  	// match: (FMOVSload [off] {sym} (ADD ptr idx) mem)
  4146  	// cond: off == 0 && sym == nil
  4147  	// result: (FMOVSloadidx ptr idx mem)
  4148  	for {
  4149  		off := auxIntToInt32(v.AuxInt)
  4150  		sym := auxToSym(v.Aux)
  4151  		if v_0.Op != OpARM64ADD {
  4152  			break
  4153  		}
  4154  		idx := v_0.Args[1]
  4155  		ptr := v_0.Args[0]
  4156  		mem := v_1
  4157  		if !(off == 0 && sym == nil) {
  4158  			break
  4159  		}
  4160  		v.reset(OpARM64FMOVSloadidx)
  4161  		v.AddArg3(ptr, idx, mem)
  4162  		return true
  4163  	}
  4164  	// match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  4165  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4166  	// result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  4167  	for {
  4168  		off1 := auxIntToInt32(v.AuxInt)
  4169  		sym1 := auxToSym(v.Aux)
  4170  		if v_0.Op != OpARM64MOVDaddr {
  4171  			break
  4172  		}
  4173  		off2 := auxIntToInt32(v_0.AuxInt)
  4174  		sym2 := auxToSym(v_0.Aux)
  4175  		ptr := v_0.Args[0]
  4176  		mem := v_1
  4177  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4178  			break
  4179  		}
  4180  		v.reset(OpARM64FMOVSload)
  4181  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4182  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4183  		v.AddArg2(ptr, mem)
  4184  		return true
  4185  	}
  4186  	return false
  4187  }
  4188  func rewriteValueARM64_OpARM64FMOVSloadidx(v *Value) bool {
  4189  	v_2 := v.Args[2]
  4190  	v_1 := v.Args[1]
  4191  	v_0 := v.Args[0]
  4192  	// match: (FMOVSloadidx ptr (MOVDconst [c]) mem)
  4193  	// cond: is32Bit(c)
  4194  	// result: (FMOVSload [int32(c)] ptr mem)
  4195  	for {
  4196  		ptr := v_0
  4197  		if v_1.Op != OpARM64MOVDconst {
  4198  			break
  4199  		}
  4200  		c := auxIntToInt64(v_1.AuxInt)
  4201  		mem := v_2
  4202  		if !(is32Bit(c)) {
  4203  			break
  4204  		}
  4205  		v.reset(OpARM64FMOVSload)
  4206  		v.AuxInt = int32ToAuxInt(int32(c))
  4207  		v.AddArg2(ptr, mem)
  4208  		return true
  4209  	}
  4210  	// match: (FMOVSloadidx (MOVDconst [c]) ptr mem)
  4211  	// cond: is32Bit(c)
  4212  	// result: (FMOVSload [int32(c)] ptr mem)
  4213  	for {
  4214  		if v_0.Op != OpARM64MOVDconst {
  4215  			break
  4216  		}
  4217  		c := auxIntToInt64(v_0.AuxInt)
  4218  		ptr := v_1
  4219  		mem := v_2
  4220  		if !(is32Bit(c)) {
  4221  			break
  4222  		}
  4223  		v.reset(OpARM64FMOVSload)
  4224  		v.AuxInt = int32ToAuxInt(int32(c))
  4225  		v.AddArg2(ptr, mem)
  4226  		return true
  4227  	}
  4228  	return false
  4229  }
  4230  func rewriteValueARM64_OpARM64FMOVSstore(v *Value) bool {
  4231  	v_2 := v.Args[2]
  4232  	v_1 := v.Args[1]
  4233  	v_0 := v.Args[0]
  4234  	b := v.Block
  4235  	config := b.Func.Config
  4236  	// match: (FMOVSstore [off] {sym} ptr (FMOVSgpfp val) mem)
  4237  	// result: (MOVWstore [off] {sym} ptr val mem)
  4238  	for {
  4239  		off := auxIntToInt32(v.AuxInt)
  4240  		sym := auxToSym(v.Aux)
  4241  		ptr := v_0
  4242  		if v_1.Op != OpARM64FMOVSgpfp {
  4243  			break
  4244  		}
  4245  		val := v_1.Args[0]
  4246  		mem := v_2
  4247  		v.reset(OpARM64MOVWstore)
  4248  		v.AuxInt = int32ToAuxInt(off)
  4249  		v.Aux = symToAux(sym)
  4250  		v.AddArg3(ptr, val, mem)
  4251  		return true
  4252  	}
  4253  	// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  4254  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4255  	// result: (FMOVSstore [off1+int32(off2)] {sym} ptr val mem)
  4256  	for {
  4257  		off1 := auxIntToInt32(v.AuxInt)
  4258  		sym := auxToSym(v.Aux)
  4259  		if v_0.Op != OpARM64ADDconst {
  4260  			break
  4261  		}
  4262  		off2 := auxIntToInt64(v_0.AuxInt)
  4263  		ptr := v_0.Args[0]
  4264  		val := v_1
  4265  		mem := v_2
  4266  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4267  			break
  4268  		}
  4269  		v.reset(OpARM64FMOVSstore)
  4270  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  4271  		v.Aux = symToAux(sym)
  4272  		v.AddArg3(ptr, val, mem)
  4273  		return true
  4274  	}
  4275  	// match: (FMOVSstore [off] {sym} (ADD ptr idx) val mem)
  4276  	// cond: off == 0 && sym == nil
  4277  	// result: (FMOVSstoreidx ptr idx val mem)
  4278  	for {
  4279  		off := auxIntToInt32(v.AuxInt)
  4280  		sym := auxToSym(v.Aux)
  4281  		if v_0.Op != OpARM64ADD {
  4282  			break
  4283  		}
  4284  		idx := v_0.Args[1]
  4285  		ptr := v_0.Args[0]
  4286  		val := v_1
  4287  		mem := v_2
  4288  		if !(off == 0 && sym == nil) {
  4289  			break
  4290  		}
  4291  		v.reset(OpARM64FMOVSstoreidx)
  4292  		v.AddArg4(ptr, idx, val, mem)
  4293  		return true
  4294  	}
  4295  	// match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  4296  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4297  	// result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  4298  	for {
  4299  		off1 := auxIntToInt32(v.AuxInt)
  4300  		sym1 := auxToSym(v.Aux)
  4301  		if v_0.Op != OpARM64MOVDaddr {
  4302  			break
  4303  		}
  4304  		off2 := auxIntToInt32(v_0.AuxInt)
  4305  		sym2 := auxToSym(v_0.Aux)
  4306  		ptr := v_0.Args[0]
  4307  		val := v_1
  4308  		mem := v_2
  4309  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4310  			break
  4311  		}
  4312  		v.reset(OpARM64FMOVSstore)
  4313  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4314  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4315  		v.AddArg3(ptr, val, mem)
  4316  		return true
  4317  	}
  4318  	return false
  4319  }
  4320  func rewriteValueARM64_OpARM64FMOVSstoreidx(v *Value) bool {
  4321  	v_3 := v.Args[3]
  4322  	v_2 := v.Args[2]
  4323  	v_1 := v.Args[1]
  4324  	v_0 := v.Args[0]
  4325  	// match: (FMOVSstoreidx ptr (MOVDconst [c]) val mem)
  4326  	// cond: is32Bit(c)
  4327  	// result: (FMOVSstore [int32(c)] ptr val mem)
  4328  	for {
  4329  		ptr := v_0
  4330  		if v_1.Op != OpARM64MOVDconst {
  4331  			break
  4332  		}
  4333  		c := auxIntToInt64(v_1.AuxInt)
  4334  		val := v_2
  4335  		mem := v_3
  4336  		if !(is32Bit(c)) {
  4337  			break
  4338  		}
  4339  		v.reset(OpARM64FMOVSstore)
  4340  		v.AuxInt = int32ToAuxInt(int32(c))
  4341  		v.AddArg3(ptr, val, mem)
  4342  		return true
  4343  	}
  4344  	// match: (FMOVSstoreidx (MOVDconst [c]) idx val mem)
  4345  	// cond: is32Bit(c)
  4346  	// result: (FMOVSstore [int32(c)] idx val mem)
  4347  	for {
  4348  		if v_0.Op != OpARM64MOVDconst {
  4349  			break
  4350  		}
  4351  		c := auxIntToInt64(v_0.AuxInt)
  4352  		idx := v_1
  4353  		val := v_2
  4354  		mem := v_3
  4355  		if !(is32Bit(c)) {
  4356  			break
  4357  		}
  4358  		v.reset(OpARM64FMOVSstore)
  4359  		v.AuxInt = int32ToAuxInt(int32(c))
  4360  		v.AddArg3(idx, val, mem)
  4361  		return true
  4362  	}
  4363  	return false
  4364  }
  4365  func rewriteValueARM64_OpARM64FMULD(v *Value) bool {
  4366  	v_1 := v.Args[1]
  4367  	v_0 := v.Args[0]
  4368  	// match: (FMULD (FNEGD x) y)
  4369  	// result: (FNMULD x y)
  4370  	for {
  4371  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4372  			if v_0.Op != OpARM64FNEGD {
  4373  				continue
  4374  			}
  4375  			x := v_0.Args[0]
  4376  			y := v_1
  4377  			v.reset(OpARM64FNMULD)
  4378  			v.AddArg2(x, y)
  4379  			return true
  4380  		}
  4381  		break
  4382  	}
  4383  	return false
  4384  }
  4385  func rewriteValueARM64_OpARM64FMULS(v *Value) bool {
  4386  	v_1 := v.Args[1]
  4387  	v_0 := v.Args[0]
  4388  	// match: (FMULS (FNEGS x) y)
  4389  	// result: (FNMULS x y)
  4390  	for {
  4391  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4392  			if v_0.Op != OpARM64FNEGS {
  4393  				continue
  4394  			}
  4395  			x := v_0.Args[0]
  4396  			y := v_1
  4397  			v.reset(OpARM64FNMULS)
  4398  			v.AddArg2(x, y)
  4399  			return true
  4400  		}
  4401  		break
  4402  	}
  4403  	return false
  4404  }
  4405  func rewriteValueARM64_OpARM64FNEGD(v *Value) bool {
  4406  	v_0 := v.Args[0]
  4407  	// match: (FNEGD (FMULD x y))
  4408  	// result: (FNMULD x y)
  4409  	for {
  4410  		if v_0.Op != OpARM64FMULD {
  4411  			break
  4412  		}
  4413  		y := v_0.Args[1]
  4414  		x := v_0.Args[0]
  4415  		v.reset(OpARM64FNMULD)
  4416  		v.AddArg2(x, y)
  4417  		return true
  4418  	}
  4419  	// match: (FNEGD (FNMULD x y))
  4420  	// result: (FMULD x y)
  4421  	for {
  4422  		if v_0.Op != OpARM64FNMULD {
  4423  			break
  4424  		}
  4425  		y := v_0.Args[1]
  4426  		x := v_0.Args[0]
  4427  		v.reset(OpARM64FMULD)
  4428  		v.AddArg2(x, y)
  4429  		return true
  4430  	}
  4431  	return false
  4432  }
  4433  func rewriteValueARM64_OpARM64FNEGS(v *Value) bool {
  4434  	v_0 := v.Args[0]
  4435  	// match: (FNEGS (FMULS x y))
  4436  	// result: (FNMULS x y)
  4437  	for {
  4438  		if v_0.Op != OpARM64FMULS {
  4439  			break
  4440  		}
  4441  		y := v_0.Args[1]
  4442  		x := v_0.Args[0]
  4443  		v.reset(OpARM64FNMULS)
  4444  		v.AddArg2(x, y)
  4445  		return true
  4446  	}
  4447  	// match: (FNEGS (FNMULS x y))
  4448  	// result: (FMULS x y)
  4449  	for {
  4450  		if v_0.Op != OpARM64FNMULS {
  4451  			break
  4452  		}
  4453  		y := v_0.Args[1]
  4454  		x := v_0.Args[0]
  4455  		v.reset(OpARM64FMULS)
  4456  		v.AddArg2(x, y)
  4457  		return true
  4458  	}
  4459  	return false
  4460  }
  4461  func rewriteValueARM64_OpARM64FNMULD(v *Value) bool {
  4462  	v_1 := v.Args[1]
  4463  	v_0 := v.Args[0]
  4464  	// match: (FNMULD (FNEGD x) y)
  4465  	// result: (FMULD x y)
  4466  	for {
  4467  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4468  			if v_0.Op != OpARM64FNEGD {
  4469  				continue
  4470  			}
  4471  			x := v_0.Args[0]
  4472  			y := v_1
  4473  			v.reset(OpARM64FMULD)
  4474  			v.AddArg2(x, y)
  4475  			return true
  4476  		}
  4477  		break
  4478  	}
  4479  	return false
  4480  }
  4481  func rewriteValueARM64_OpARM64FNMULS(v *Value) bool {
  4482  	v_1 := v.Args[1]
  4483  	v_0 := v.Args[0]
  4484  	// match: (FNMULS (FNEGS x) y)
  4485  	// result: (FMULS x y)
  4486  	for {
  4487  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4488  			if v_0.Op != OpARM64FNEGS {
  4489  				continue
  4490  			}
  4491  			x := v_0.Args[0]
  4492  			y := v_1
  4493  			v.reset(OpARM64FMULS)
  4494  			v.AddArg2(x, y)
  4495  			return true
  4496  		}
  4497  		break
  4498  	}
  4499  	return false
  4500  }
  4501  func rewriteValueARM64_OpARM64FSUBD(v *Value) bool {
  4502  	v_1 := v.Args[1]
  4503  	v_0 := v.Args[0]
  4504  	// match: (FSUBD a (FMULD x y))
  4505  	// result: (FMSUBD a x y)
  4506  	for {
  4507  		a := v_0
  4508  		if v_1.Op != OpARM64FMULD {
  4509  			break
  4510  		}
  4511  		y := v_1.Args[1]
  4512  		x := v_1.Args[0]
  4513  		v.reset(OpARM64FMSUBD)
  4514  		v.AddArg3(a, x, y)
  4515  		return true
  4516  	}
  4517  	// match: (FSUBD (FMULD x y) a)
  4518  	// result: (FNMSUBD a x y)
  4519  	for {
  4520  		if v_0.Op != OpARM64FMULD {
  4521  			break
  4522  		}
  4523  		y := v_0.Args[1]
  4524  		x := v_0.Args[0]
  4525  		a := v_1
  4526  		v.reset(OpARM64FNMSUBD)
  4527  		v.AddArg3(a, x, y)
  4528  		return true
  4529  	}
  4530  	// match: (FSUBD a (FNMULD x y))
  4531  	// result: (FMADDD a x y)
  4532  	for {
  4533  		a := v_0
  4534  		if v_1.Op != OpARM64FNMULD {
  4535  			break
  4536  		}
  4537  		y := v_1.Args[1]
  4538  		x := v_1.Args[0]
  4539  		v.reset(OpARM64FMADDD)
  4540  		v.AddArg3(a, x, y)
  4541  		return true
  4542  	}
  4543  	// match: (FSUBD (FNMULD x y) a)
  4544  	// result: (FNMADDD a x y)
  4545  	for {
  4546  		if v_0.Op != OpARM64FNMULD {
  4547  			break
  4548  		}
  4549  		y := v_0.Args[1]
  4550  		x := v_0.Args[0]
  4551  		a := v_1
  4552  		v.reset(OpARM64FNMADDD)
  4553  		v.AddArg3(a, x, y)
  4554  		return true
  4555  	}
  4556  	return false
  4557  }
  4558  func rewriteValueARM64_OpARM64FSUBS(v *Value) bool {
  4559  	v_1 := v.Args[1]
  4560  	v_0 := v.Args[0]
  4561  	// match: (FSUBS a (FMULS x y))
  4562  	// result: (FMSUBS a x y)
  4563  	for {
  4564  		a := v_0
  4565  		if v_1.Op != OpARM64FMULS {
  4566  			break
  4567  		}
  4568  		y := v_1.Args[1]
  4569  		x := v_1.Args[0]
  4570  		v.reset(OpARM64FMSUBS)
  4571  		v.AddArg3(a, x, y)
  4572  		return true
  4573  	}
  4574  	// match: (FSUBS (FMULS x y) a)
  4575  	// result: (FNMSUBS a x y)
  4576  	for {
  4577  		if v_0.Op != OpARM64FMULS {
  4578  			break
  4579  		}
  4580  		y := v_0.Args[1]
  4581  		x := v_0.Args[0]
  4582  		a := v_1
  4583  		v.reset(OpARM64FNMSUBS)
  4584  		v.AddArg3(a, x, y)
  4585  		return true
  4586  	}
  4587  	// match: (FSUBS a (FNMULS x y))
  4588  	// result: (FMADDS a x y)
  4589  	for {
  4590  		a := v_0
  4591  		if v_1.Op != OpARM64FNMULS {
  4592  			break
  4593  		}
  4594  		y := v_1.Args[1]
  4595  		x := v_1.Args[0]
  4596  		v.reset(OpARM64FMADDS)
  4597  		v.AddArg3(a, x, y)
  4598  		return true
  4599  	}
  4600  	// match: (FSUBS (FNMULS x y) a)
  4601  	// result: (FNMADDS a x y)
  4602  	for {
  4603  		if v_0.Op != OpARM64FNMULS {
  4604  			break
  4605  		}
  4606  		y := v_0.Args[1]
  4607  		x := v_0.Args[0]
  4608  		a := v_1
  4609  		v.reset(OpARM64FNMADDS)
  4610  		v.AddArg3(a, x, y)
  4611  		return true
  4612  	}
  4613  	return false
  4614  }
  4615  func rewriteValueARM64_OpARM64GreaterEqual(v *Value) bool {
  4616  	v_0 := v.Args[0]
  4617  	// match: (GreaterEqual (FlagConstant [fc]))
  4618  	// result: (MOVDconst [b2i(fc.ge())])
  4619  	for {
  4620  		if v_0.Op != OpARM64FlagConstant {
  4621  			break
  4622  		}
  4623  		fc := auxIntToFlagConstant(v_0.AuxInt)
  4624  		v.reset(OpARM64MOVDconst)
  4625  		v.AuxInt = int64ToAuxInt(b2i(fc.ge()))
  4626  		return true
  4627  	}
  4628  	// match: (GreaterEqual (InvertFlags x))
  4629  	// result: (LessEqual x)
  4630  	for {
  4631  		if v_0.Op != OpARM64InvertFlags {
  4632  			break
  4633  		}
  4634  		x := v_0.Args[0]
  4635  		v.reset(OpARM64LessEqual)
  4636  		v.AddArg(x)
  4637  		return true
  4638  	}
  4639  	return false
  4640  }
  4641  func rewriteValueARM64_OpARM64GreaterEqualF(v *Value) bool {
  4642  	v_0 := v.Args[0]
  4643  	// match: (GreaterEqualF (InvertFlags x))
  4644  	// result: (LessEqualF x)
  4645  	for {
  4646  		if v_0.Op != OpARM64InvertFlags {
  4647  			break
  4648  		}
  4649  		x := v_0.Args[0]
  4650  		v.reset(OpARM64LessEqualF)
  4651  		v.AddArg(x)
  4652  		return true
  4653  	}
  4654  	return false
  4655  }
  4656  func rewriteValueARM64_OpARM64GreaterEqualU(v *Value) bool {
  4657  	v_0 := v.Args[0]
  4658  	// match: (GreaterEqualU (FlagConstant [fc]))
  4659  	// result: (MOVDconst [b2i(fc.uge())])
  4660  	for {
  4661  		if v_0.Op != OpARM64FlagConstant {
  4662  			break
  4663  		}
  4664  		fc := auxIntToFlagConstant(v_0.AuxInt)
  4665  		v.reset(OpARM64MOVDconst)
  4666  		v.AuxInt = int64ToAuxInt(b2i(fc.uge()))
  4667  		return true
  4668  	}
  4669  	// match: (GreaterEqualU (InvertFlags x))
  4670  	// result: (LessEqualU x)
  4671  	for {
  4672  		if v_0.Op != OpARM64InvertFlags {
  4673  			break
  4674  		}
  4675  		x := v_0.Args[0]
  4676  		v.reset(OpARM64LessEqualU)
  4677  		v.AddArg(x)
  4678  		return true
  4679  	}
  4680  	return false
  4681  }
  4682  func rewriteValueARM64_OpARM64GreaterThan(v *Value) bool {
  4683  	v_0 := v.Args[0]
  4684  	// match: (GreaterThan (FlagConstant [fc]))
  4685  	// result: (MOVDconst [b2i(fc.gt())])
  4686  	for {
  4687  		if v_0.Op != OpARM64FlagConstant {
  4688  			break
  4689  		}
  4690  		fc := auxIntToFlagConstant(v_0.AuxInt)
  4691  		v.reset(OpARM64MOVDconst)
  4692  		v.AuxInt = int64ToAuxInt(b2i(fc.gt()))
  4693  		return true
  4694  	}
  4695  	// match: (GreaterThan (InvertFlags x))
  4696  	// result: (LessThan x)
  4697  	for {
  4698  		if v_0.Op != OpARM64InvertFlags {
  4699  			break
  4700  		}
  4701  		x := v_0.Args[0]
  4702  		v.reset(OpARM64LessThan)
  4703  		v.AddArg(x)
  4704  		return true
  4705  	}
  4706  	return false
  4707  }
  4708  func rewriteValueARM64_OpARM64GreaterThanF(v *Value) bool {
  4709  	v_0 := v.Args[0]
  4710  	// match: (GreaterThanF (InvertFlags x))
  4711  	// result: (LessThanF x)
  4712  	for {
  4713  		if v_0.Op != OpARM64InvertFlags {
  4714  			break
  4715  		}
  4716  		x := v_0.Args[0]
  4717  		v.reset(OpARM64LessThanF)
  4718  		v.AddArg(x)
  4719  		return true
  4720  	}
  4721  	return false
  4722  }
  4723  func rewriteValueARM64_OpARM64GreaterThanU(v *Value) bool {
  4724  	v_0 := v.Args[0]
  4725  	// match: (GreaterThanU (FlagConstant [fc]))
  4726  	// result: (MOVDconst [b2i(fc.ugt())])
  4727  	for {
  4728  		if v_0.Op != OpARM64FlagConstant {
  4729  			break
  4730  		}
  4731  		fc := auxIntToFlagConstant(v_0.AuxInt)
  4732  		v.reset(OpARM64MOVDconst)
  4733  		v.AuxInt = int64ToAuxInt(b2i(fc.ugt()))
  4734  		return true
  4735  	}
  4736  	// match: (GreaterThanU (InvertFlags x))
  4737  	// result: (LessThanU x)
  4738  	for {
  4739  		if v_0.Op != OpARM64InvertFlags {
  4740  			break
  4741  		}
  4742  		x := v_0.Args[0]
  4743  		v.reset(OpARM64LessThanU)
  4744  		v.AddArg(x)
  4745  		return true
  4746  	}
  4747  	return false
  4748  }
  4749  func rewriteValueARM64_OpARM64LessEqual(v *Value) bool {
  4750  	v_0 := v.Args[0]
  4751  	// match: (LessEqual (FlagConstant [fc]))
  4752  	// result: (MOVDconst [b2i(fc.le())])
  4753  	for {
  4754  		if v_0.Op != OpARM64FlagConstant {
  4755  			break
  4756  		}
  4757  		fc := auxIntToFlagConstant(v_0.AuxInt)
  4758  		v.reset(OpARM64MOVDconst)
  4759  		v.AuxInt = int64ToAuxInt(b2i(fc.le()))
  4760  		return true
  4761  	}
  4762  	// match: (LessEqual (InvertFlags x))
  4763  	// result: (GreaterEqual x)
  4764  	for {
  4765  		if v_0.Op != OpARM64InvertFlags {
  4766  			break
  4767  		}
  4768  		x := v_0.Args[0]
  4769  		v.reset(OpARM64GreaterEqual)
  4770  		v.AddArg(x)
  4771  		return true
  4772  	}
  4773  	return false
  4774  }
  4775  func rewriteValueARM64_OpARM64LessEqualF(v *Value) bool {
  4776  	v_0 := v.Args[0]
  4777  	// match: (LessEqualF (InvertFlags x))
  4778  	// result: (GreaterEqualF x)
  4779  	for {
  4780  		if v_0.Op != OpARM64InvertFlags {
  4781  			break
  4782  		}
  4783  		x := v_0.Args[0]
  4784  		v.reset(OpARM64GreaterEqualF)
  4785  		v.AddArg(x)
  4786  		return true
  4787  	}
  4788  	return false
  4789  }
  4790  func rewriteValueARM64_OpARM64LessEqualU(v *Value) bool {
  4791  	v_0 := v.Args[0]
  4792  	// match: (LessEqualU (FlagConstant [fc]))
  4793  	// result: (MOVDconst [b2i(fc.ule())])
  4794  	for {
  4795  		if v_0.Op != OpARM64FlagConstant {
  4796  			break
  4797  		}
  4798  		fc := auxIntToFlagConstant(v_0.AuxInt)
  4799  		v.reset(OpARM64MOVDconst)
  4800  		v.AuxInt = int64ToAuxInt(b2i(fc.ule()))
  4801  		return true
  4802  	}
  4803  	// match: (LessEqualU (InvertFlags x))
  4804  	// result: (GreaterEqualU x)
  4805  	for {
  4806  		if v_0.Op != OpARM64InvertFlags {
  4807  			break
  4808  		}
  4809  		x := v_0.Args[0]
  4810  		v.reset(OpARM64GreaterEqualU)
  4811  		v.AddArg(x)
  4812  		return true
  4813  	}
  4814  	return false
  4815  }
  4816  func rewriteValueARM64_OpARM64LessThan(v *Value) bool {
  4817  	v_0 := v.Args[0]
  4818  	// match: (LessThan (FlagConstant [fc]))
  4819  	// result: (MOVDconst [b2i(fc.lt())])
  4820  	for {
  4821  		if v_0.Op != OpARM64FlagConstant {
  4822  			break
  4823  		}
  4824  		fc := auxIntToFlagConstant(v_0.AuxInt)
  4825  		v.reset(OpARM64MOVDconst)
  4826  		v.AuxInt = int64ToAuxInt(b2i(fc.lt()))
  4827  		return true
  4828  	}
  4829  	// match: (LessThan (InvertFlags x))
  4830  	// result: (GreaterThan x)
  4831  	for {
  4832  		if v_0.Op != OpARM64InvertFlags {
  4833  			break
  4834  		}
  4835  		x := v_0.Args[0]
  4836  		v.reset(OpARM64GreaterThan)
  4837  		v.AddArg(x)
  4838  		return true
  4839  	}
  4840  	return false
  4841  }
  4842  func rewriteValueARM64_OpARM64LessThanF(v *Value) bool {
  4843  	v_0 := v.Args[0]
  4844  	// match: (LessThanF (InvertFlags x))
  4845  	// result: (GreaterThanF x)
  4846  	for {
  4847  		if v_0.Op != OpARM64InvertFlags {
  4848  			break
  4849  		}
  4850  		x := v_0.Args[0]
  4851  		v.reset(OpARM64GreaterThanF)
  4852  		v.AddArg(x)
  4853  		return true
  4854  	}
  4855  	return false
  4856  }
  4857  func rewriteValueARM64_OpARM64LessThanU(v *Value) bool {
  4858  	v_0 := v.Args[0]
  4859  	// match: (LessThanU (FlagConstant [fc]))
  4860  	// result: (MOVDconst [b2i(fc.ult())])
  4861  	for {
  4862  		if v_0.Op != OpARM64FlagConstant {
  4863  			break
  4864  		}
  4865  		fc := auxIntToFlagConstant(v_0.AuxInt)
  4866  		v.reset(OpARM64MOVDconst)
  4867  		v.AuxInt = int64ToAuxInt(b2i(fc.ult()))
  4868  		return true
  4869  	}
  4870  	// match: (LessThanU (InvertFlags x))
  4871  	// result: (GreaterThanU x)
  4872  	for {
  4873  		if v_0.Op != OpARM64InvertFlags {
  4874  			break
  4875  		}
  4876  		x := v_0.Args[0]
  4877  		v.reset(OpARM64GreaterThanU)
  4878  		v.AddArg(x)
  4879  		return true
  4880  	}
  4881  	return false
  4882  }
  4883  func rewriteValueARM64_OpARM64MADD(v *Value) bool {
  4884  	v_2 := v.Args[2]
  4885  	v_1 := v.Args[1]
  4886  	v_0 := v.Args[0]
  4887  	b := v.Block
  4888  	// match: (MADD a x (MOVDconst [-1]))
  4889  	// result: (SUB a x)
  4890  	for {
  4891  		a := v_0
  4892  		x := v_1
  4893  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != -1 {
  4894  			break
  4895  		}
  4896  		v.reset(OpARM64SUB)
  4897  		v.AddArg2(a, x)
  4898  		return true
  4899  	}
  4900  	// match: (MADD a _ (MOVDconst [0]))
  4901  	// result: a
  4902  	for {
  4903  		a := v_0
  4904  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != 0 {
  4905  			break
  4906  		}
  4907  		v.copyOf(a)
  4908  		return true
  4909  	}
  4910  	// match: (MADD a x (MOVDconst [1]))
  4911  	// result: (ADD a x)
  4912  	for {
  4913  		a := v_0
  4914  		x := v_1
  4915  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != 1 {
  4916  			break
  4917  		}
  4918  		v.reset(OpARM64ADD)
  4919  		v.AddArg2(a, x)
  4920  		return true
  4921  	}
  4922  	// match: (MADD a x (MOVDconst [c]))
  4923  	// cond: isPowerOfTwo64(c)
  4924  	// result: (ADDshiftLL a x [log64(c)])
  4925  	for {
  4926  		a := v_0
  4927  		x := v_1
  4928  		if v_2.Op != OpARM64MOVDconst {
  4929  			break
  4930  		}
  4931  		c := auxIntToInt64(v_2.AuxInt)
  4932  		if !(isPowerOfTwo64(c)) {
  4933  			break
  4934  		}
  4935  		v.reset(OpARM64ADDshiftLL)
  4936  		v.AuxInt = int64ToAuxInt(log64(c))
  4937  		v.AddArg2(a, x)
  4938  		return true
  4939  	}
  4940  	// match: (MADD a x (MOVDconst [c]))
  4941  	// cond: isPowerOfTwo64(c-1) && c>=3
  4942  	// result: (ADD a (ADDshiftLL <x.Type> x x [log64(c-1)]))
  4943  	for {
  4944  		a := v_0
  4945  		x := v_1
  4946  		if v_2.Op != OpARM64MOVDconst {
  4947  			break
  4948  		}
  4949  		c := auxIntToInt64(v_2.AuxInt)
  4950  		if !(isPowerOfTwo64(c-1) && c >= 3) {
  4951  			break
  4952  		}
  4953  		v.reset(OpARM64ADD)
  4954  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  4955  		v0.AuxInt = int64ToAuxInt(log64(c - 1))
  4956  		v0.AddArg2(x, x)
  4957  		v.AddArg2(a, v0)
  4958  		return true
  4959  	}
  4960  	// match: (MADD a x (MOVDconst [c]))
  4961  	// cond: isPowerOfTwo64(c+1) && c>=7
  4962  	// result: (SUB a (SUBshiftLL <x.Type> x x [log64(c+1)]))
  4963  	for {
  4964  		a := v_0
  4965  		x := v_1
  4966  		if v_2.Op != OpARM64MOVDconst {
  4967  			break
  4968  		}
  4969  		c := auxIntToInt64(v_2.AuxInt)
  4970  		if !(isPowerOfTwo64(c+1) && c >= 7) {
  4971  			break
  4972  		}
  4973  		v.reset(OpARM64SUB)
  4974  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  4975  		v0.AuxInt = int64ToAuxInt(log64(c + 1))
  4976  		v0.AddArg2(x, x)
  4977  		v.AddArg2(a, v0)
  4978  		return true
  4979  	}
  4980  	// match: (MADD a x (MOVDconst [c]))
  4981  	// cond: c%3 == 0 && isPowerOfTwo64(c/3)
  4982  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log64(c/3)])
  4983  	for {
  4984  		a := v_0
  4985  		x := v_1
  4986  		if v_2.Op != OpARM64MOVDconst {
  4987  			break
  4988  		}
  4989  		c := auxIntToInt64(v_2.AuxInt)
  4990  		if !(c%3 == 0 && isPowerOfTwo64(c/3)) {
  4991  			break
  4992  		}
  4993  		v.reset(OpARM64SUBshiftLL)
  4994  		v.AuxInt = int64ToAuxInt(log64(c / 3))
  4995  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  4996  		v0.AuxInt = int64ToAuxInt(2)
  4997  		v0.AddArg2(x, x)
  4998  		v.AddArg2(a, v0)
  4999  		return true
  5000  	}
  5001  	// match: (MADD a x (MOVDconst [c]))
  5002  	// cond: c%5 == 0 && isPowerOfTwo64(c/5)
  5003  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log64(c/5)])
  5004  	for {
  5005  		a := v_0
  5006  		x := v_1
  5007  		if v_2.Op != OpARM64MOVDconst {
  5008  			break
  5009  		}
  5010  		c := auxIntToInt64(v_2.AuxInt)
  5011  		if !(c%5 == 0 && isPowerOfTwo64(c/5)) {
  5012  			break
  5013  		}
  5014  		v.reset(OpARM64ADDshiftLL)
  5015  		v.AuxInt = int64ToAuxInt(log64(c / 5))
  5016  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5017  		v0.AuxInt = int64ToAuxInt(2)
  5018  		v0.AddArg2(x, x)
  5019  		v.AddArg2(a, v0)
  5020  		return true
  5021  	}
  5022  	// match: (MADD a x (MOVDconst [c]))
  5023  	// cond: c%7 == 0 && isPowerOfTwo64(c/7)
  5024  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log64(c/7)])
  5025  	for {
  5026  		a := v_0
  5027  		x := v_1
  5028  		if v_2.Op != OpARM64MOVDconst {
  5029  			break
  5030  		}
  5031  		c := auxIntToInt64(v_2.AuxInt)
  5032  		if !(c%7 == 0 && isPowerOfTwo64(c/7)) {
  5033  			break
  5034  		}
  5035  		v.reset(OpARM64SUBshiftLL)
  5036  		v.AuxInt = int64ToAuxInt(log64(c / 7))
  5037  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  5038  		v0.AuxInt = int64ToAuxInt(3)
  5039  		v0.AddArg2(x, x)
  5040  		v.AddArg2(a, v0)
  5041  		return true
  5042  	}
  5043  	// match: (MADD a x (MOVDconst [c]))
  5044  	// cond: c%9 == 0 && isPowerOfTwo64(c/9)
  5045  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log64(c/9)])
  5046  	for {
  5047  		a := v_0
  5048  		x := v_1
  5049  		if v_2.Op != OpARM64MOVDconst {
  5050  			break
  5051  		}
  5052  		c := auxIntToInt64(v_2.AuxInt)
  5053  		if !(c%9 == 0 && isPowerOfTwo64(c/9)) {
  5054  			break
  5055  		}
  5056  		v.reset(OpARM64ADDshiftLL)
  5057  		v.AuxInt = int64ToAuxInt(log64(c / 9))
  5058  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5059  		v0.AuxInt = int64ToAuxInt(3)
  5060  		v0.AddArg2(x, x)
  5061  		v.AddArg2(a, v0)
  5062  		return true
  5063  	}
  5064  	// match: (MADD a (MOVDconst [-1]) x)
  5065  	// result: (SUB a x)
  5066  	for {
  5067  		a := v_0
  5068  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != -1 {
  5069  			break
  5070  		}
  5071  		x := v_2
  5072  		v.reset(OpARM64SUB)
  5073  		v.AddArg2(a, x)
  5074  		return true
  5075  	}
  5076  	// match: (MADD a (MOVDconst [0]) _)
  5077  	// result: a
  5078  	for {
  5079  		a := v_0
  5080  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
  5081  			break
  5082  		}
  5083  		v.copyOf(a)
  5084  		return true
  5085  	}
  5086  	// match: (MADD a (MOVDconst [1]) x)
  5087  	// result: (ADD a x)
  5088  	for {
  5089  		a := v_0
  5090  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 1 {
  5091  			break
  5092  		}
  5093  		x := v_2
  5094  		v.reset(OpARM64ADD)
  5095  		v.AddArg2(a, x)
  5096  		return true
  5097  	}
  5098  	// match: (MADD a (MOVDconst [c]) x)
  5099  	// cond: isPowerOfTwo64(c)
  5100  	// result: (ADDshiftLL a x [log64(c)])
  5101  	for {
  5102  		a := v_0
  5103  		if v_1.Op != OpARM64MOVDconst {
  5104  			break
  5105  		}
  5106  		c := auxIntToInt64(v_1.AuxInt)
  5107  		x := v_2
  5108  		if !(isPowerOfTwo64(c)) {
  5109  			break
  5110  		}
  5111  		v.reset(OpARM64ADDshiftLL)
  5112  		v.AuxInt = int64ToAuxInt(log64(c))
  5113  		v.AddArg2(a, x)
  5114  		return true
  5115  	}
  5116  	// match: (MADD a (MOVDconst [c]) x)
  5117  	// cond: isPowerOfTwo64(c-1) && c>=3
  5118  	// result: (ADD a (ADDshiftLL <x.Type> x x [log64(c-1)]))
  5119  	for {
  5120  		a := v_0
  5121  		if v_1.Op != OpARM64MOVDconst {
  5122  			break
  5123  		}
  5124  		c := auxIntToInt64(v_1.AuxInt)
  5125  		x := v_2
  5126  		if !(isPowerOfTwo64(c-1) && c >= 3) {
  5127  			break
  5128  		}
  5129  		v.reset(OpARM64ADD)
  5130  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5131  		v0.AuxInt = int64ToAuxInt(log64(c - 1))
  5132  		v0.AddArg2(x, x)
  5133  		v.AddArg2(a, v0)
  5134  		return true
  5135  	}
  5136  	// match: (MADD a (MOVDconst [c]) x)
  5137  	// cond: isPowerOfTwo64(c+1) && c>=7
  5138  	// result: (SUB a (SUBshiftLL <x.Type> x x [log64(c+1)]))
  5139  	for {
  5140  		a := v_0
  5141  		if v_1.Op != OpARM64MOVDconst {
  5142  			break
  5143  		}
  5144  		c := auxIntToInt64(v_1.AuxInt)
  5145  		x := v_2
  5146  		if !(isPowerOfTwo64(c+1) && c >= 7) {
  5147  			break
  5148  		}
  5149  		v.reset(OpARM64SUB)
  5150  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  5151  		v0.AuxInt = int64ToAuxInt(log64(c + 1))
  5152  		v0.AddArg2(x, x)
  5153  		v.AddArg2(a, v0)
  5154  		return true
  5155  	}
  5156  	// match: (MADD a (MOVDconst [c]) x)
  5157  	// cond: c%3 == 0 && isPowerOfTwo64(c/3)
  5158  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log64(c/3)])
  5159  	for {
  5160  		a := v_0
  5161  		if v_1.Op != OpARM64MOVDconst {
  5162  			break
  5163  		}
  5164  		c := auxIntToInt64(v_1.AuxInt)
  5165  		x := v_2
  5166  		if !(c%3 == 0 && isPowerOfTwo64(c/3)) {
  5167  			break
  5168  		}
  5169  		v.reset(OpARM64SUBshiftLL)
  5170  		v.AuxInt = int64ToAuxInt(log64(c / 3))
  5171  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  5172  		v0.AuxInt = int64ToAuxInt(2)
  5173  		v0.AddArg2(x, x)
  5174  		v.AddArg2(a, v0)
  5175  		return true
  5176  	}
  5177  	// match: (MADD a (MOVDconst [c]) x)
  5178  	// cond: c%5 == 0 && isPowerOfTwo64(c/5)
  5179  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log64(c/5)])
  5180  	for {
  5181  		a := v_0
  5182  		if v_1.Op != OpARM64MOVDconst {
  5183  			break
  5184  		}
  5185  		c := auxIntToInt64(v_1.AuxInt)
  5186  		x := v_2
  5187  		if !(c%5 == 0 && isPowerOfTwo64(c/5)) {
  5188  			break
  5189  		}
  5190  		v.reset(OpARM64ADDshiftLL)
  5191  		v.AuxInt = int64ToAuxInt(log64(c / 5))
  5192  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5193  		v0.AuxInt = int64ToAuxInt(2)
  5194  		v0.AddArg2(x, x)
  5195  		v.AddArg2(a, v0)
  5196  		return true
  5197  	}
  5198  	// match: (MADD a (MOVDconst [c]) x)
  5199  	// cond: c%7 == 0 && isPowerOfTwo64(c/7)
  5200  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log64(c/7)])
  5201  	for {
  5202  		a := v_0
  5203  		if v_1.Op != OpARM64MOVDconst {
  5204  			break
  5205  		}
  5206  		c := auxIntToInt64(v_1.AuxInt)
  5207  		x := v_2
  5208  		if !(c%7 == 0 && isPowerOfTwo64(c/7)) {
  5209  			break
  5210  		}
  5211  		v.reset(OpARM64SUBshiftLL)
  5212  		v.AuxInt = int64ToAuxInt(log64(c / 7))
  5213  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  5214  		v0.AuxInt = int64ToAuxInt(3)
  5215  		v0.AddArg2(x, x)
  5216  		v.AddArg2(a, v0)
  5217  		return true
  5218  	}
  5219  	// match: (MADD a (MOVDconst [c]) x)
  5220  	// cond: c%9 == 0 && isPowerOfTwo64(c/9)
  5221  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log64(c/9)])
  5222  	for {
  5223  		a := v_0
  5224  		if v_1.Op != OpARM64MOVDconst {
  5225  			break
  5226  		}
  5227  		c := auxIntToInt64(v_1.AuxInt)
  5228  		x := v_2
  5229  		if !(c%9 == 0 && isPowerOfTwo64(c/9)) {
  5230  			break
  5231  		}
  5232  		v.reset(OpARM64ADDshiftLL)
  5233  		v.AuxInt = int64ToAuxInt(log64(c / 9))
  5234  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5235  		v0.AuxInt = int64ToAuxInt(3)
  5236  		v0.AddArg2(x, x)
  5237  		v.AddArg2(a, v0)
  5238  		return true
  5239  	}
  5240  	// match: (MADD (MOVDconst [c]) x y)
  5241  	// result: (ADDconst [c] (MUL <x.Type> x y))
  5242  	for {
  5243  		if v_0.Op != OpARM64MOVDconst {
  5244  			break
  5245  		}
  5246  		c := auxIntToInt64(v_0.AuxInt)
  5247  		x := v_1
  5248  		y := v_2
  5249  		v.reset(OpARM64ADDconst)
  5250  		v.AuxInt = int64ToAuxInt(c)
  5251  		v0 := b.NewValue0(v.Pos, OpARM64MUL, x.Type)
  5252  		v0.AddArg2(x, y)
  5253  		v.AddArg(v0)
  5254  		return true
  5255  	}
  5256  	// match: (MADD a (MOVDconst [c]) (MOVDconst [d]))
  5257  	// result: (ADDconst [c*d] a)
  5258  	for {
  5259  		a := v_0
  5260  		if v_1.Op != OpARM64MOVDconst {
  5261  			break
  5262  		}
  5263  		c := auxIntToInt64(v_1.AuxInt)
  5264  		if v_2.Op != OpARM64MOVDconst {
  5265  			break
  5266  		}
  5267  		d := auxIntToInt64(v_2.AuxInt)
  5268  		v.reset(OpARM64ADDconst)
  5269  		v.AuxInt = int64ToAuxInt(c * d)
  5270  		v.AddArg(a)
  5271  		return true
  5272  	}
  5273  	return false
  5274  }
  5275  func rewriteValueARM64_OpARM64MADDW(v *Value) bool {
  5276  	v_2 := v.Args[2]
  5277  	v_1 := v.Args[1]
  5278  	v_0 := v.Args[0]
  5279  	b := v.Block
  5280  	// match: (MADDW a x (MOVDconst [c]))
  5281  	// cond: int32(c)==-1
  5282  	// result: (SUB a x)
  5283  	for {
  5284  		a := v_0
  5285  		x := v_1
  5286  		if v_2.Op != OpARM64MOVDconst {
  5287  			break
  5288  		}
  5289  		c := auxIntToInt64(v_2.AuxInt)
  5290  		if !(int32(c) == -1) {
  5291  			break
  5292  		}
  5293  		v.reset(OpARM64SUB)
  5294  		v.AddArg2(a, x)
  5295  		return true
  5296  	}
  5297  	// match: (MADDW a _ (MOVDconst [c]))
  5298  	// cond: int32(c)==0
  5299  	// result: a
  5300  	for {
  5301  		a := v_0
  5302  		if v_2.Op != OpARM64MOVDconst {
  5303  			break
  5304  		}
  5305  		c := auxIntToInt64(v_2.AuxInt)
  5306  		if !(int32(c) == 0) {
  5307  			break
  5308  		}
  5309  		v.copyOf(a)
  5310  		return true
  5311  	}
  5312  	// match: (MADDW a x (MOVDconst [c]))
  5313  	// cond: int32(c)==1
  5314  	// result: (ADD a x)
  5315  	for {
  5316  		a := v_0
  5317  		x := v_1
  5318  		if v_2.Op != OpARM64MOVDconst {
  5319  			break
  5320  		}
  5321  		c := auxIntToInt64(v_2.AuxInt)
  5322  		if !(int32(c) == 1) {
  5323  			break
  5324  		}
  5325  		v.reset(OpARM64ADD)
  5326  		v.AddArg2(a, x)
  5327  		return true
  5328  	}
  5329  	// match: (MADDW a x (MOVDconst [c]))
  5330  	// cond: isPowerOfTwo64(c)
  5331  	// result: (ADDshiftLL a x [log64(c)])
  5332  	for {
  5333  		a := v_0
  5334  		x := v_1
  5335  		if v_2.Op != OpARM64MOVDconst {
  5336  			break
  5337  		}
  5338  		c := auxIntToInt64(v_2.AuxInt)
  5339  		if !(isPowerOfTwo64(c)) {
  5340  			break
  5341  		}
  5342  		v.reset(OpARM64ADDshiftLL)
  5343  		v.AuxInt = int64ToAuxInt(log64(c))
  5344  		v.AddArg2(a, x)
  5345  		return true
  5346  	}
  5347  	// match: (MADDW a x (MOVDconst [c]))
  5348  	// cond: isPowerOfTwo64(c-1) && int32(c)>=3
  5349  	// result: (ADD a (ADDshiftLL <x.Type> x x [log64(c-1)]))
  5350  	for {
  5351  		a := v_0
  5352  		x := v_1
  5353  		if v_2.Op != OpARM64MOVDconst {
  5354  			break
  5355  		}
  5356  		c := auxIntToInt64(v_2.AuxInt)
  5357  		if !(isPowerOfTwo64(c-1) && int32(c) >= 3) {
  5358  			break
  5359  		}
  5360  		v.reset(OpARM64ADD)
  5361  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5362  		v0.AuxInt = int64ToAuxInt(log64(c - 1))
  5363  		v0.AddArg2(x, x)
  5364  		v.AddArg2(a, v0)
  5365  		return true
  5366  	}
  5367  	// match: (MADDW a x (MOVDconst [c]))
  5368  	// cond: isPowerOfTwo64(c+1) && int32(c)>=7
  5369  	// result: (SUB a (SUBshiftLL <x.Type> x x [log64(c+1)]))
  5370  	for {
  5371  		a := v_0
  5372  		x := v_1
  5373  		if v_2.Op != OpARM64MOVDconst {
  5374  			break
  5375  		}
  5376  		c := auxIntToInt64(v_2.AuxInt)
  5377  		if !(isPowerOfTwo64(c+1) && int32(c) >= 7) {
  5378  			break
  5379  		}
  5380  		v.reset(OpARM64SUB)
  5381  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  5382  		v0.AuxInt = int64ToAuxInt(log64(c + 1))
  5383  		v0.AddArg2(x, x)
  5384  		v.AddArg2(a, v0)
  5385  		return true
  5386  	}
  5387  	// match: (MADDW a x (MOVDconst [c]))
  5388  	// cond: c%3 == 0 && isPowerOfTwo64(c/3) && is32Bit(c)
  5389  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log64(c/3)])
  5390  	for {
  5391  		a := v_0
  5392  		x := v_1
  5393  		if v_2.Op != OpARM64MOVDconst {
  5394  			break
  5395  		}
  5396  		c := auxIntToInt64(v_2.AuxInt)
  5397  		if !(c%3 == 0 && isPowerOfTwo64(c/3) && is32Bit(c)) {
  5398  			break
  5399  		}
  5400  		v.reset(OpARM64SUBshiftLL)
  5401  		v.AuxInt = int64ToAuxInt(log64(c / 3))
  5402  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  5403  		v0.AuxInt = int64ToAuxInt(2)
  5404  		v0.AddArg2(x, x)
  5405  		v.AddArg2(a, v0)
  5406  		return true
  5407  	}
  5408  	// match: (MADDW a x (MOVDconst [c]))
  5409  	// cond: c%5 == 0 && isPowerOfTwo64(c/5) && is32Bit(c)
  5410  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log64(c/5)])
  5411  	for {
  5412  		a := v_0
  5413  		x := v_1
  5414  		if v_2.Op != OpARM64MOVDconst {
  5415  			break
  5416  		}
  5417  		c := auxIntToInt64(v_2.AuxInt)
  5418  		if !(c%5 == 0 && isPowerOfTwo64(c/5) && is32Bit(c)) {
  5419  			break
  5420  		}
  5421  		v.reset(OpARM64ADDshiftLL)
  5422  		v.AuxInt = int64ToAuxInt(log64(c / 5))
  5423  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5424  		v0.AuxInt = int64ToAuxInt(2)
  5425  		v0.AddArg2(x, x)
  5426  		v.AddArg2(a, v0)
  5427  		return true
  5428  	}
  5429  	// match: (MADDW a x (MOVDconst [c]))
  5430  	// cond: c%7 == 0 && isPowerOfTwo64(c/7) && is32Bit(c)
  5431  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log64(c/7)])
  5432  	for {
  5433  		a := v_0
  5434  		x := v_1
  5435  		if v_2.Op != OpARM64MOVDconst {
  5436  			break
  5437  		}
  5438  		c := auxIntToInt64(v_2.AuxInt)
  5439  		if !(c%7 == 0 && isPowerOfTwo64(c/7) && is32Bit(c)) {
  5440  			break
  5441  		}
  5442  		v.reset(OpARM64SUBshiftLL)
  5443  		v.AuxInt = int64ToAuxInt(log64(c / 7))
  5444  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  5445  		v0.AuxInt = int64ToAuxInt(3)
  5446  		v0.AddArg2(x, x)
  5447  		v.AddArg2(a, v0)
  5448  		return true
  5449  	}
  5450  	// match: (MADDW a x (MOVDconst [c]))
  5451  	// cond: c%9 == 0 && isPowerOfTwo64(c/9) && is32Bit(c)
  5452  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log64(c/9)])
  5453  	for {
  5454  		a := v_0
  5455  		x := v_1
  5456  		if v_2.Op != OpARM64MOVDconst {
  5457  			break
  5458  		}
  5459  		c := auxIntToInt64(v_2.AuxInt)
  5460  		if !(c%9 == 0 && isPowerOfTwo64(c/9) && is32Bit(c)) {
  5461  			break
  5462  		}
  5463  		v.reset(OpARM64ADDshiftLL)
  5464  		v.AuxInt = int64ToAuxInt(log64(c / 9))
  5465  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5466  		v0.AuxInt = int64ToAuxInt(3)
  5467  		v0.AddArg2(x, x)
  5468  		v.AddArg2(a, v0)
  5469  		return true
  5470  	}
  5471  	// match: (MADDW a (MOVDconst [c]) x)
  5472  	// cond: int32(c)==-1
  5473  	// result: (SUB a x)
  5474  	for {
  5475  		a := v_0
  5476  		if v_1.Op != OpARM64MOVDconst {
  5477  			break
  5478  		}
  5479  		c := auxIntToInt64(v_1.AuxInt)
  5480  		x := v_2
  5481  		if !(int32(c) == -1) {
  5482  			break
  5483  		}
  5484  		v.reset(OpARM64SUB)
  5485  		v.AddArg2(a, x)
  5486  		return true
  5487  	}
  5488  	// match: (MADDW a (MOVDconst [c]) _)
  5489  	// cond: int32(c)==0
  5490  	// result: a
  5491  	for {
  5492  		a := v_0
  5493  		if v_1.Op != OpARM64MOVDconst {
  5494  			break
  5495  		}
  5496  		c := auxIntToInt64(v_1.AuxInt)
  5497  		if !(int32(c) == 0) {
  5498  			break
  5499  		}
  5500  		v.copyOf(a)
  5501  		return true
  5502  	}
  5503  	// match: (MADDW a (MOVDconst [c]) x)
  5504  	// cond: int32(c)==1
  5505  	// result: (ADD a x)
  5506  	for {
  5507  		a := v_0
  5508  		if v_1.Op != OpARM64MOVDconst {
  5509  			break
  5510  		}
  5511  		c := auxIntToInt64(v_1.AuxInt)
  5512  		x := v_2
  5513  		if !(int32(c) == 1) {
  5514  			break
  5515  		}
  5516  		v.reset(OpARM64ADD)
  5517  		v.AddArg2(a, x)
  5518  		return true
  5519  	}
  5520  	// match: (MADDW a (MOVDconst [c]) x)
  5521  	// cond: isPowerOfTwo64(c)
  5522  	// result: (ADDshiftLL a x [log64(c)])
  5523  	for {
  5524  		a := v_0
  5525  		if v_1.Op != OpARM64MOVDconst {
  5526  			break
  5527  		}
  5528  		c := auxIntToInt64(v_1.AuxInt)
  5529  		x := v_2
  5530  		if !(isPowerOfTwo64(c)) {
  5531  			break
  5532  		}
  5533  		v.reset(OpARM64ADDshiftLL)
  5534  		v.AuxInt = int64ToAuxInt(log64(c))
  5535  		v.AddArg2(a, x)
  5536  		return true
  5537  	}
  5538  	// match: (MADDW a (MOVDconst [c]) x)
  5539  	// cond: isPowerOfTwo64(c-1) && int32(c)>=3
  5540  	// result: (ADD a (ADDshiftLL <x.Type> x x [log64(c-1)]))
  5541  	for {
  5542  		a := v_0
  5543  		if v_1.Op != OpARM64MOVDconst {
  5544  			break
  5545  		}
  5546  		c := auxIntToInt64(v_1.AuxInt)
  5547  		x := v_2
  5548  		if !(isPowerOfTwo64(c-1) && int32(c) >= 3) {
  5549  			break
  5550  		}
  5551  		v.reset(OpARM64ADD)
  5552  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5553  		v0.AuxInt = int64ToAuxInt(log64(c - 1))
  5554  		v0.AddArg2(x, x)
  5555  		v.AddArg2(a, v0)
  5556  		return true
  5557  	}
  5558  	// match: (MADDW a (MOVDconst [c]) x)
  5559  	// cond: isPowerOfTwo64(c+1) && int32(c)>=7
  5560  	// result: (SUB a (SUBshiftLL <x.Type> x x [log64(c+1)]))
  5561  	for {
  5562  		a := v_0
  5563  		if v_1.Op != OpARM64MOVDconst {
  5564  			break
  5565  		}
  5566  		c := auxIntToInt64(v_1.AuxInt)
  5567  		x := v_2
  5568  		if !(isPowerOfTwo64(c+1) && int32(c) >= 7) {
  5569  			break
  5570  		}
  5571  		v.reset(OpARM64SUB)
  5572  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  5573  		v0.AuxInt = int64ToAuxInt(log64(c + 1))
  5574  		v0.AddArg2(x, x)
  5575  		v.AddArg2(a, v0)
  5576  		return true
  5577  	}
  5578  	// match: (MADDW a (MOVDconst [c]) x)
  5579  	// cond: c%3 == 0 && isPowerOfTwo64(c/3) && is32Bit(c)
  5580  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log64(c/3)])
  5581  	for {
  5582  		a := v_0
  5583  		if v_1.Op != OpARM64MOVDconst {
  5584  			break
  5585  		}
  5586  		c := auxIntToInt64(v_1.AuxInt)
  5587  		x := v_2
  5588  		if !(c%3 == 0 && isPowerOfTwo64(c/3) && is32Bit(c)) {
  5589  			break
  5590  		}
  5591  		v.reset(OpARM64SUBshiftLL)
  5592  		v.AuxInt = int64ToAuxInt(log64(c / 3))
  5593  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  5594  		v0.AuxInt = int64ToAuxInt(2)
  5595  		v0.AddArg2(x, x)
  5596  		v.AddArg2(a, v0)
  5597  		return true
  5598  	}
  5599  	// match: (MADDW a (MOVDconst [c]) x)
  5600  	// cond: c%5 == 0 && isPowerOfTwo64(c/5) && is32Bit(c)
  5601  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log64(c/5)])
  5602  	for {
  5603  		a := v_0
  5604  		if v_1.Op != OpARM64MOVDconst {
  5605  			break
  5606  		}
  5607  		c := auxIntToInt64(v_1.AuxInt)
  5608  		x := v_2
  5609  		if !(c%5 == 0 && isPowerOfTwo64(c/5) && is32Bit(c)) {
  5610  			break
  5611  		}
  5612  		v.reset(OpARM64ADDshiftLL)
  5613  		v.AuxInt = int64ToAuxInt(log64(c / 5))
  5614  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5615  		v0.AuxInt = int64ToAuxInt(2)
  5616  		v0.AddArg2(x, x)
  5617  		v.AddArg2(a, v0)
  5618  		return true
  5619  	}
  5620  	// match: (MADDW a (MOVDconst [c]) x)
  5621  	// cond: c%7 == 0 && isPowerOfTwo64(c/7) && is32Bit(c)
  5622  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log64(c/7)])
  5623  	for {
  5624  		a := v_0
  5625  		if v_1.Op != OpARM64MOVDconst {
  5626  			break
  5627  		}
  5628  		c := auxIntToInt64(v_1.AuxInt)
  5629  		x := v_2
  5630  		if !(c%7 == 0 && isPowerOfTwo64(c/7) && is32Bit(c)) {
  5631  			break
  5632  		}
  5633  		v.reset(OpARM64SUBshiftLL)
  5634  		v.AuxInt = int64ToAuxInt(log64(c / 7))
  5635  		v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  5636  		v0.AuxInt = int64ToAuxInt(3)
  5637  		v0.AddArg2(x, x)
  5638  		v.AddArg2(a, v0)
  5639  		return true
  5640  	}
  5641  	// match: (MADDW a (MOVDconst [c]) x)
  5642  	// cond: c%9 == 0 && isPowerOfTwo64(c/9) && is32Bit(c)
  5643  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log64(c/9)])
  5644  	for {
  5645  		a := v_0
  5646  		if v_1.Op != OpARM64MOVDconst {
  5647  			break
  5648  		}
  5649  		c := auxIntToInt64(v_1.AuxInt)
  5650  		x := v_2
  5651  		if !(c%9 == 0 && isPowerOfTwo64(c/9) && is32Bit(c)) {
  5652  			break
  5653  		}
  5654  		v.reset(OpARM64ADDshiftLL)
  5655  		v.AuxInt = int64ToAuxInt(log64(c / 9))
  5656  		v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5657  		v0.AuxInt = int64ToAuxInt(3)
  5658  		v0.AddArg2(x, x)
  5659  		v.AddArg2(a, v0)
  5660  		return true
  5661  	}
  5662  	// match: (MADDW (MOVDconst [c]) x y)
  5663  	// result: (ADDconst [c] (MULW <x.Type> x y))
  5664  	for {
  5665  		if v_0.Op != OpARM64MOVDconst {
  5666  			break
  5667  		}
  5668  		c := auxIntToInt64(v_0.AuxInt)
  5669  		x := v_1
  5670  		y := v_2
  5671  		v.reset(OpARM64ADDconst)
  5672  		v.AuxInt = int64ToAuxInt(c)
  5673  		v0 := b.NewValue0(v.Pos, OpARM64MULW, x.Type)
  5674  		v0.AddArg2(x, y)
  5675  		v.AddArg(v0)
  5676  		return true
  5677  	}
  5678  	// match: (MADDW a (MOVDconst [c]) (MOVDconst [d]))
  5679  	// result: (ADDconst [int64(int32(c)*int32(d))] a)
  5680  	for {
  5681  		a := v_0
  5682  		if v_1.Op != OpARM64MOVDconst {
  5683  			break
  5684  		}
  5685  		c := auxIntToInt64(v_1.AuxInt)
  5686  		if v_2.Op != OpARM64MOVDconst {
  5687  			break
  5688  		}
  5689  		d := auxIntToInt64(v_2.AuxInt)
  5690  		v.reset(OpARM64ADDconst)
  5691  		v.AuxInt = int64ToAuxInt(int64(int32(c) * int32(d)))
  5692  		v.AddArg(a)
  5693  		return true
  5694  	}
  5695  	return false
  5696  }
  5697  func rewriteValueARM64_OpARM64MNEG(v *Value) bool {
  5698  	v_1 := v.Args[1]
  5699  	v_0 := v.Args[0]
  5700  	b := v.Block
  5701  	// match: (MNEG x (MOVDconst [-1]))
  5702  	// result: x
  5703  	for {
  5704  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5705  			x := v_0
  5706  			if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != -1 {
  5707  				continue
  5708  			}
  5709  			v.copyOf(x)
  5710  			return true
  5711  		}
  5712  		break
  5713  	}
  5714  	// match: (MNEG _ (MOVDconst [0]))
  5715  	// result: (MOVDconst [0])
  5716  	for {
  5717  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5718  			if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
  5719  				continue
  5720  			}
  5721  			v.reset(OpARM64MOVDconst)
  5722  			v.AuxInt = int64ToAuxInt(0)
  5723  			return true
  5724  		}
  5725  		break
  5726  	}
  5727  	// match: (MNEG x (MOVDconst [1]))
  5728  	// result: (NEG x)
  5729  	for {
  5730  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5731  			x := v_0
  5732  			if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 1 {
  5733  				continue
  5734  			}
  5735  			v.reset(OpARM64NEG)
  5736  			v.AddArg(x)
  5737  			return true
  5738  		}
  5739  		break
  5740  	}
  5741  	// match: (MNEG x (MOVDconst [c]))
  5742  	// cond: isPowerOfTwo64(c)
  5743  	// result: (NEG (SLLconst <x.Type> [log64(c)] x))
  5744  	for {
  5745  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5746  			x := v_0
  5747  			if v_1.Op != OpARM64MOVDconst {
  5748  				continue
  5749  			}
  5750  			c := auxIntToInt64(v_1.AuxInt)
  5751  			if !(isPowerOfTwo64(c)) {
  5752  				continue
  5753  			}
  5754  			v.reset(OpARM64NEG)
  5755  			v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  5756  			v0.AuxInt = int64ToAuxInt(log64(c))
  5757  			v0.AddArg(x)
  5758  			v.AddArg(v0)
  5759  			return true
  5760  		}
  5761  		break
  5762  	}
  5763  	// match: (MNEG x (MOVDconst [c]))
  5764  	// cond: isPowerOfTwo64(c-1) && c >= 3
  5765  	// result: (NEG (ADDshiftLL <x.Type> x x [log64(c-1)]))
  5766  	for {
  5767  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5768  			x := v_0
  5769  			if v_1.Op != OpARM64MOVDconst {
  5770  				continue
  5771  			}
  5772  			c := auxIntToInt64(v_1.AuxInt)
  5773  			if !(isPowerOfTwo64(c-1) && c >= 3) {
  5774  				continue
  5775  			}
  5776  			v.reset(OpARM64NEG)
  5777  			v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5778  			v0.AuxInt = int64ToAuxInt(log64(c - 1))
  5779  			v0.AddArg2(x, x)
  5780  			v.AddArg(v0)
  5781  			return true
  5782  		}
  5783  		break
  5784  	}
  5785  	// match: (MNEG x (MOVDconst [c]))
  5786  	// cond: isPowerOfTwo64(c+1) && c >= 7
  5787  	// result: (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log64(c+1)]))
  5788  	for {
  5789  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5790  			x := v_0
  5791  			if v_1.Op != OpARM64MOVDconst {
  5792  				continue
  5793  			}
  5794  			c := auxIntToInt64(v_1.AuxInt)
  5795  			if !(isPowerOfTwo64(c+1) && c >= 7) {
  5796  				continue
  5797  			}
  5798  			v.reset(OpARM64NEG)
  5799  			v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5800  			v0.AuxInt = int64ToAuxInt(log64(c + 1))
  5801  			v1 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
  5802  			v1.AddArg(x)
  5803  			v0.AddArg2(v1, x)
  5804  			v.AddArg(v0)
  5805  			return true
  5806  		}
  5807  		break
  5808  	}
  5809  	// match: (MNEG x (MOVDconst [c]))
  5810  	// cond: c%3 == 0 && isPowerOfTwo64(c/3)
  5811  	// result: (SLLconst <x.Type> [log64(c/3)] (SUBshiftLL <x.Type> x x [2]))
  5812  	for {
  5813  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5814  			x := v_0
  5815  			if v_1.Op != OpARM64MOVDconst {
  5816  				continue
  5817  			}
  5818  			c := auxIntToInt64(v_1.AuxInt)
  5819  			if !(c%3 == 0 && isPowerOfTwo64(c/3)) {
  5820  				continue
  5821  			}
  5822  			v.reset(OpARM64SLLconst)
  5823  			v.Type = x.Type
  5824  			v.AuxInt = int64ToAuxInt(log64(c / 3))
  5825  			v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  5826  			v0.AuxInt = int64ToAuxInt(2)
  5827  			v0.AddArg2(x, x)
  5828  			v.AddArg(v0)
  5829  			return true
  5830  		}
  5831  		break
  5832  	}
  5833  	// match: (MNEG x (MOVDconst [c]))
  5834  	// cond: c%5 == 0 && isPowerOfTwo64(c/5)
  5835  	// result: (NEG (SLLconst <x.Type> [log64(c/5)] (ADDshiftLL <x.Type> x x [2])))
  5836  	for {
  5837  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5838  			x := v_0
  5839  			if v_1.Op != OpARM64MOVDconst {
  5840  				continue
  5841  			}
  5842  			c := auxIntToInt64(v_1.AuxInt)
  5843  			if !(c%5 == 0 && isPowerOfTwo64(c/5)) {
  5844  				continue
  5845  			}
  5846  			v.reset(OpARM64NEG)
  5847  			v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  5848  			v0.AuxInt = int64ToAuxInt(log64(c / 5))
  5849  			v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5850  			v1.AuxInt = int64ToAuxInt(2)
  5851  			v1.AddArg2(x, x)
  5852  			v0.AddArg(v1)
  5853  			v.AddArg(v0)
  5854  			return true
  5855  		}
  5856  		break
  5857  	}
  5858  	// match: (MNEG x (MOVDconst [c]))
  5859  	// cond: c%7 == 0 && isPowerOfTwo64(c/7)
  5860  	// result: (SLLconst <x.Type> [log64(c/7)] (SUBshiftLL <x.Type> x x [3]))
  5861  	for {
  5862  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5863  			x := v_0
  5864  			if v_1.Op != OpARM64MOVDconst {
  5865  				continue
  5866  			}
  5867  			c := auxIntToInt64(v_1.AuxInt)
  5868  			if !(c%7 == 0 && isPowerOfTwo64(c/7)) {
  5869  				continue
  5870  			}
  5871  			v.reset(OpARM64SLLconst)
  5872  			v.Type = x.Type
  5873  			v.AuxInt = int64ToAuxInt(log64(c / 7))
  5874  			v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  5875  			v0.AuxInt = int64ToAuxInt(3)
  5876  			v0.AddArg2(x, x)
  5877  			v.AddArg(v0)
  5878  			return true
  5879  		}
  5880  		break
  5881  	}
  5882  	// match: (MNEG x (MOVDconst [c]))
  5883  	// cond: c%9 == 0 && isPowerOfTwo64(c/9)
  5884  	// result: (NEG (SLLconst <x.Type> [log64(c/9)] (ADDshiftLL <x.Type> x x [3])))
  5885  	for {
  5886  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5887  			x := v_0
  5888  			if v_1.Op != OpARM64MOVDconst {
  5889  				continue
  5890  			}
  5891  			c := auxIntToInt64(v_1.AuxInt)
  5892  			if !(c%9 == 0 && isPowerOfTwo64(c/9)) {
  5893  				continue
  5894  			}
  5895  			v.reset(OpARM64NEG)
  5896  			v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  5897  			v0.AuxInt = int64ToAuxInt(log64(c / 9))
  5898  			v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  5899  			v1.AuxInt = int64ToAuxInt(3)
  5900  			v1.AddArg2(x, x)
  5901  			v0.AddArg(v1)
  5902  			v.AddArg(v0)
  5903  			return true
  5904  		}
  5905  		break
  5906  	}
  5907  	// match: (MNEG (MOVDconst [c]) (MOVDconst [d]))
  5908  	// result: (MOVDconst [-c*d])
  5909  	for {
  5910  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5911  			if v_0.Op != OpARM64MOVDconst {
  5912  				continue
  5913  			}
  5914  			c := auxIntToInt64(v_0.AuxInt)
  5915  			if v_1.Op != OpARM64MOVDconst {
  5916  				continue
  5917  			}
  5918  			d := auxIntToInt64(v_1.AuxInt)
  5919  			v.reset(OpARM64MOVDconst)
  5920  			v.AuxInt = int64ToAuxInt(-c * d)
  5921  			return true
  5922  		}
  5923  		break
  5924  	}
  5925  	return false
  5926  }
  5927  func rewriteValueARM64_OpARM64MNEGW(v *Value) bool {
  5928  	v_1 := v.Args[1]
  5929  	v_0 := v.Args[0]
  5930  	b := v.Block
  5931  	// match: (MNEGW x (MOVDconst [c]))
  5932  	// cond: int32(c)==-1
  5933  	// result: x
  5934  	for {
  5935  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5936  			x := v_0
  5937  			if v_1.Op != OpARM64MOVDconst {
  5938  				continue
  5939  			}
  5940  			c := auxIntToInt64(v_1.AuxInt)
  5941  			if !(int32(c) == -1) {
  5942  				continue
  5943  			}
  5944  			v.copyOf(x)
  5945  			return true
  5946  		}
  5947  		break
  5948  	}
  5949  	// match: (MNEGW _ (MOVDconst [c]))
  5950  	// cond: int32(c)==0
  5951  	// result: (MOVDconst [0])
  5952  	for {
  5953  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5954  			if v_1.Op != OpARM64MOVDconst {
  5955  				continue
  5956  			}
  5957  			c := auxIntToInt64(v_1.AuxInt)
  5958  			if !(int32(c) == 0) {
  5959  				continue
  5960  			}
  5961  			v.reset(OpARM64MOVDconst)
  5962  			v.AuxInt = int64ToAuxInt(0)
  5963  			return true
  5964  		}
  5965  		break
  5966  	}
  5967  	// match: (MNEGW x (MOVDconst [c]))
  5968  	// cond: int32(c)==1
  5969  	// result: (NEG x)
  5970  	for {
  5971  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5972  			x := v_0
  5973  			if v_1.Op != OpARM64MOVDconst {
  5974  				continue
  5975  			}
  5976  			c := auxIntToInt64(v_1.AuxInt)
  5977  			if !(int32(c) == 1) {
  5978  				continue
  5979  			}
  5980  			v.reset(OpARM64NEG)
  5981  			v.AddArg(x)
  5982  			return true
  5983  		}
  5984  		break
  5985  	}
  5986  	// match: (MNEGW x (MOVDconst [c]))
  5987  	// cond: isPowerOfTwo64(c)
  5988  	// result: (NEG (SLLconst <x.Type> [log64(c)] x))
  5989  	for {
  5990  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5991  			x := v_0
  5992  			if v_1.Op != OpARM64MOVDconst {
  5993  				continue
  5994  			}
  5995  			c := auxIntToInt64(v_1.AuxInt)
  5996  			if !(isPowerOfTwo64(c)) {
  5997  				continue
  5998  			}
  5999  			v.reset(OpARM64NEG)
  6000  			v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  6001  			v0.AuxInt = int64ToAuxInt(log64(c))
  6002  			v0.AddArg(x)
  6003  			v.AddArg(v0)
  6004  			return true
  6005  		}
  6006  		break
  6007  	}
  6008  	// match: (MNEGW x (MOVDconst [c]))
  6009  	// cond: isPowerOfTwo64(c-1) && int32(c) >= 3
  6010  	// result: (NEG (ADDshiftLL <x.Type> x x [log64(c-1)]))
  6011  	for {
  6012  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6013  			x := v_0
  6014  			if v_1.Op != OpARM64MOVDconst {
  6015  				continue
  6016  			}
  6017  			c := auxIntToInt64(v_1.AuxInt)
  6018  			if !(isPowerOfTwo64(c-1) && int32(c) >= 3) {
  6019  				continue
  6020  			}
  6021  			v.reset(OpARM64NEG)
  6022  			v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  6023  			v0.AuxInt = int64ToAuxInt(log64(c - 1))
  6024  			v0.AddArg2(x, x)
  6025  			v.AddArg(v0)
  6026  			return true
  6027  		}
  6028  		break
  6029  	}
  6030  	// match: (MNEGW x (MOVDconst [c]))
  6031  	// cond: isPowerOfTwo64(c+1) && int32(c) >= 7
  6032  	// result: (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log64(c+1)]))
  6033  	for {
  6034  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6035  			x := v_0
  6036  			if v_1.Op != OpARM64MOVDconst {
  6037  				continue
  6038  			}
  6039  			c := auxIntToInt64(v_1.AuxInt)
  6040  			if !(isPowerOfTwo64(c+1) && int32(c) >= 7) {
  6041  				continue
  6042  			}
  6043  			v.reset(OpARM64NEG)
  6044  			v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  6045  			v0.AuxInt = int64ToAuxInt(log64(c + 1))
  6046  			v1 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
  6047  			v1.AddArg(x)
  6048  			v0.AddArg2(v1, x)
  6049  			v.AddArg(v0)
  6050  			return true
  6051  		}
  6052  		break
  6053  	}
  6054  	// match: (MNEGW x (MOVDconst [c]))
  6055  	// cond: c%3 == 0 && isPowerOfTwo64(c/3) && is32Bit(c)
  6056  	// result: (SLLconst <x.Type> [log64(c/3)] (SUBshiftLL <x.Type> x x [2]))
  6057  	for {
  6058  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6059  			x := v_0
  6060  			if v_1.Op != OpARM64MOVDconst {
  6061  				continue
  6062  			}
  6063  			c := auxIntToInt64(v_1.AuxInt)
  6064  			if !(c%3 == 0 && isPowerOfTwo64(c/3) && is32Bit(c)) {
  6065  				continue
  6066  			}
  6067  			v.reset(OpARM64SLLconst)
  6068  			v.Type = x.Type
  6069  			v.AuxInt = int64ToAuxInt(log64(c / 3))
  6070  			v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  6071  			v0.AuxInt = int64ToAuxInt(2)
  6072  			v0.AddArg2(x, x)
  6073  			v.AddArg(v0)
  6074  			return true
  6075  		}
  6076  		break
  6077  	}
  6078  	// match: (MNEGW x (MOVDconst [c]))
  6079  	// cond: c%5 == 0 && isPowerOfTwo64(c/5) && is32Bit(c)
  6080  	// result: (NEG (SLLconst <x.Type> [log64(c/5)] (ADDshiftLL <x.Type> x x [2])))
  6081  	for {
  6082  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6083  			x := v_0
  6084  			if v_1.Op != OpARM64MOVDconst {
  6085  				continue
  6086  			}
  6087  			c := auxIntToInt64(v_1.AuxInt)
  6088  			if !(c%5 == 0 && isPowerOfTwo64(c/5) && is32Bit(c)) {
  6089  				continue
  6090  			}
  6091  			v.reset(OpARM64NEG)
  6092  			v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  6093  			v0.AuxInt = int64ToAuxInt(log64(c / 5))
  6094  			v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  6095  			v1.AuxInt = int64ToAuxInt(2)
  6096  			v1.AddArg2(x, x)
  6097  			v0.AddArg(v1)
  6098  			v.AddArg(v0)
  6099  			return true
  6100  		}
  6101  		break
  6102  	}
  6103  	// match: (MNEGW x (MOVDconst [c]))
  6104  	// cond: c%7 == 0 && isPowerOfTwo64(c/7) && is32Bit(c)
  6105  	// result: (SLLconst <x.Type> [log64(c/7)] (SUBshiftLL <x.Type> x x [3]))
  6106  	for {
  6107  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6108  			x := v_0
  6109  			if v_1.Op != OpARM64MOVDconst {
  6110  				continue
  6111  			}
  6112  			c := auxIntToInt64(v_1.AuxInt)
  6113  			if !(c%7 == 0 && isPowerOfTwo64(c/7) && is32Bit(c)) {
  6114  				continue
  6115  			}
  6116  			v.reset(OpARM64SLLconst)
  6117  			v.Type = x.Type
  6118  			v.AuxInt = int64ToAuxInt(log64(c / 7))
  6119  			v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
  6120  			v0.AuxInt = int64ToAuxInt(3)
  6121  			v0.AddArg2(x, x)
  6122  			v.AddArg(v0)
  6123  			return true
  6124  		}
  6125  		break
  6126  	}
  6127  	// match: (MNEGW x (MOVDconst [c]))
  6128  	// cond: c%9 == 0 && isPowerOfTwo64(c/9) && is32Bit(c)
  6129  	// result: (NEG (SLLconst <x.Type> [log64(c/9)] (ADDshiftLL <x.Type> x x [3])))
  6130  	for {
  6131  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6132  			x := v_0
  6133  			if v_1.Op != OpARM64MOVDconst {
  6134  				continue
  6135  			}
  6136  			c := auxIntToInt64(v_1.AuxInt)
  6137  			if !(c%9 == 0 && isPowerOfTwo64(c/9) && is32Bit(c)) {
  6138  				continue
  6139  			}
  6140  			v.reset(OpARM64NEG)
  6141  			v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
  6142  			v0.AuxInt = int64ToAuxInt(log64(c / 9))
  6143  			v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
  6144  			v1.AuxInt = int64ToAuxInt(3)
  6145  			v1.AddArg2(x, x)
  6146  			v0.AddArg(v1)
  6147  			v.AddArg(v0)
  6148  			return true
  6149  		}
  6150  		break
  6151  	}
  6152  	// match: (MNEGW (MOVDconst [c]) (MOVDconst [d]))
  6153  	// result: (MOVDconst [-int64(int32(c)*int32(d))])
  6154  	for {
  6155  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6156  			if v_0.Op != OpARM64MOVDconst {
  6157  				continue
  6158  			}
  6159  			c := auxIntToInt64(v_0.AuxInt)
  6160  			if v_1.Op != OpARM64MOVDconst {
  6161  				continue
  6162  			}
  6163  			d := auxIntToInt64(v_1.AuxInt)
  6164  			v.reset(OpARM64MOVDconst)
  6165  			v.AuxInt = int64ToAuxInt(-int64(int32(c) * int32(d)))
  6166  			return true
  6167  		}
  6168  		break
  6169  	}
  6170  	return false
  6171  }
  6172  func rewriteValueARM64_OpARM64MOD(v *Value) bool {
  6173  	v_1 := v.Args[1]
  6174  	v_0 := v.Args[0]
  6175  	// match: (MOD (MOVDconst [c]) (MOVDconst [d]))
  6176  	// cond: d != 0
  6177  	// result: (MOVDconst [c%d])
  6178  	for {
  6179  		if v_0.Op != OpARM64MOVDconst {
  6180  			break
  6181  		}
  6182  		c := auxIntToInt64(v_0.AuxInt)
  6183  		if v_1.Op != OpARM64MOVDconst {
  6184  			break
  6185  		}
  6186  		d := auxIntToInt64(v_1.AuxInt)
  6187  		if !(d != 0) {
  6188  			break
  6189  		}
  6190  		v.reset(OpARM64MOVDconst)
  6191  		v.AuxInt = int64ToAuxInt(c % d)
  6192  		return true
  6193  	}
  6194  	return false
  6195  }
  6196  func rewriteValueARM64_OpARM64MODW(v *Value) bool {
  6197  	v_1 := v.Args[1]
  6198  	v_0 := v.Args[0]
  6199  	// match: (MODW (MOVDconst [c]) (MOVDconst [d]))
  6200  	// cond: d != 0
  6201  	// result: (MOVDconst [int64(int32(c)%int32(d))])
  6202  	for {
  6203  		if v_0.Op != OpARM64MOVDconst {
  6204  			break
  6205  		}
  6206  		c := auxIntToInt64(v_0.AuxInt)
  6207  		if v_1.Op != OpARM64MOVDconst {
  6208  			break
  6209  		}
  6210  		d := auxIntToInt64(v_1.AuxInt)
  6211  		if !(d != 0) {
  6212  			break
  6213  		}
  6214  		v.reset(OpARM64MOVDconst)
  6215  		v.AuxInt = int64ToAuxInt(int64(int32(c) % int32(d)))
  6216  		return true
  6217  	}
  6218  	return false
  6219  }
  6220  func rewriteValueARM64_OpARM64MOVBUload(v *Value) bool {
  6221  	v_1 := v.Args[1]
  6222  	v_0 := v.Args[0]
  6223  	b := v.Block
  6224  	config := b.Func.Config
  6225  	// match: (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem)
  6226  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  6227  	// result: (MOVBUload [off1+int32(off2)] {sym} ptr mem)
  6228  	for {
  6229  		off1 := auxIntToInt32(v.AuxInt)
  6230  		sym := auxToSym(v.Aux)
  6231  		if v_0.Op != OpARM64ADDconst {
  6232  			break
  6233  		}
  6234  		off2 := auxIntToInt64(v_0.AuxInt)
  6235  		ptr := v_0.Args[0]
  6236  		mem := v_1
  6237  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  6238  			break
  6239  		}
  6240  		v.reset(OpARM64MOVBUload)
  6241  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  6242  		v.Aux = symToAux(sym)
  6243  		v.AddArg2(ptr, mem)
  6244  		return true
  6245  	}
  6246  	// match: (MOVBUload [off] {sym} (ADD ptr idx) mem)
  6247  	// cond: off == 0 && sym == nil
  6248  	// result: (MOVBUloadidx ptr idx mem)
  6249  	for {
  6250  		off := auxIntToInt32(v.AuxInt)
  6251  		sym := auxToSym(v.Aux)
  6252  		if v_0.Op != OpARM64ADD {
  6253  			break
  6254  		}
  6255  		idx := v_0.Args[1]
  6256  		ptr := v_0.Args[0]
  6257  		mem := v_1
  6258  		if !(off == 0 && sym == nil) {
  6259  			break
  6260  		}
  6261  		v.reset(OpARM64MOVBUloadidx)
  6262  		v.AddArg3(ptr, idx, mem)
  6263  		return true
  6264  	}
  6265  	// match: (MOVBUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6266  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  6267  	// result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6268  	for {
  6269  		off1 := auxIntToInt32(v.AuxInt)
  6270  		sym1 := auxToSym(v.Aux)
  6271  		if v_0.Op != OpARM64MOVDaddr {
  6272  			break
  6273  		}
  6274  		off2 := auxIntToInt32(v_0.AuxInt)
  6275  		sym2 := auxToSym(v_0.Aux)
  6276  		ptr := v_0.Args[0]
  6277  		mem := v_1
  6278  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  6279  			break
  6280  		}
  6281  		v.reset(OpARM64MOVBUload)
  6282  		v.AuxInt = int32ToAuxInt(off1 + off2)
  6283  		v.Aux = symToAux(mergeSym(sym1, sym2))
  6284  		v.AddArg2(ptr, mem)
  6285  		return true
  6286  	}
  6287  	// match: (MOVBUload [off] {sym} ptr (MOVBstorezero [off2] {sym2} ptr2 _))
  6288  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  6289  	// result: (MOVDconst [0])
  6290  	for {
  6291  		off := auxIntToInt32(v.AuxInt)
  6292  		sym := auxToSym(v.Aux)
  6293  		ptr := v_0
  6294  		if v_1.Op != OpARM64MOVBstorezero {
  6295  			break
  6296  		}
  6297  		off2 := auxIntToInt32(v_1.AuxInt)
  6298  		sym2 := auxToSym(v_1.Aux)
  6299  		ptr2 := v_1.Args[0]
  6300  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  6301  			break
  6302  		}
  6303  		v.reset(OpARM64MOVDconst)
  6304  		v.AuxInt = int64ToAuxInt(0)
  6305  		return true
  6306  	}
  6307  	// match: (MOVBUload [off] {sym} (SB) _)
  6308  	// cond: symIsRO(sym)
  6309  	// result: (MOVDconst [int64(read8(sym, int64(off)))])
  6310  	for {
  6311  		off := auxIntToInt32(v.AuxInt)
  6312  		sym := auxToSym(v.Aux)
  6313  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  6314  			break
  6315  		}
  6316  		v.reset(OpARM64MOVDconst)
  6317  		v.AuxInt = int64ToAuxInt(int64(read8(sym, int64(off))))
  6318  		return true
  6319  	}
  6320  	return false
  6321  }
  6322  func rewriteValueARM64_OpARM64MOVBUloadidx(v *Value) bool {
  6323  	v_2 := v.Args[2]
  6324  	v_1 := v.Args[1]
  6325  	v_0 := v.Args[0]
  6326  	// match: (MOVBUloadidx ptr (MOVDconst [c]) mem)
  6327  	// cond: is32Bit(c)
  6328  	// result: (MOVBUload [int32(c)] ptr mem)
  6329  	for {
  6330  		ptr := v_0
  6331  		if v_1.Op != OpARM64MOVDconst {
  6332  			break
  6333  		}
  6334  		c := auxIntToInt64(v_1.AuxInt)
  6335  		mem := v_2
  6336  		if !(is32Bit(c)) {
  6337  			break
  6338  		}
  6339  		v.reset(OpARM64MOVBUload)
  6340  		v.AuxInt = int32ToAuxInt(int32(c))
  6341  		v.AddArg2(ptr, mem)
  6342  		return true
  6343  	}
  6344  	// match: (MOVBUloadidx (MOVDconst [c]) ptr mem)
  6345  	// cond: is32Bit(c)
  6346  	// result: (MOVBUload [int32(c)] ptr mem)
  6347  	for {
  6348  		if v_0.Op != OpARM64MOVDconst {
  6349  			break
  6350  		}
  6351  		c := auxIntToInt64(v_0.AuxInt)
  6352  		ptr := v_1
  6353  		mem := v_2
  6354  		if !(is32Bit(c)) {
  6355  			break
  6356  		}
  6357  		v.reset(OpARM64MOVBUload)
  6358  		v.AuxInt = int32ToAuxInt(int32(c))
  6359  		v.AddArg2(ptr, mem)
  6360  		return true
  6361  	}
  6362  	// match: (MOVBUloadidx ptr idx (MOVBstorezeroidx ptr2 idx2 _))
  6363  	// cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
  6364  	// result: (MOVDconst [0])
  6365  	for {
  6366  		ptr := v_0
  6367  		idx := v_1
  6368  		if v_2.Op != OpARM64MOVBstorezeroidx {
  6369  			break
  6370  		}
  6371  		idx2 := v_2.Args[1]
  6372  		ptr2 := v_2.Args[0]
  6373  		if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
  6374  			break
  6375  		}
  6376  		v.reset(OpARM64MOVDconst)
  6377  		v.AuxInt = int64ToAuxInt(0)
  6378  		return true
  6379  	}
  6380  	return false
  6381  }
  6382  func rewriteValueARM64_OpARM64MOVBUreg(v *Value) bool {
  6383  	v_0 := v.Args[0]
  6384  	// match: (MOVBUreg x:(MOVBUload _ _))
  6385  	// result: (MOVDreg x)
  6386  	for {
  6387  		x := v_0
  6388  		if x.Op != OpARM64MOVBUload {
  6389  			break
  6390  		}
  6391  		v.reset(OpARM64MOVDreg)
  6392  		v.AddArg(x)
  6393  		return true
  6394  	}
  6395  	// match: (MOVBUreg x:(MOVBUloadidx _ _ _))
  6396  	// result: (MOVDreg x)
  6397  	for {
  6398  		x := v_0
  6399  		if x.Op != OpARM64MOVBUloadidx {
  6400  			break
  6401  		}
  6402  		v.reset(OpARM64MOVDreg)
  6403  		v.AddArg(x)
  6404  		return true
  6405  	}
  6406  	// match: (MOVBUreg x:(MOVBUreg _))
  6407  	// result: (MOVDreg x)
  6408  	for {
  6409  		x := v_0
  6410  		if x.Op != OpARM64MOVBUreg {
  6411  			break
  6412  		}
  6413  		v.reset(OpARM64MOVDreg)
  6414  		v.AddArg(x)
  6415  		return true
  6416  	}
  6417  	// match: (MOVBUreg (ANDconst [c] x))
  6418  	// result: (ANDconst [c&(1<<8-1)] x)
  6419  	for {
  6420  		if v_0.Op != OpARM64ANDconst {
  6421  			break
  6422  		}
  6423  		c := auxIntToInt64(v_0.AuxInt)
  6424  		x := v_0.Args[0]
  6425  		v.reset(OpARM64ANDconst)
  6426  		v.AuxInt = int64ToAuxInt(c & (1<<8 - 1))
  6427  		v.AddArg(x)
  6428  		return true
  6429  	}
  6430  	// match: (MOVBUreg (MOVDconst [c]))
  6431  	// result: (MOVDconst [int64(uint8(c))])
  6432  	for {
  6433  		if v_0.Op != OpARM64MOVDconst {
  6434  			break
  6435  		}
  6436  		c := auxIntToInt64(v_0.AuxInt)
  6437  		v.reset(OpARM64MOVDconst)
  6438  		v.AuxInt = int64ToAuxInt(int64(uint8(c)))
  6439  		return true
  6440  	}
  6441  	// match: (MOVBUreg x)
  6442  	// cond: x.Type.IsBoolean()
  6443  	// result: (MOVDreg x)
  6444  	for {
  6445  		x := v_0
  6446  		if !(x.Type.IsBoolean()) {
  6447  			break
  6448  		}
  6449  		v.reset(OpARM64MOVDreg)
  6450  		v.AddArg(x)
  6451  		return true
  6452  	}
  6453  	// match: (MOVBUreg (SLLconst [sc] x))
  6454  	// cond: isARM64BFMask(sc, 1<<8-1, sc)
  6455  	// result: (UBFIZ [armBFAuxInt(sc, arm64BFWidth(1<<8-1, sc))] x)
  6456  	for {
  6457  		if v_0.Op != OpARM64SLLconst {
  6458  			break
  6459  		}
  6460  		sc := auxIntToInt64(v_0.AuxInt)
  6461  		x := v_0.Args[0]
  6462  		if !(isARM64BFMask(sc, 1<<8-1, sc)) {
  6463  			break
  6464  		}
  6465  		v.reset(OpARM64UBFIZ)
  6466  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, arm64BFWidth(1<<8-1, sc)))
  6467  		v.AddArg(x)
  6468  		return true
  6469  	}
  6470  	// match: (MOVBUreg (SRLconst [sc] x))
  6471  	// cond: isARM64BFMask(sc, 1<<8-1, 0)
  6472  	// result: (UBFX [armBFAuxInt(sc, 8)] x)
  6473  	for {
  6474  		if v_0.Op != OpARM64SRLconst {
  6475  			break
  6476  		}
  6477  		sc := auxIntToInt64(v_0.AuxInt)
  6478  		x := v_0.Args[0]
  6479  		if !(isARM64BFMask(sc, 1<<8-1, 0)) {
  6480  			break
  6481  		}
  6482  		v.reset(OpARM64UBFX)
  6483  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, 8))
  6484  		v.AddArg(x)
  6485  		return true
  6486  	}
  6487  	return false
  6488  }
  6489  func rewriteValueARM64_OpARM64MOVBload(v *Value) bool {
  6490  	v_1 := v.Args[1]
  6491  	v_0 := v.Args[0]
  6492  	b := v.Block
  6493  	config := b.Func.Config
  6494  	// match: (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem)
  6495  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  6496  	// result: (MOVBload [off1+int32(off2)] {sym} ptr mem)
  6497  	for {
  6498  		off1 := auxIntToInt32(v.AuxInt)
  6499  		sym := auxToSym(v.Aux)
  6500  		if v_0.Op != OpARM64ADDconst {
  6501  			break
  6502  		}
  6503  		off2 := auxIntToInt64(v_0.AuxInt)
  6504  		ptr := v_0.Args[0]
  6505  		mem := v_1
  6506  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  6507  			break
  6508  		}
  6509  		v.reset(OpARM64MOVBload)
  6510  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  6511  		v.Aux = symToAux(sym)
  6512  		v.AddArg2(ptr, mem)
  6513  		return true
  6514  	}
  6515  	// match: (MOVBload [off] {sym} (ADD ptr idx) mem)
  6516  	// cond: off == 0 && sym == nil
  6517  	// result: (MOVBloadidx ptr idx mem)
  6518  	for {
  6519  		off := auxIntToInt32(v.AuxInt)
  6520  		sym := auxToSym(v.Aux)
  6521  		if v_0.Op != OpARM64ADD {
  6522  			break
  6523  		}
  6524  		idx := v_0.Args[1]
  6525  		ptr := v_0.Args[0]
  6526  		mem := v_1
  6527  		if !(off == 0 && sym == nil) {
  6528  			break
  6529  		}
  6530  		v.reset(OpARM64MOVBloadidx)
  6531  		v.AddArg3(ptr, idx, mem)
  6532  		return true
  6533  	}
  6534  	// match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6535  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  6536  	// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6537  	for {
  6538  		off1 := auxIntToInt32(v.AuxInt)
  6539  		sym1 := auxToSym(v.Aux)
  6540  		if v_0.Op != OpARM64MOVDaddr {
  6541  			break
  6542  		}
  6543  		off2 := auxIntToInt32(v_0.AuxInt)
  6544  		sym2 := auxToSym(v_0.Aux)
  6545  		ptr := v_0.Args[0]
  6546  		mem := v_1
  6547  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  6548  			break
  6549  		}
  6550  		v.reset(OpARM64MOVBload)
  6551  		v.AuxInt = int32ToAuxInt(off1 + off2)
  6552  		v.Aux = symToAux(mergeSym(sym1, sym2))
  6553  		v.AddArg2(ptr, mem)
  6554  		return true
  6555  	}
  6556  	// match: (MOVBload [off] {sym} ptr (MOVBstorezero [off2] {sym2} ptr2 _))
  6557  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  6558  	// result: (MOVDconst [0])
  6559  	for {
  6560  		off := auxIntToInt32(v.AuxInt)
  6561  		sym := auxToSym(v.Aux)
  6562  		ptr := v_0
  6563  		if v_1.Op != OpARM64MOVBstorezero {
  6564  			break
  6565  		}
  6566  		off2 := auxIntToInt32(v_1.AuxInt)
  6567  		sym2 := auxToSym(v_1.Aux)
  6568  		ptr2 := v_1.Args[0]
  6569  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  6570  			break
  6571  		}
  6572  		v.reset(OpARM64MOVDconst)
  6573  		v.AuxInt = int64ToAuxInt(0)
  6574  		return true
  6575  	}
  6576  	return false
  6577  }
  6578  func rewriteValueARM64_OpARM64MOVBloadidx(v *Value) bool {
  6579  	v_2 := v.Args[2]
  6580  	v_1 := v.Args[1]
  6581  	v_0 := v.Args[0]
  6582  	// match: (MOVBloadidx ptr (MOVDconst [c]) mem)
  6583  	// cond: is32Bit(c)
  6584  	// result: (MOVBload [int32(c)] ptr mem)
  6585  	for {
  6586  		ptr := v_0
  6587  		if v_1.Op != OpARM64MOVDconst {
  6588  			break
  6589  		}
  6590  		c := auxIntToInt64(v_1.AuxInt)
  6591  		mem := v_2
  6592  		if !(is32Bit(c)) {
  6593  			break
  6594  		}
  6595  		v.reset(OpARM64MOVBload)
  6596  		v.AuxInt = int32ToAuxInt(int32(c))
  6597  		v.AddArg2(ptr, mem)
  6598  		return true
  6599  	}
  6600  	// match: (MOVBloadidx (MOVDconst [c]) ptr mem)
  6601  	// cond: is32Bit(c)
  6602  	// result: (MOVBload [int32(c)] ptr mem)
  6603  	for {
  6604  		if v_0.Op != OpARM64MOVDconst {
  6605  			break
  6606  		}
  6607  		c := auxIntToInt64(v_0.AuxInt)
  6608  		ptr := v_1
  6609  		mem := v_2
  6610  		if !(is32Bit(c)) {
  6611  			break
  6612  		}
  6613  		v.reset(OpARM64MOVBload)
  6614  		v.AuxInt = int32ToAuxInt(int32(c))
  6615  		v.AddArg2(ptr, mem)
  6616  		return true
  6617  	}
  6618  	// match: (MOVBloadidx ptr idx (MOVBstorezeroidx ptr2 idx2 _))
  6619  	// cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
  6620  	// result: (MOVDconst [0])
  6621  	for {
  6622  		ptr := v_0
  6623  		idx := v_1
  6624  		if v_2.Op != OpARM64MOVBstorezeroidx {
  6625  			break
  6626  		}
  6627  		idx2 := v_2.Args[1]
  6628  		ptr2 := v_2.Args[0]
  6629  		if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
  6630  			break
  6631  		}
  6632  		v.reset(OpARM64MOVDconst)
  6633  		v.AuxInt = int64ToAuxInt(0)
  6634  		return true
  6635  	}
  6636  	return false
  6637  }
  6638  func rewriteValueARM64_OpARM64MOVBreg(v *Value) bool {
  6639  	v_0 := v.Args[0]
  6640  	// match: (MOVBreg x:(MOVBload _ _))
  6641  	// result: (MOVDreg x)
  6642  	for {
  6643  		x := v_0
  6644  		if x.Op != OpARM64MOVBload {
  6645  			break
  6646  		}
  6647  		v.reset(OpARM64MOVDreg)
  6648  		v.AddArg(x)
  6649  		return true
  6650  	}
  6651  	// match: (MOVBreg x:(MOVBloadidx _ _ _))
  6652  	// result: (MOVDreg x)
  6653  	for {
  6654  		x := v_0
  6655  		if x.Op != OpARM64MOVBloadidx {
  6656  			break
  6657  		}
  6658  		v.reset(OpARM64MOVDreg)
  6659  		v.AddArg(x)
  6660  		return true
  6661  	}
  6662  	// match: (MOVBreg x:(MOVBreg _))
  6663  	// result: (MOVDreg x)
  6664  	for {
  6665  		x := v_0
  6666  		if x.Op != OpARM64MOVBreg {
  6667  			break
  6668  		}
  6669  		v.reset(OpARM64MOVDreg)
  6670  		v.AddArg(x)
  6671  		return true
  6672  	}
  6673  	// match: (MOVBreg (MOVDconst [c]))
  6674  	// result: (MOVDconst [int64(int8(c))])
  6675  	for {
  6676  		if v_0.Op != OpARM64MOVDconst {
  6677  			break
  6678  		}
  6679  		c := auxIntToInt64(v_0.AuxInt)
  6680  		v.reset(OpARM64MOVDconst)
  6681  		v.AuxInt = int64ToAuxInt(int64(int8(c)))
  6682  		return true
  6683  	}
  6684  	// match: (MOVBreg (SLLconst [lc] x))
  6685  	// cond: lc < 8
  6686  	// result: (SBFIZ [armBFAuxInt(lc, 8-lc)] x)
  6687  	for {
  6688  		if v_0.Op != OpARM64SLLconst {
  6689  			break
  6690  		}
  6691  		lc := auxIntToInt64(v_0.AuxInt)
  6692  		x := v_0.Args[0]
  6693  		if !(lc < 8) {
  6694  			break
  6695  		}
  6696  		v.reset(OpARM64SBFIZ)
  6697  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, 8-lc))
  6698  		v.AddArg(x)
  6699  		return true
  6700  	}
  6701  	return false
  6702  }
  6703  func rewriteValueARM64_OpARM64MOVBstore(v *Value) bool {
  6704  	v_2 := v.Args[2]
  6705  	v_1 := v.Args[1]
  6706  	v_0 := v.Args[0]
  6707  	b := v.Block
  6708  	config := b.Func.Config
  6709  	// match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  6710  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  6711  	// result: (MOVBstore [off1+int32(off2)] {sym} ptr val mem)
  6712  	for {
  6713  		off1 := auxIntToInt32(v.AuxInt)
  6714  		sym := auxToSym(v.Aux)
  6715  		if v_0.Op != OpARM64ADDconst {
  6716  			break
  6717  		}
  6718  		off2 := auxIntToInt64(v_0.AuxInt)
  6719  		ptr := v_0.Args[0]
  6720  		val := v_1
  6721  		mem := v_2
  6722  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  6723  			break
  6724  		}
  6725  		v.reset(OpARM64MOVBstore)
  6726  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  6727  		v.Aux = symToAux(sym)
  6728  		v.AddArg3(ptr, val, mem)
  6729  		return true
  6730  	}
  6731  	// match: (MOVBstore [off] {sym} (ADD ptr idx) val mem)
  6732  	// cond: off == 0 && sym == nil
  6733  	// result: (MOVBstoreidx ptr idx val mem)
  6734  	for {
  6735  		off := auxIntToInt32(v.AuxInt)
  6736  		sym := auxToSym(v.Aux)
  6737  		if v_0.Op != OpARM64ADD {
  6738  			break
  6739  		}
  6740  		idx := v_0.Args[1]
  6741  		ptr := v_0.Args[0]
  6742  		val := v_1
  6743  		mem := v_2
  6744  		if !(off == 0 && sym == nil) {
  6745  			break
  6746  		}
  6747  		v.reset(OpARM64MOVBstoreidx)
  6748  		v.AddArg4(ptr, idx, val, mem)
  6749  		return true
  6750  	}
  6751  	// match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  6752  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  6753  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  6754  	for {
  6755  		off1 := auxIntToInt32(v.AuxInt)
  6756  		sym1 := auxToSym(v.Aux)
  6757  		if v_0.Op != OpARM64MOVDaddr {
  6758  			break
  6759  		}
  6760  		off2 := auxIntToInt32(v_0.AuxInt)
  6761  		sym2 := auxToSym(v_0.Aux)
  6762  		ptr := v_0.Args[0]
  6763  		val := v_1
  6764  		mem := v_2
  6765  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  6766  			break
  6767  		}
  6768  		v.reset(OpARM64MOVBstore)
  6769  		v.AuxInt = int32ToAuxInt(off1 + off2)
  6770  		v.Aux = symToAux(mergeSym(sym1, sym2))
  6771  		v.AddArg3(ptr, val, mem)
  6772  		return true
  6773  	}
  6774  	// match: (MOVBstore [off] {sym} ptr (MOVDconst [0]) mem)
  6775  	// result: (MOVBstorezero [off] {sym} ptr mem)
  6776  	for {
  6777  		off := auxIntToInt32(v.AuxInt)
  6778  		sym := auxToSym(v.Aux)
  6779  		ptr := v_0
  6780  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
  6781  			break
  6782  		}
  6783  		mem := v_2
  6784  		v.reset(OpARM64MOVBstorezero)
  6785  		v.AuxInt = int32ToAuxInt(off)
  6786  		v.Aux = symToAux(sym)
  6787  		v.AddArg2(ptr, mem)
  6788  		return true
  6789  	}
  6790  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  6791  	// result: (MOVBstore [off] {sym} ptr x mem)
  6792  	for {
  6793  		off := auxIntToInt32(v.AuxInt)
  6794  		sym := auxToSym(v.Aux)
  6795  		ptr := v_0
  6796  		if v_1.Op != OpARM64MOVBreg {
  6797  			break
  6798  		}
  6799  		x := v_1.Args[0]
  6800  		mem := v_2
  6801  		v.reset(OpARM64MOVBstore)
  6802  		v.AuxInt = int32ToAuxInt(off)
  6803  		v.Aux = symToAux(sym)
  6804  		v.AddArg3(ptr, x, mem)
  6805  		return true
  6806  	}
  6807  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  6808  	// result: (MOVBstore [off] {sym} ptr x mem)
  6809  	for {
  6810  		off := auxIntToInt32(v.AuxInt)
  6811  		sym := auxToSym(v.Aux)
  6812  		ptr := v_0
  6813  		if v_1.Op != OpARM64MOVBUreg {
  6814  			break
  6815  		}
  6816  		x := v_1.Args[0]
  6817  		mem := v_2
  6818  		v.reset(OpARM64MOVBstore)
  6819  		v.AuxInt = int32ToAuxInt(off)
  6820  		v.Aux = symToAux(sym)
  6821  		v.AddArg3(ptr, x, mem)
  6822  		return true
  6823  	}
  6824  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  6825  	// result: (MOVBstore [off] {sym} ptr x mem)
  6826  	for {
  6827  		off := auxIntToInt32(v.AuxInt)
  6828  		sym := auxToSym(v.Aux)
  6829  		ptr := v_0
  6830  		if v_1.Op != OpARM64MOVHreg {
  6831  			break
  6832  		}
  6833  		x := v_1.Args[0]
  6834  		mem := v_2
  6835  		v.reset(OpARM64MOVBstore)
  6836  		v.AuxInt = int32ToAuxInt(off)
  6837  		v.Aux = symToAux(sym)
  6838  		v.AddArg3(ptr, x, mem)
  6839  		return true
  6840  	}
  6841  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  6842  	// result: (MOVBstore [off] {sym} ptr x mem)
  6843  	for {
  6844  		off := auxIntToInt32(v.AuxInt)
  6845  		sym := auxToSym(v.Aux)
  6846  		ptr := v_0
  6847  		if v_1.Op != OpARM64MOVHUreg {
  6848  			break
  6849  		}
  6850  		x := v_1.Args[0]
  6851  		mem := v_2
  6852  		v.reset(OpARM64MOVBstore)
  6853  		v.AuxInt = int32ToAuxInt(off)
  6854  		v.Aux = symToAux(sym)
  6855  		v.AddArg3(ptr, x, mem)
  6856  		return true
  6857  	}
  6858  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  6859  	// result: (MOVBstore [off] {sym} ptr x mem)
  6860  	for {
  6861  		off := auxIntToInt32(v.AuxInt)
  6862  		sym := auxToSym(v.Aux)
  6863  		ptr := v_0
  6864  		if v_1.Op != OpARM64MOVWreg {
  6865  			break
  6866  		}
  6867  		x := v_1.Args[0]
  6868  		mem := v_2
  6869  		v.reset(OpARM64MOVBstore)
  6870  		v.AuxInt = int32ToAuxInt(off)
  6871  		v.Aux = symToAux(sym)
  6872  		v.AddArg3(ptr, x, mem)
  6873  		return true
  6874  	}
  6875  	// match: (MOVBstore [off] {sym} ptr (MOVWUreg x) mem)
  6876  	// result: (MOVBstore [off] {sym} ptr x mem)
  6877  	for {
  6878  		off := auxIntToInt32(v.AuxInt)
  6879  		sym := auxToSym(v.Aux)
  6880  		ptr := v_0
  6881  		if v_1.Op != OpARM64MOVWUreg {
  6882  			break
  6883  		}
  6884  		x := v_1.Args[0]
  6885  		mem := v_2
  6886  		v.reset(OpARM64MOVBstore)
  6887  		v.AuxInt = int32ToAuxInt(off)
  6888  		v.Aux = symToAux(sym)
  6889  		v.AddArg3(ptr, x, mem)
  6890  		return true
  6891  	}
  6892  	// match: (MOVBstore [i] {s} ptr0 (SRLconst [8] w) x:(MOVBstore [i-1] {s} ptr1 w mem))
  6893  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
  6894  	// result: (MOVHstore [i-1] {s} ptr0 w mem)
  6895  	for {
  6896  		i := auxIntToInt32(v.AuxInt)
  6897  		s := auxToSym(v.Aux)
  6898  		ptr0 := v_0
  6899  		if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 8 {
  6900  			break
  6901  		}
  6902  		w := v_1.Args[0]
  6903  		x := v_2
  6904  		if x.Op != OpARM64MOVBstore || auxIntToInt32(x.AuxInt) != i-1 || auxToSym(x.Aux) != s {
  6905  			break
  6906  		}
  6907  		mem := x.Args[2]
  6908  		ptr1 := x.Args[0]
  6909  		if w != x.Args[1] || !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
  6910  			break
  6911  		}
  6912  		v.reset(OpARM64MOVHstore)
  6913  		v.AuxInt = int32ToAuxInt(i - 1)
  6914  		v.Aux = symToAux(s)
  6915  		v.AddArg3(ptr0, w, mem)
  6916  		return true
  6917  	}
  6918  	// match: (MOVBstore [1] {s} (ADD ptr0 idx0) (SRLconst [8] w) x:(MOVBstoreidx ptr1 idx1 w mem))
  6919  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
  6920  	// result: (MOVHstoreidx ptr1 idx1 w mem)
  6921  	for {
  6922  		if auxIntToInt32(v.AuxInt) != 1 {
  6923  			break
  6924  		}
  6925  		s := auxToSym(v.Aux)
  6926  		if v_0.Op != OpARM64ADD {
  6927  			break
  6928  		}
  6929  		_ = v_0.Args[1]
  6930  		v_0_0 := v_0.Args[0]
  6931  		v_0_1 := v_0.Args[1]
  6932  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6933  			ptr0 := v_0_0
  6934  			idx0 := v_0_1
  6935  			if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 8 {
  6936  				continue
  6937  			}
  6938  			w := v_1.Args[0]
  6939  			x := v_2
  6940  			if x.Op != OpARM64MOVBstoreidx {
  6941  				continue
  6942  			}
  6943  			mem := x.Args[3]
  6944  			ptr1 := x.Args[0]
  6945  			idx1 := x.Args[1]
  6946  			if w != x.Args[2] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
  6947  				continue
  6948  			}
  6949  			v.reset(OpARM64MOVHstoreidx)
  6950  			v.AddArg4(ptr1, idx1, w, mem)
  6951  			return true
  6952  		}
  6953  		break
  6954  	}
  6955  	// match: (MOVBstore [i] {s} ptr0 (UBFX [armBFAuxInt(8, 8)] w) x:(MOVBstore [i-1] {s} ptr1 w mem))
  6956  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
  6957  	// result: (MOVHstore [i-1] {s} ptr0 w mem)
  6958  	for {
  6959  		i := auxIntToInt32(v.AuxInt)
  6960  		s := auxToSym(v.Aux)
  6961  		ptr0 := v_0
  6962  		if v_1.Op != OpARM64UBFX || auxIntToArm64BitField(v_1.AuxInt) != armBFAuxInt(8, 8) {
  6963  			break
  6964  		}
  6965  		w := v_1.Args[0]
  6966  		x := v_2
  6967  		if x.Op != OpARM64MOVBstore || auxIntToInt32(x.AuxInt) != i-1 || auxToSym(x.Aux) != s {
  6968  			break
  6969  		}
  6970  		mem := x.Args[2]
  6971  		ptr1 := x.Args[0]
  6972  		if w != x.Args[1] || !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
  6973  			break
  6974  		}
  6975  		v.reset(OpARM64MOVHstore)
  6976  		v.AuxInt = int32ToAuxInt(i - 1)
  6977  		v.Aux = symToAux(s)
  6978  		v.AddArg3(ptr0, w, mem)
  6979  		return true
  6980  	}
  6981  	// match: (MOVBstore [1] {s} (ADD ptr0 idx0) (UBFX [armBFAuxInt(8, 8)] w) x:(MOVBstoreidx ptr1 idx1 w mem))
  6982  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
  6983  	// result: (MOVHstoreidx ptr1 idx1 w mem)
  6984  	for {
  6985  		if auxIntToInt32(v.AuxInt) != 1 {
  6986  			break
  6987  		}
  6988  		s := auxToSym(v.Aux)
  6989  		if v_0.Op != OpARM64ADD {
  6990  			break
  6991  		}
  6992  		_ = v_0.Args[1]
  6993  		v_0_0 := v_0.Args[0]
  6994  		v_0_1 := v_0.Args[1]
  6995  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6996  			ptr0 := v_0_0
  6997  			idx0 := v_0_1
  6998  			if v_1.Op != OpARM64UBFX || auxIntToArm64BitField(v_1.AuxInt) != armBFAuxInt(8, 8) {
  6999  				continue
  7000  			}
  7001  			w := v_1.Args[0]
  7002  			x := v_2
  7003  			if x.Op != OpARM64MOVBstoreidx {
  7004  				continue
  7005  			}
  7006  			mem := x.Args[3]
  7007  			ptr1 := x.Args[0]
  7008  			idx1 := x.Args[1]
  7009  			if w != x.Args[2] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
  7010  				continue
  7011  			}
  7012  			v.reset(OpARM64MOVHstoreidx)
  7013  			v.AddArg4(ptr1, idx1, w, mem)
  7014  			return true
  7015  		}
  7016  		break
  7017  	}
  7018  	// match: (MOVBstore [i] {s} ptr0 (UBFX [armBFAuxInt(8, 24)] w) x:(MOVBstore [i-1] {s} ptr1 w mem))
  7019  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
  7020  	// result: (MOVHstore [i-1] {s} ptr0 w mem)
  7021  	for {
  7022  		i := auxIntToInt32(v.AuxInt)
  7023  		s := auxToSym(v.Aux)
  7024  		ptr0 := v_0
  7025  		if v_1.Op != OpARM64UBFX || auxIntToArm64BitField(v_1.AuxInt) != armBFAuxInt(8, 24) {
  7026  			break
  7027  		}
  7028  		w := v_1.Args[0]
  7029  		x := v_2
  7030  		if x.Op != OpARM64MOVBstore || auxIntToInt32(x.AuxInt) != i-1 || auxToSym(x.Aux) != s {
  7031  			break
  7032  		}
  7033  		mem := x.Args[2]
  7034  		ptr1 := x.Args[0]
  7035  		if w != x.Args[1] || !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
  7036  			break
  7037  		}
  7038  		v.reset(OpARM64MOVHstore)
  7039  		v.AuxInt = int32ToAuxInt(i - 1)
  7040  		v.Aux = symToAux(s)
  7041  		v.AddArg3(ptr0, w, mem)
  7042  		return true
  7043  	}
  7044  	// match: (MOVBstore [1] {s} (ADD ptr0 idx0) (UBFX [armBFAuxInt(8, 24)] w) x:(MOVBstoreidx ptr1 idx1 w mem))
  7045  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
  7046  	// result: (MOVHstoreidx ptr1 idx1 w mem)
  7047  	for {
  7048  		if auxIntToInt32(v.AuxInt) != 1 {
  7049  			break
  7050  		}
  7051  		s := auxToSym(v.Aux)
  7052  		if v_0.Op != OpARM64ADD {
  7053  			break
  7054  		}
  7055  		_ = v_0.Args[1]
  7056  		v_0_0 := v_0.Args[0]
  7057  		v_0_1 := v_0.Args[1]
  7058  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7059  			ptr0 := v_0_0
  7060  			idx0 := v_0_1
  7061  			if v_1.Op != OpARM64UBFX || auxIntToArm64BitField(v_1.AuxInt) != armBFAuxInt(8, 24) {
  7062  				continue
  7063  			}
  7064  			w := v_1.Args[0]
  7065  			x := v_2
  7066  			if x.Op != OpARM64MOVBstoreidx {
  7067  				continue
  7068  			}
  7069  			mem := x.Args[3]
  7070  			ptr1 := x.Args[0]
  7071  			idx1 := x.Args[1]
  7072  			if w != x.Args[2] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
  7073  				continue
  7074  			}
  7075  			v.reset(OpARM64MOVHstoreidx)
  7076  			v.AddArg4(ptr1, idx1, w, mem)
  7077  			return true
  7078  		}
  7079  		break
  7080  	}
  7081  	// match: (MOVBstore [i] {s} ptr0 (SRLconst [8] (MOVDreg w)) x:(MOVBstore [i-1] {s} ptr1 w mem))
  7082  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
  7083  	// result: (MOVHstore [i-1] {s} ptr0 w mem)
  7084  	for {
  7085  		i := auxIntToInt32(v.AuxInt)
  7086  		s := auxToSym(v.Aux)
  7087  		ptr0 := v_0
  7088  		if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 8 {
  7089  			break
  7090  		}
  7091  		v_1_0 := v_1.Args[0]
  7092  		if v_1_0.Op != OpARM64MOVDreg {
  7093  			break
  7094  		}
  7095  		w := v_1_0.Args[0]
  7096  		x := v_2
  7097  		if x.Op != OpARM64MOVBstore || auxIntToInt32(x.AuxInt) != i-1 || auxToSym(x.Aux) != s {
  7098  			break
  7099  		}
  7100  		mem := x.Args[2]
  7101  		ptr1 := x.Args[0]
  7102  		if w != x.Args[1] || !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
  7103  			break
  7104  		}
  7105  		v.reset(OpARM64MOVHstore)
  7106  		v.AuxInt = int32ToAuxInt(i - 1)
  7107  		v.Aux = symToAux(s)
  7108  		v.AddArg3(ptr0, w, mem)
  7109  		return true
  7110  	}
  7111  	// match: (MOVBstore [1] {s} (ADD ptr0 idx0) (SRLconst [8] (MOVDreg w)) x:(MOVBstoreidx ptr1 idx1 w mem))
  7112  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
  7113  	// result: (MOVHstoreidx ptr1 idx1 w mem)
  7114  	for {
  7115  		if auxIntToInt32(v.AuxInt) != 1 {
  7116  			break
  7117  		}
  7118  		s := auxToSym(v.Aux)
  7119  		if v_0.Op != OpARM64ADD {
  7120  			break
  7121  		}
  7122  		_ = v_0.Args[1]
  7123  		v_0_0 := v_0.Args[0]
  7124  		v_0_1 := v_0.Args[1]
  7125  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7126  			ptr0 := v_0_0
  7127  			idx0 := v_0_1
  7128  			if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 8 {
  7129  				continue
  7130  			}
  7131  			v_1_0 := v_1.Args[0]
  7132  			if v_1_0.Op != OpARM64MOVDreg {
  7133  				continue
  7134  			}
  7135  			w := v_1_0.Args[0]
  7136  			x := v_2
  7137  			if x.Op != OpARM64MOVBstoreidx {
  7138  				continue
  7139  			}
  7140  			mem := x.Args[3]
  7141  			ptr1 := x.Args[0]
  7142  			idx1 := x.Args[1]
  7143  			if w != x.Args[2] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
  7144  				continue
  7145  			}
  7146  			v.reset(OpARM64MOVHstoreidx)
  7147  			v.AddArg4(ptr1, idx1, w, mem)
  7148  			return true
  7149  		}
  7150  		break
  7151  	}
  7152  	// match: (MOVBstore [i] {s} ptr0 (SRLconst [j] w) x:(MOVBstore [i-1] {s} ptr1 w0:(SRLconst [j-8] w) mem))
  7153  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
  7154  	// result: (MOVHstore [i-1] {s} ptr0 w0 mem)
  7155  	for {
  7156  		i := auxIntToInt32(v.AuxInt)
  7157  		s := auxToSym(v.Aux)
  7158  		ptr0 := v_0
  7159  		if v_1.Op != OpARM64SRLconst {
  7160  			break
  7161  		}
  7162  		j := auxIntToInt64(v_1.AuxInt)
  7163  		w := v_1.Args[0]
  7164  		x := v_2
  7165  		if x.Op != OpARM64MOVBstore || auxIntToInt32(x.AuxInt) != i-1 || auxToSym(x.Aux) != s {
  7166  			break
  7167  		}
  7168  		mem := x.Args[2]
  7169  		ptr1 := x.Args[0]
  7170  		w0 := x.Args[1]
  7171  		if w0.Op != OpARM64SRLconst || auxIntToInt64(w0.AuxInt) != j-8 || w != w0.Args[0] || !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
  7172  			break
  7173  		}
  7174  		v.reset(OpARM64MOVHstore)
  7175  		v.AuxInt = int32ToAuxInt(i - 1)
  7176  		v.Aux = symToAux(s)
  7177  		v.AddArg3(ptr0, w0, mem)
  7178  		return true
  7179  	}
  7180  	// match: (MOVBstore [1] {s} (ADD ptr0 idx0) (SRLconst [j] w) x:(MOVBstoreidx ptr1 idx1 w0:(SRLconst [j-8] w) mem))
  7181  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
  7182  	// result: (MOVHstoreidx ptr1 idx1 w0 mem)
  7183  	for {
  7184  		if auxIntToInt32(v.AuxInt) != 1 {
  7185  			break
  7186  		}
  7187  		s := auxToSym(v.Aux)
  7188  		if v_0.Op != OpARM64ADD {
  7189  			break
  7190  		}
  7191  		_ = v_0.Args[1]
  7192  		v_0_0 := v_0.Args[0]
  7193  		v_0_1 := v_0.Args[1]
  7194  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7195  			ptr0 := v_0_0
  7196  			idx0 := v_0_1
  7197  			if v_1.Op != OpARM64SRLconst {
  7198  				continue
  7199  			}
  7200  			j := auxIntToInt64(v_1.AuxInt)
  7201  			w := v_1.Args[0]
  7202  			x := v_2
  7203  			if x.Op != OpARM64MOVBstoreidx {
  7204  				continue
  7205  			}
  7206  			mem := x.Args[3]
  7207  			ptr1 := x.Args[0]
  7208  			idx1 := x.Args[1]
  7209  			w0 := x.Args[2]
  7210  			if w0.Op != OpARM64SRLconst || auxIntToInt64(w0.AuxInt) != j-8 || w != w0.Args[0] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
  7211  				continue
  7212  			}
  7213  			v.reset(OpARM64MOVHstoreidx)
  7214  			v.AddArg4(ptr1, idx1, w0, mem)
  7215  			return true
  7216  		}
  7217  		break
  7218  	}
  7219  	// match: (MOVBstore [i] {s} ptr0 (UBFX [bfc] w) x:(MOVBstore [i-1] {s} ptr1 w0:(UBFX [bfc2] w) mem))
  7220  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && bfc.getARM64BFwidth() == 32 - bfc.getARM64BFlsb() && bfc2.getARM64BFwidth() == 32 - bfc2.getARM64BFlsb() && bfc2.getARM64BFlsb() == bfc.getARM64BFlsb() - 8 && clobber(x)
  7221  	// result: (MOVHstore [i-1] {s} ptr0 w0 mem)
  7222  	for {
  7223  		i := auxIntToInt32(v.AuxInt)
  7224  		s := auxToSym(v.Aux)
  7225  		ptr0 := v_0
  7226  		if v_1.Op != OpARM64UBFX {
  7227  			break
  7228  		}
  7229  		bfc := auxIntToArm64BitField(v_1.AuxInt)
  7230  		w := v_1.Args[0]
  7231  		x := v_2
  7232  		if x.Op != OpARM64MOVBstore || auxIntToInt32(x.AuxInt) != i-1 || auxToSym(x.Aux) != s {
  7233  			break
  7234  		}
  7235  		mem := x.Args[2]
  7236  		ptr1 := x.Args[0]
  7237  		w0 := x.Args[1]
  7238  		if w0.Op != OpARM64UBFX {
  7239  			break
  7240  		}
  7241  		bfc2 := auxIntToArm64BitField(w0.AuxInt)
  7242  		if w != w0.Args[0] || !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && bfc.getARM64BFwidth() == 32-bfc.getARM64BFlsb() && bfc2.getARM64BFwidth() == 32-bfc2.getARM64BFlsb() && bfc2.getARM64BFlsb() == bfc.getARM64BFlsb()-8 && clobber(x)) {
  7243  			break
  7244  		}
  7245  		v.reset(OpARM64MOVHstore)
  7246  		v.AuxInt = int32ToAuxInt(i - 1)
  7247  		v.Aux = symToAux(s)
  7248  		v.AddArg3(ptr0, w0, mem)
  7249  		return true
  7250  	}
  7251  	// match: (MOVBstore [1] {s} (ADD ptr0 idx0) (UBFX [bfc] w) x:(MOVBstoreidx ptr1 idx1 w0:(UBFX [bfc2] w) mem))
  7252  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && bfc.getARM64BFwidth() == 32 - bfc.getARM64BFlsb() && bfc2.getARM64BFwidth() == 32 - bfc2.getARM64BFlsb() && bfc2.getARM64BFlsb() == bfc.getARM64BFlsb() - 8 && clobber(x)
  7253  	// result: (MOVHstoreidx ptr1 idx1 w0 mem)
  7254  	for {
  7255  		if auxIntToInt32(v.AuxInt) != 1 {
  7256  			break
  7257  		}
  7258  		s := auxToSym(v.Aux)
  7259  		if v_0.Op != OpARM64ADD {
  7260  			break
  7261  		}
  7262  		_ = v_0.Args[1]
  7263  		v_0_0 := v_0.Args[0]
  7264  		v_0_1 := v_0.Args[1]
  7265  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7266  			ptr0 := v_0_0
  7267  			idx0 := v_0_1
  7268  			if v_1.Op != OpARM64UBFX {
  7269  				continue
  7270  			}
  7271  			bfc := auxIntToArm64BitField(v_1.AuxInt)
  7272  			w := v_1.Args[0]
  7273  			x := v_2
  7274  			if x.Op != OpARM64MOVBstoreidx {
  7275  				continue
  7276  			}
  7277  			mem := x.Args[3]
  7278  			ptr1 := x.Args[0]
  7279  			idx1 := x.Args[1]
  7280  			w0 := x.Args[2]
  7281  			if w0.Op != OpARM64UBFX {
  7282  				continue
  7283  			}
  7284  			bfc2 := auxIntToArm64BitField(w0.AuxInt)
  7285  			if w != w0.Args[0] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && bfc.getARM64BFwidth() == 32-bfc.getARM64BFlsb() && bfc2.getARM64BFwidth() == 32-bfc2.getARM64BFlsb() && bfc2.getARM64BFlsb() == bfc.getARM64BFlsb()-8 && clobber(x)) {
  7286  				continue
  7287  			}
  7288  			v.reset(OpARM64MOVHstoreidx)
  7289  			v.AddArg4(ptr1, idx1, w0, mem)
  7290  			return true
  7291  		}
  7292  		break
  7293  	}
  7294  	// match: (MOVBstore [i] {s} ptr0 (SRLconst [j] (MOVDreg w)) x:(MOVBstore [i-1] {s} ptr1 w0:(SRLconst [j-8] (MOVDreg w)) mem))
  7295  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
  7296  	// result: (MOVHstore [i-1] {s} ptr0 w0 mem)
  7297  	for {
  7298  		i := auxIntToInt32(v.AuxInt)
  7299  		s := auxToSym(v.Aux)
  7300  		ptr0 := v_0
  7301  		if v_1.Op != OpARM64SRLconst {
  7302  			break
  7303  		}
  7304  		j := auxIntToInt64(v_1.AuxInt)
  7305  		v_1_0 := v_1.Args[0]
  7306  		if v_1_0.Op != OpARM64MOVDreg {
  7307  			break
  7308  		}
  7309  		w := v_1_0.Args[0]
  7310  		x := v_2
  7311  		if x.Op != OpARM64MOVBstore || auxIntToInt32(x.AuxInt) != i-1 || auxToSym(x.Aux) != s {
  7312  			break
  7313  		}
  7314  		mem := x.Args[2]
  7315  		ptr1 := x.Args[0]
  7316  		w0 := x.Args[1]
  7317  		if w0.Op != OpARM64SRLconst || auxIntToInt64(w0.AuxInt) != j-8 {
  7318  			break
  7319  		}
  7320  		w0_0 := w0.Args[0]
  7321  		if w0_0.Op != OpARM64MOVDreg || w != w0_0.Args[0] || !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
  7322  			break
  7323  		}
  7324  		v.reset(OpARM64MOVHstore)
  7325  		v.AuxInt = int32ToAuxInt(i - 1)
  7326  		v.Aux = symToAux(s)
  7327  		v.AddArg3(ptr0, w0, mem)
  7328  		return true
  7329  	}
  7330  	// match: (MOVBstore [1] {s} (ADD ptr0 idx0) (SRLconst [j] (MOVDreg w)) x:(MOVBstoreidx ptr1 idx1 w0:(SRLconst [j-8] (MOVDreg w)) mem))
  7331  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
  7332  	// result: (MOVHstoreidx ptr1 idx1 w0 mem)
  7333  	for {
  7334  		if auxIntToInt32(v.AuxInt) != 1 {
  7335  			break
  7336  		}
  7337  		s := auxToSym(v.Aux)
  7338  		if v_0.Op != OpARM64ADD {
  7339  			break
  7340  		}
  7341  		_ = v_0.Args[1]
  7342  		v_0_0 := v_0.Args[0]
  7343  		v_0_1 := v_0.Args[1]
  7344  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7345  			ptr0 := v_0_0
  7346  			idx0 := v_0_1
  7347  			if v_1.Op != OpARM64SRLconst {
  7348  				continue
  7349  			}
  7350  			j := auxIntToInt64(v_1.AuxInt)
  7351  			v_1_0 := v_1.Args[0]
  7352  			if v_1_0.Op != OpARM64MOVDreg {
  7353  				continue
  7354  			}
  7355  			w := v_1_0.Args[0]
  7356  			x := v_2
  7357  			if x.Op != OpARM64MOVBstoreidx {
  7358  				continue
  7359  			}
  7360  			mem := x.Args[3]
  7361  			ptr1 := x.Args[0]
  7362  			idx1 := x.Args[1]
  7363  			w0 := x.Args[2]
  7364  			if w0.Op != OpARM64SRLconst || auxIntToInt64(w0.AuxInt) != j-8 {
  7365  				continue
  7366  			}
  7367  			w0_0 := w0.Args[0]
  7368  			if w0_0.Op != OpARM64MOVDreg || w != w0_0.Args[0] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
  7369  				continue
  7370  			}
  7371  			v.reset(OpARM64MOVHstoreidx)
  7372  			v.AddArg4(ptr1, idx1, w0, mem)
  7373  			return true
  7374  		}
  7375  		break
  7376  	}
  7377  	// match: (MOVBstore [i] {s} ptr w x0:(MOVBstore [i-1] {s} ptr (SRLconst [8] w) x1:(MOVBstore [i-2] {s} ptr (SRLconst [16] w) x2:(MOVBstore [i-3] {s} ptr (SRLconst [24] w) x3:(MOVBstore [i-4] {s} ptr (SRLconst [32] w) x4:(MOVBstore [i-5] {s} ptr (SRLconst [40] w) x5:(MOVBstore [i-6] {s} ptr (SRLconst [48] w) x6:(MOVBstore [i-7] {s} ptr (SRLconst [56] w) mem))))))))
  7378  	// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && clobber(x0, x1, x2, x3, x4, x5, x6)
  7379  	// result: (MOVDstore [i-7] {s} ptr (REV <w.Type> w) mem)
  7380  	for {
  7381  		i := auxIntToInt32(v.AuxInt)
  7382  		s := auxToSym(v.Aux)
  7383  		ptr := v_0
  7384  		w := v_1
  7385  		x0 := v_2
  7386  		if x0.Op != OpARM64MOVBstore || auxIntToInt32(x0.AuxInt) != i-1 || auxToSym(x0.Aux) != s {
  7387  			break
  7388  		}
  7389  		_ = x0.Args[2]
  7390  		if ptr != x0.Args[0] {
  7391  			break
  7392  		}
  7393  		x0_1 := x0.Args[1]
  7394  		if x0_1.Op != OpARM64SRLconst || auxIntToInt64(x0_1.AuxInt) != 8 || w != x0_1.Args[0] {
  7395  			break
  7396  		}
  7397  		x1 := x0.Args[2]
  7398  		if x1.Op != OpARM64MOVBstore || auxIntToInt32(x1.AuxInt) != i-2 || auxToSym(x1.Aux) != s {
  7399  			break
  7400  		}
  7401  		_ = x1.Args[2]
  7402  		if ptr != x1.Args[0] {
  7403  			break
  7404  		}
  7405  		x1_1 := x1.Args[1]
  7406  		if x1_1.Op != OpARM64SRLconst || auxIntToInt64(x1_1.AuxInt) != 16 || w != x1_1.Args[0] {
  7407  			break
  7408  		}
  7409  		x2 := x1.Args[2]
  7410  		if x2.Op != OpARM64MOVBstore || auxIntToInt32(x2.AuxInt) != i-3 || auxToSym(x2.Aux) != s {
  7411  			break
  7412  		}
  7413  		_ = x2.Args[2]
  7414  		if ptr != x2.Args[0] {
  7415  			break
  7416  		}
  7417  		x2_1 := x2.Args[1]
  7418  		if x2_1.Op != OpARM64SRLconst || auxIntToInt64(x2_1.AuxInt) != 24 || w != x2_1.Args[0] {
  7419  			break
  7420  		}
  7421  		x3 := x2.Args[2]
  7422  		if x3.Op != OpARM64MOVBstore || auxIntToInt32(x3.AuxInt) != i-4 || auxToSym(x3.Aux) != s {
  7423  			break
  7424  		}
  7425  		_ = x3.Args[2]
  7426  		if ptr != x3.Args[0] {
  7427  			break
  7428  		}
  7429  		x3_1 := x3.Args[1]
  7430  		if x3_1.Op != OpARM64SRLconst || auxIntToInt64(x3_1.AuxInt) != 32 || w != x3_1.Args[0] {
  7431  			break
  7432  		}
  7433  		x4 := x3.Args[2]
  7434  		if x4.Op != OpARM64MOVBstore || auxIntToInt32(x4.AuxInt) != i-5 || auxToSym(x4.Aux) != s {
  7435  			break
  7436  		}
  7437  		_ = x4.Args[2]
  7438  		if ptr != x4.Args[0] {
  7439  			break
  7440  		}
  7441  		x4_1 := x4.Args[1]
  7442  		if x4_1.Op != OpARM64SRLconst || auxIntToInt64(x4_1.AuxInt) != 40 || w != x4_1.Args[0] {
  7443  			break
  7444  		}
  7445  		x5 := x4.Args[2]
  7446  		if x5.Op != OpARM64MOVBstore || auxIntToInt32(x5.AuxInt) != i-6 || auxToSym(x5.Aux) != s {
  7447  			break
  7448  		}
  7449  		_ = x5.Args[2]
  7450  		if ptr != x5.Args[0] {
  7451  			break
  7452  		}
  7453  		x5_1 := x5.Args[1]
  7454  		if x5_1.Op != OpARM64SRLconst || auxIntToInt64(x5_1.AuxInt) != 48 || w != x5_1.Args[0] {
  7455  			break
  7456  		}
  7457  		x6 := x5.Args[2]
  7458  		if x6.Op != OpARM64MOVBstore || auxIntToInt32(x6.AuxInt) != i-7 || auxToSym(x6.Aux) != s {
  7459  			break
  7460  		}
  7461  		mem := x6.Args[2]
  7462  		if ptr != x6.Args[0] {
  7463  			break
  7464  		}
  7465  		x6_1 := x6.Args[1]
  7466  		if x6_1.Op != OpARM64SRLconst || auxIntToInt64(x6_1.AuxInt) != 56 || w != x6_1.Args[0] || !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && clobber(x0, x1, x2, x3, x4, x5, x6)) {
  7467  			break
  7468  		}
  7469  		v.reset(OpARM64MOVDstore)
  7470  		v.AuxInt = int32ToAuxInt(i - 7)
  7471  		v.Aux = symToAux(s)
  7472  		v0 := b.NewValue0(x6.Pos, OpARM64REV, w.Type)
  7473  		v0.AddArg(w)
  7474  		v.AddArg3(ptr, v0, mem)
  7475  		return true
  7476  	}
  7477  	// match: (MOVBstore [7] {s} p w x0:(MOVBstore [6] {s} p (SRLconst [8] w) x1:(MOVBstore [5] {s} p (SRLconst [16] w) x2:(MOVBstore [4] {s} p (SRLconst [24] w) x3:(MOVBstore [3] {s} p (SRLconst [32] w) x4:(MOVBstore [2] {s} p (SRLconst [40] w) x5:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (SRLconst [48] w) x6:(MOVBstoreidx ptr0 idx0 (SRLconst [56] w) mem))))))))
  7478  	// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0, x1, x2, x3, x4, x5, x6)
  7479  	// result: (MOVDstoreidx ptr0 idx0 (REV <w.Type> w) mem)
  7480  	for {
  7481  		if auxIntToInt32(v.AuxInt) != 7 {
  7482  			break
  7483  		}
  7484  		s := auxToSym(v.Aux)
  7485  		p := v_0
  7486  		w := v_1
  7487  		x0 := v_2
  7488  		if x0.Op != OpARM64MOVBstore || auxIntToInt32(x0.AuxInt) != 6 || auxToSym(x0.Aux) != s {
  7489  			break
  7490  		}
  7491  		_ = x0.Args[2]
  7492  		if p != x0.Args[0] {
  7493  			break
  7494  		}
  7495  		x0_1 := x0.Args[1]
  7496  		if x0_1.Op != OpARM64SRLconst || auxIntToInt64(x0_1.AuxInt) != 8 || w != x0_1.Args[0] {
  7497  			break
  7498  		}
  7499  		x1 := x0.Args[2]
  7500  		if x1.Op != OpARM64MOVBstore || auxIntToInt32(x1.AuxInt) != 5 || auxToSym(x1.Aux) != s {
  7501  			break
  7502  		}
  7503  		_ = x1.Args[2]
  7504  		if p != x1.Args[0] {
  7505  			break
  7506  		}
  7507  		x1_1 := x1.Args[1]
  7508  		if x1_1.Op != OpARM64SRLconst || auxIntToInt64(x1_1.AuxInt) != 16 || w != x1_1.Args[0] {
  7509  			break
  7510  		}
  7511  		x2 := x1.Args[2]
  7512  		if x2.Op != OpARM64MOVBstore || auxIntToInt32(x2.AuxInt) != 4 || auxToSym(x2.Aux) != s {
  7513  			break
  7514  		}
  7515  		_ = x2.Args[2]
  7516  		if p != x2.Args[0] {
  7517  			break
  7518  		}
  7519  		x2_1 := x2.Args[1]
  7520  		if x2_1.Op != OpARM64SRLconst || auxIntToInt64(x2_1.AuxInt) != 24 || w != x2_1.Args[0] {
  7521  			break
  7522  		}
  7523  		x3 := x2.Args[2]
  7524  		if x3.Op != OpARM64MOVBstore || auxIntToInt32(x3.AuxInt) != 3 || auxToSym(x3.Aux) != s {
  7525  			break
  7526  		}
  7527  		_ = x3.Args[2]
  7528  		if p != x3.Args[0] {
  7529  			break
  7530  		}
  7531  		x3_1 := x3.Args[1]
  7532  		if x3_1.Op != OpARM64SRLconst || auxIntToInt64(x3_1.AuxInt) != 32 || w != x3_1.Args[0] {
  7533  			break
  7534  		}
  7535  		x4 := x3.Args[2]
  7536  		if x4.Op != OpARM64MOVBstore || auxIntToInt32(x4.AuxInt) != 2 || auxToSym(x4.Aux) != s {
  7537  			break
  7538  		}
  7539  		_ = x4.Args[2]
  7540  		if p != x4.Args[0] {
  7541  			break
  7542  		}
  7543  		x4_1 := x4.Args[1]
  7544  		if x4_1.Op != OpARM64SRLconst || auxIntToInt64(x4_1.AuxInt) != 40 || w != x4_1.Args[0] {
  7545  			break
  7546  		}
  7547  		x5 := x4.Args[2]
  7548  		if x5.Op != OpARM64MOVBstore || auxIntToInt32(x5.AuxInt) != 1 || auxToSym(x5.Aux) != s {
  7549  			break
  7550  		}
  7551  		_ = x5.Args[2]
  7552  		p1 := x5.Args[0]
  7553  		if p1.Op != OpARM64ADD {
  7554  			break
  7555  		}
  7556  		_ = p1.Args[1]
  7557  		p1_0 := p1.Args[0]
  7558  		p1_1 := p1.Args[1]
  7559  		for _i0 := 0; _i0 <= 1; _i0, p1_0, p1_1 = _i0+1, p1_1, p1_0 {
  7560  			ptr1 := p1_0
  7561  			idx1 := p1_1
  7562  			x5_1 := x5.Args[1]
  7563  			if x5_1.Op != OpARM64SRLconst || auxIntToInt64(x5_1.AuxInt) != 48 || w != x5_1.Args[0] {
  7564  				continue
  7565  			}
  7566  			x6 := x5.Args[2]
  7567  			if x6.Op != OpARM64MOVBstoreidx {
  7568  				continue
  7569  			}
  7570  			mem := x6.Args[3]
  7571  			ptr0 := x6.Args[0]
  7572  			idx0 := x6.Args[1]
  7573  			x6_2 := x6.Args[2]
  7574  			if x6_2.Op != OpARM64SRLconst || auxIntToInt64(x6_2.AuxInt) != 56 || w != x6_2.Args[0] || !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0, x1, x2, x3, x4, x5, x6)) {
  7575  				continue
  7576  			}
  7577  			v.reset(OpARM64MOVDstoreidx)
  7578  			v0 := b.NewValue0(x5.Pos, OpARM64REV, w.Type)
  7579  			v0.AddArg(w)
  7580  			v.AddArg4(ptr0, idx0, v0, mem)
  7581  			return true
  7582  		}
  7583  		break
  7584  	}
  7585  	// match: (MOVBstore [i] {s} ptr w x0:(MOVBstore [i-1] {s} ptr (UBFX [armBFAuxInt(8, 24)] w) x1:(MOVBstore [i-2] {s} ptr (UBFX [armBFAuxInt(16, 16)] w) x2:(MOVBstore [i-3] {s} ptr (UBFX [armBFAuxInt(24, 8)] w) mem))))
  7586  	// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0, x1, x2)
  7587  	// result: (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
  7588  	for {
  7589  		i := auxIntToInt32(v.AuxInt)
  7590  		s := auxToSym(v.Aux)
  7591  		ptr := v_0
  7592  		w := v_1
  7593  		x0 := v_2
  7594  		if x0.Op != OpARM64MOVBstore || auxIntToInt32(x0.AuxInt) != i-1 || auxToSym(x0.Aux) != s {
  7595  			break
  7596  		}
  7597  		_ = x0.Args[2]
  7598  		if ptr != x0.Args[0] {
  7599  			break
  7600  		}
  7601  		x0_1 := x0.Args[1]
  7602  		if x0_1.Op != OpARM64UBFX || auxIntToArm64BitField(x0_1.AuxInt) != armBFAuxInt(8, 24) || w != x0_1.Args[0] {
  7603  			break
  7604  		}
  7605  		x1 := x0.Args[2]
  7606  		if x1.Op != OpARM64MOVBstore || auxIntToInt32(x1.AuxInt) != i-2 || auxToSym(x1.Aux) != s {
  7607  			break
  7608  		}
  7609  		_ = x1.Args[2]
  7610  		if ptr != x1.Args[0] {
  7611  			break
  7612  		}
  7613  		x1_1 := x1.Args[1]
  7614  		if x1_1.Op != OpARM64UBFX || auxIntToArm64BitField(x1_1.AuxInt) != armBFAuxInt(16, 16) || w != x1_1.Args[0] {
  7615  			break
  7616  		}
  7617  		x2 := x1.Args[2]
  7618  		if x2.Op != OpARM64MOVBstore || auxIntToInt32(x2.AuxInt) != i-3 || auxToSym(x2.Aux) != s {
  7619  			break
  7620  		}
  7621  		mem := x2.Args[2]
  7622  		if ptr != x2.Args[0] {
  7623  			break
  7624  		}
  7625  		x2_1 := x2.Args[1]
  7626  		if x2_1.Op != OpARM64UBFX || auxIntToArm64BitField(x2_1.AuxInt) != armBFAuxInt(24, 8) || w != x2_1.Args[0] || !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0, x1, x2)) {
  7627  			break
  7628  		}
  7629  		v.reset(OpARM64MOVWstore)
  7630  		v.AuxInt = int32ToAuxInt(i - 3)
  7631  		v.Aux = symToAux(s)
  7632  		v0 := b.NewValue0(x2.Pos, OpARM64REVW, w.Type)
  7633  		v0.AddArg(w)
  7634  		v.AddArg3(ptr, v0, mem)
  7635  		return true
  7636  	}
  7637  	// match: (MOVBstore [3] {s} p w x0:(MOVBstore [2] {s} p (UBFX [armBFAuxInt(8, 24)] w) x1:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (UBFX [armBFAuxInt(16, 16)] w) x2:(MOVBstoreidx ptr0 idx0 (UBFX [armBFAuxInt(24, 8)] w) mem))))
  7638  	// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0, x1, x2)
  7639  	// result: (MOVWstoreidx ptr0 idx0 (REVW <w.Type> w) mem)
  7640  	for {
  7641  		if auxIntToInt32(v.AuxInt) != 3 {
  7642  			break
  7643  		}
  7644  		s := auxToSym(v.Aux)
  7645  		p := v_0
  7646  		w := v_1
  7647  		x0 := v_2
  7648  		if x0.Op != OpARM64MOVBstore || auxIntToInt32(x0.AuxInt) != 2 || auxToSym(x0.Aux) != s {
  7649  			break
  7650  		}
  7651  		_ = x0.Args[2]
  7652  		if p != x0.Args[0] {
  7653  			break
  7654  		}
  7655  		x0_1 := x0.Args[1]
  7656  		if x0_1.Op != OpARM64UBFX || auxIntToArm64BitField(x0_1.AuxInt) != armBFAuxInt(8, 24) || w != x0_1.Args[0] {
  7657  			break
  7658  		}
  7659  		x1 := x0.Args[2]
  7660  		if x1.Op != OpARM64MOVBstore || auxIntToInt32(x1.AuxInt) != 1 || auxToSym(x1.Aux) != s {
  7661  			break
  7662  		}
  7663  		_ = x1.Args[2]
  7664  		p1 := x1.Args[0]
  7665  		if p1.Op != OpARM64ADD {
  7666  			break
  7667  		}
  7668  		_ = p1.Args[1]
  7669  		p1_0 := p1.Args[0]
  7670  		p1_1 := p1.Args[1]
  7671  		for _i0 := 0; _i0 <= 1; _i0, p1_0, p1_1 = _i0+1, p1_1, p1_0 {
  7672  			ptr1 := p1_0
  7673  			idx1 := p1_1
  7674  			x1_1 := x1.Args[1]
  7675  			if x1_1.Op != OpARM64UBFX || auxIntToArm64BitField(x1_1.AuxInt) != armBFAuxInt(16, 16) || w != x1_1.Args[0] {
  7676  				continue
  7677  			}
  7678  			x2 := x1.Args[2]
  7679  			if x2.Op != OpARM64MOVBstoreidx {
  7680  				continue
  7681  			}
  7682  			mem := x2.Args[3]
  7683  			ptr0 := x2.Args[0]
  7684  			idx0 := x2.Args[1]
  7685  			x2_2 := x2.Args[2]
  7686  			if x2_2.Op != OpARM64UBFX || auxIntToArm64BitField(x2_2.AuxInt) != armBFAuxInt(24, 8) || w != x2_2.Args[0] || !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0, x1, x2)) {
  7687  				continue
  7688  			}
  7689  			v.reset(OpARM64MOVWstoreidx)
  7690  			v0 := b.NewValue0(x1.Pos, OpARM64REVW, w.Type)
  7691  			v0.AddArg(w)
  7692  			v.AddArg4(ptr0, idx0, v0, mem)
  7693  			return true
  7694  		}
  7695  		break
  7696  	}
  7697  	// match: (MOVBstore [i] {s} ptr w x0:(MOVBstore [i-1] {s} ptr (SRLconst [8] (MOVDreg w)) x1:(MOVBstore [i-2] {s} ptr (SRLconst [16] (MOVDreg w)) x2:(MOVBstore [i-3] {s} ptr (SRLconst [24] (MOVDreg w)) mem))))
  7698  	// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0, x1, x2)
  7699  	// result: (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
  7700  	for {
  7701  		i := auxIntToInt32(v.AuxInt)
  7702  		s := auxToSym(v.Aux)
  7703  		ptr := v_0
  7704  		w := v_1
  7705  		x0 := v_2
  7706  		if x0.Op != OpARM64MOVBstore || auxIntToInt32(x0.AuxInt) != i-1 || auxToSym(x0.Aux) != s {
  7707  			break
  7708  		}
  7709  		_ = x0.Args[2]
  7710  		if ptr != x0.Args[0] {
  7711  			break
  7712  		}
  7713  		x0_1 := x0.Args[1]
  7714  		if x0_1.Op != OpARM64SRLconst || auxIntToInt64(x0_1.AuxInt) != 8 {
  7715  			break
  7716  		}
  7717  		x0_1_0 := x0_1.Args[0]
  7718  		if x0_1_0.Op != OpARM64MOVDreg || w != x0_1_0.Args[0] {
  7719  			break
  7720  		}
  7721  		x1 := x0.Args[2]
  7722  		if x1.Op != OpARM64MOVBstore || auxIntToInt32(x1.AuxInt) != i-2 || auxToSym(x1.Aux) != s {
  7723  			break
  7724  		}
  7725  		_ = x1.Args[2]
  7726  		if ptr != x1.Args[0] {
  7727  			break
  7728  		}
  7729  		x1_1 := x1.Args[1]
  7730  		if x1_1.Op != OpARM64SRLconst || auxIntToInt64(x1_1.AuxInt) != 16 {
  7731  			break
  7732  		}
  7733  		x1_1_0 := x1_1.Args[0]
  7734  		if x1_1_0.Op != OpARM64MOVDreg || w != x1_1_0.Args[0] {
  7735  			break
  7736  		}
  7737  		x2 := x1.Args[2]
  7738  		if x2.Op != OpARM64MOVBstore || auxIntToInt32(x2.AuxInt) != i-3 || auxToSym(x2.Aux) != s {
  7739  			break
  7740  		}
  7741  		mem := x2.Args[2]
  7742  		if ptr != x2.Args[0] {
  7743  			break
  7744  		}
  7745  		x2_1 := x2.Args[1]
  7746  		if x2_1.Op != OpARM64SRLconst || auxIntToInt64(x2_1.AuxInt) != 24 {
  7747  			break
  7748  		}
  7749  		x2_1_0 := x2_1.Args[0]
  7750  		if x2_1_0.Op != OpARM64MOVDreg || w != x2_1_0.Args[0] || !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0, x1, x2)) {
  7751  			break
  7752  		}
  7753  		v.reset(OpARM64MOVWstore)
  7754  		v.AuxInt = int32ToAuxInt(i - 3)
  7755  		v.Aux = symToAux(s)
  7756  		v0 := b.NewValue0(x2.Pos, OpARM64REVW, w.Type)
  7757  		v0.AddArg(w)
  7758  		v.AddArg3(ptr, v0, mem)
  7759  		return true
  7760  	}
  7761  	// match: (MOVBstore [3] {s} p w x0:(MOVBstore [2] {s} p (SRLconst [8] (MOVDreg w)) x1:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (SRLconst [16] (MOVDreg w)) x2:(MOVBstoreidx ptr0 idx0 (SRLconst [24] (MOVDreg w)) mem))))
  7762  	// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0, x1, x2)
  7763  	// result: (MOVWstoreidx ptr0 idx0 (REVW <w.Type> w) mem)
  7764  	for {
  7765  		if auxIntToInt32(v.AuxInt) != 3 {
  7766  			break
  7767  		}
  7768  		s := auxToSym(v.Aux)
  7769  		p := v_0
  7770  		w := v_1
  7771  		x0 := v_2
  7772  		if x0.Op != OpARM64MOVBstore || auxIntToInt32(x0.AuxInt) != 2 || auxToSym(x0.Aux) != s {
  7773  			break
  7774  		}
  7775  		_ = x0.Args[2]
  7776  		if p != x0.Args[0] {
  7777  			break
  7778  		}
  7779  		x0_1 := x0.Args[1]
  7780  		if x0_1.Op != OpARM64SRLconst || auxIntToInt64(x0_1.AuxInt) != 8 {
  7781  			break
  7782  		}
  7783  		x0_1_0 := x0_1.Args[0]
  7784  		if x0_1_0.Op != OpARM64MOVDreg || w != x0_1_0.Args[0] {
  7785  			break
  7786  		}
  7787  		x1 := x0.Args[2]
  7788  		if x1.Op != OpARM64MOVBstore || auxIntToInt32(x1.AuxInt) != 1 || auxToSym(x1.Aux) != s {
  7789  			break
  7790  		}
  7791  		_ = x1.Args[2]
  7792  		p1 := x1.Args[0]
  7793  		if p1.Op != OpARM64ADD {
  7794  			break
  7795  		}
  7796  		_ = p1.Args[1]
  7797  		p1_0 := p1.Args[0]
  7798  		p1_1 := p1.Args[1]
  7799  		for _i0 := 0; _i0 <= 1; _i0, p1_0, p1_1 = _i0+1, p1_1, p1_0 {
  7800  			ptr1 := p1_0
  7801  			idx1 := p1_1
  7802  			x1_1 := x1.Args[1]
  7803  			if x1_1.Op != OpARM64SRLconst || auxIntToInt64(x1_1.AuxInt) != 16 {
  7804  				continue
  7805  			}
  7806  			x1_1_0 := x1_1.Args[0]
  7807  			if x1_1_0.Op != OpARM64MOVDreg || w != x1_1_0.Args[0] {
  7808  				continue
  7809  			}
  7810  			x2 := x1.Args[2]
  7811  			if x2.Op != OpARM64MOVBstoreidx {
  7812  				continue
  7813  			}
  7814  			mem := x2.Args[3]
  7815  			ptr0 := x2.Args[0]
  7816  			idx0 := x2.Args[1]
  7817  			x2_2 := x2.Args[2]
  7818  			if x2_2.Op != OpARM64SRLconst || auxIntToInt64(x2_2.AuxInt) != 24 {
  7819  				continue
  7820  			}
  7821  			x2_2_0 := x2_2.Args[0]
  7822  			if x2_2_0.Op != OpARM64MOVDreg || w != x2_2_0.Args[0] || !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0, x1, x2)) {
  7823  				continue
  7824  			}
  7825  			v.reset(OpARM64MOVWstoreidx)
  7826  			v0 := b.NewValue0(x1.Pos, OpARM64REVW, w.Type)
  7827  			v0.AddArg(w)
  7828  			v.AddArg4(ptr0, idx0, v0, mem)
  7829  			return true
  7830  		}
  7831  		break
  7832  	}
  7833  	// match: (MOVBstore [i] {s} ptr w x0:(MOVBstore [i-1] {s} ptr (SRLconst [8] w) x1:(MOVBstore [i-2] {s} ptr (SRLconst [16] w) x2:(MOVBstore [i-3] {s} ptr (SRLconst [24] w) mem))))
  7834  	// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0, x1, x2)
  7835  	// result: (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
  7836  	for {
  7837  		i := auxIntToInt32(v.AuxInt)
  7838  		s := auxToSym(v.Aux)
  7839  		ptr := v_0
  7840  		w := v_1
  7841  		x0 := v_2
  7842  		if x0.Op != OpARM64MOVBstore || auxIntToInt32(x0.AuxInt) != i-1 || auxToSym(x0.Aux) != s {
  7843  			break
  7844  		}
  7845  		_ = x0.Args[2]
  7846  		if ptr != x0.Args[0] {
  7847  			break
  7848  		}
  7849  		x0_1 := x0.Args[1]
  7850  		if x0_1.Op != OpARM64SRLconst || auxIntToInt64(x0_1.AuxInt) != 8 || w != x0_1.Args[0] {
  7851  			break
  7852  		}
  7853  		x1 := x0.Args[2]
  7854  		if x1.Op != OpARM64MOVBstore || auxIntToInt32(x1.AuxInt) != i-2 || auxToSym(x1.Aux) != s {
  7855  			break
  7856  		}
  7857  		_ = x1.Args[2]
  7858  		if ptr != x1.Args[0] {
  7859  			break
  7860  		}
  7861  		x1_1 := x1.Args[1]
  7862  		if x1_1.Op != OpARM64SRLconst || auxIntToInt64(x1_1.AuxInt) != 16 || w != x1_1.Args[0] {
  7863  			break
  7864  		}
  7865  		x2 := x1.Args[2]
  7866  		if x2.Op != OpARM64MOVBstore || auxIntToInt32(x2.AuxInt) != i-3 || auxToSym(x2.Aux) != s {
  7867  			break
  7868  		}
  7869  		mem := x2.Args[2]
  7870  		if ptr != x2.Args[0] {
  7871  			break
  7872  		}
  7873  		x2_1 := x2.Args[1]
  7874  		if x2_1.Op != OpARM64SRLconst || auxIntToInt64(x2_1.AuxInt) != 24 || w != x2_1.Args[0] || !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0, x1, x2)) {
  7875  			break
  7876  		}
  7877  		v.reset(OpARM64MOVWstore)
  7878  		v.AuxInt = int32ToAuxInt(i - 3)
  7879  		v.Aux = symToAux(s)
  7880  		v0 := b.NewValue0(x2.Pos, OpARM64REVW, w.Type)
  7881  		v0.AddArg(w)
  7882  		v.AddArg3(ptr, v0, mem)
  7883  		return true
  7884  	}
  7885  	// match: (MOVBstore [3] {s} p w x0:(MOVBstore [2] {s} p (SRLconst [8] w) x1:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (SRLconst [16] w) x2:(MOVBstoreidx ptr0 idx0 (SRLconst [24] w) mem))))
  7886  	// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0, x1, x2)
  7887  	// result: (MOVWstoreidx ptr0 idx0 (REVW <w.Type> w) mem)
  7888  	for {
  7889  		if auxIntToInt32(v.AuxInt) != 3 {
  7890  			break
  7891  		}
  7892  		s := auxToSym(v.Aux)
  7893  		p := v_0
  7894  		w := v_1
  7895  		x0 := v_2
  7896  		if x0.Op != OpARM64MOVBstore || auxIntToInt32(x0.AuxInt) != 2 || auxToSym(x0.Aux) != s {
  7897  			break
  7898  		}
  7899  		_ = x0.Args[2]
  7900  		if p != x0.Args[0] {
  7901  			break
  7902  		}
  7903  		x0_1 := x0.Args[1]
  7904  		if x0_1.Op != OpARM64SRLconst || auxIntToInt64(x0_1.AuxInt) != 8 || w != x0_1.Args[0] {
  7905  			break
  7906  		}
  7907  		x1 := x0.Args[2]
  7908  		if x1.Op != OpARM64MOVBstore || auxIntToInt32(x1.AuxInt) != 1 || auxToSym(x1.Aux) != s {
  7909  			break
  7910  		}
  7911  		_ = x1.Args[2]
  7912  		p1 := x1.Args[0]
  7913  		if p1.Op != OpARM64ADD {
  7914  			break
  7915  		}
  7916  		_ = p1.Args[1]
  7917  		p1_0 := p1.Args[0]
  7918  		p1_1 := p1.Args[1]
  7919  		for _i0 := 0; _i0 <= 1; _i0, p1_0, p1_1 = _i0+1, p1_1, p1_0 {
  7920  			ptr1 := p1_0
  7921  			idx1 := p1_1
  7922  			x1_1 := x1.Args[1]
  7923  			if x1_1.Op != OpARM64SRLconst || auxIntToInt64(x1_1.AuxInt) != 16 || w != x1_1.Args[0] {
  7924  				continue
  7925  			}
  7926  			x2 := x1.Args[2]
  7927  			if x2.Op != OpARM64MOVBstoreidx {
  7928  				continue
  7929  			}
  7930  			mem := x2.Args[3]
  7931  			ptr0 := x2.Args[0]
  7932  			idx0 := x2.Args[1]
  7933  			x2_2 := x2.Args[2]
  7934  			if x2_2.Op != OpARM64SRLconst || auxIntToInt64(x2_2.AuxInt) != 24 || w != x2_2.Args[0] || !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0, x1, x2)) {
  7935  				continue
  7936  			}
  7937  			v.reset(OpARM64MOVWstoreidx)
  7938  			v0 := b.NewValue0(x1.Pos, OpARM64REVW, w.Type)
  7939  			v0.AddArg(w)
  7940  			v.AddArg4(ptr0, idx0, v0, mem)
  7941  			return true
  7942  		}
  7943  		break
  7944  	}
  7945  	// match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (SRLconst [8] w) mem))
  7946  	// cond: x.Uses == 1 && clobber(x)
  7947  	// result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
  7948  	for {
  7949  		i := auxIntToInt32(v.AuxInt)
  7950  		s := auxToSym(v.Aux)
  7951  		ptr := v_0
  7952  		w := v_1
  7953  		x := v_2
  7954  		if x.Op != OpARM64MOVBstore || auxIntToInt32(x.AuxInt) != i-1 || auxToSym(x.Aux) != s {
  7955  			break
  7956  		}
  7957  		mem := x.Args[2]
  7958  		if ptr != x.Args[0] {
  7959  			break
  7960  		}
  7961  		x_1 := x.Args[1]
  7962  		if x_1.Op != OpARM64SRLconst || auxIntToInt64(x_1.AuxInt) != 8 || w != x_1.Args[0] || !(x.Uses == 1 && clobber(x)) {
  7963  			break
  7964  		}
  7965  		v.reset(OpARM64MOVHstore)
  7966  		v.AuxInt = int32ToAuxInt(i - 1)
  7967  		v.Aux = symToAux(s)
  7968  		v0 := b.NewValue0(x.Pos, OpARM64REV16W, w.Type)
  7969  		v0.AddArg(w)
  7970  		v.AddArg3(ptr, v0, mem)
  7971  		return true
  7972  	}
  7973  	// match: (MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (SRLconst [8] w) mem))
  7974  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
  7975  	// result: (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
  7976  	for {
  7977  		if auxIntToInt32(v.AuxInt) != 1 {
  7978  			break
  7979  		}
  7980  		s := auxToSym(v.Aux)
  7981  		if v_0.Op != OpARM64ADD {
  7982  			break
  7983  		}
  7984  		_ = v_0.Args[1]
  7985  		v_0_0 := v_0.Args[0]
  7986  		v_0_1 := v_0.Args[1]
  7987  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7988  			ptr1 := v_0_0
  7989  			idx1 := v_0_1
  7990  			w := v_1
  7991  			x := v_2
  7992  			if x.Op != OpARM64MOVBstoreidx {
  7993  				continue
  7994  			}
  7995  			mem := x.Args[3]
  7996  			ptr0 := x.Args[0]
  7997  			idx0 := x.Args[1]
  7998  			x_2 := x.Args[2]
  7999  			if x_2.Op != OpARM64SRLconst || auxIntToInt64(x_2.AuxInt) != 8 || w != x_2.Args[0] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
  8000  				continue
  8001  			}
  8002  			v.reset(OpARM64MOVHstoreidx)
  8003  			v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
  8004  			v0.AddArg(w)
  8005  			v.AddArg4(ptr0, idx0, v0, mem)
  8006  			return true
  8007  		}
  8008  		break
  8009  	}
  8010  	// match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (UBFX [armBFAuxInt(8, 8)] w) mem))
  8011  	// cond: x.Uses == 1 && clobber(x)
  8012  	// result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
  8013  	for {
  8014  		i := auxIntToInt32(v.AuxInt)
  8015  		s := auxToSym(v.Aux)
  8016  		ptr := v_0
  8017  		w := v_1
  8018  		x := v_2
  8019  		if x.Op != OpARM64MOVBstore || auxIntToInt32(x.AuxInt) != i-1 || auxToSym(x.Aux) != s {
  8020  			break
  8021  		}
  8022  		mem := x.Args[2]
  8023  		if ptr != x.Args[0] {
  8024  			break
  8025  		}
  8026  		x_1 := x.Args[1]
  8027  		if x_1.Op != OpARM64UBFX || auxIntToArm64BitField(x_1.AuxInt) != armBFAuxInt(8, 8) || w != x_1.Args[0] || !(x.Uses == 1 && clobber(x)) {
  8028  			break
  8029  		}
  8030  		v.reset(OpARM64MOVHstore)
  8031  		v.AuxInt = int32ToAuxInt(i - 1)
  8032  		v.Aux = symToAux(s)
  8033  		v0 := b.NewValue0(x.Pos, OpARM64REV16W, w.Type)
  8034  		v0.AddArg(w)
  8035  		v.AddArg3(ptr, v0, mem)
  8036  		return true
  8037  	}
  8038  	// match: (MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (UBFX [armBFAuxInt(8, 8)] w) mem))
  8039  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
  8040  	// result: (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
  8041  	for {
  8042  		if auxIntToInt32(v.AuxInt) != 1 {
  8043  			break
  8044  		}
  8045  		s := auxToSym(v.Aux)
  8046  		if v_0.Op != OpARM64ADD {
  8047  			break
  8048  		}
  8049  		_ = v_0.Args[1]
  8050  		v_0_0 := v_0.Args[0]
  8051  		v_0_1 := v_0.Args[1]
  8052  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  8053  			ptr1 := v_0_0
  8054  			idx1 := v_0_1
  8055  			w := v_1
  8056  			x := v_2
  8057  			if x.Op != OpARM64MOVBstoreidx {
  8058  				continue
  8059  			}
  8060  			mem := x.Args[3]
  8061  			ptr0 := x.Args[0]
  8062  			idx0 := x.Args[1]
  8063  			x_2 := x.Args[2]
  8064  			if x_2.Op != OpARM64UBFX || auxIntToArm64BitField(x_2.AuxInt) != armBFAuxInt(8, 8) || w != x_2.Args[0] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
  8065  				continue
  8066  			}
  8067  			v.reset(OpARM64MOVHstoreidx)
  8068  			v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
  8069  			v0.AddArg(w)
  8070  			v.AddArg4(ptr0, idx0, v0, mem)
  8071  			return true
  8072  		}
  8073  		break
  8074  	}
  8075  	// match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (SRLconst [8] (MOVDreg w)) mem))
  8076  	// cond: x.Uses == 1 && clobber(x)
  8077  	// result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
  8078  	for {
  8079  		i := auxIntToInt32(v.AuxInt)
  8080  		s := auxToSym(v.Aux)
  8081  		ptr := v_0
  8082  		w := v_1
  8083  		x := v_2
  8084  		if x.Op != OpARM64MOVBstore || auxIntToInt32(x.AuxInt) != i-1 || auxToSym(x.Aux) != s {
  8085  			break
  8086  		}
  8087  		mem := x.Args[2]
  8088  		if ptr != x.Args[0] {
  8089  			break
  8090  		}
  8091  		x_1 := x.Args[1]
  8092  		if x_1.Op != OpARM64SRLconst || auxIntToInt64(x_1.AuxInt) != 8 {
  8093  			break
  8094  		}
  8095  		x_1_0 := x_1.Args[0]
  8096  		if x_1_0.Op != OpARM64MOVDreg || w != x_1_0.Args[0] || !(x.Uses == 1 && clobber(x)) {
  8097  			break
  8098  		}
  8099  		v.reset(OpARM64MOVHstore)
  8100  		v.AuxInt = int32ToAuxInt(i - 1)
  8101  		v.Aux = symToAux(s)
  8102  		v0 := b.NewValue0(x.Pos, OpARM64REV16W, w.Type)
  8103  		v0.AddArg(w)
  8104  		v.AddArg3(ptr, v0, mem)
  8105  		return true
  8106  	}
  8107  	// match: (MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (SRLconst [8] (MOVDreg w)) mem))
  8108  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
  8109  	// result: (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
  8110  	for {
  8111  		if auxIntToInt32(v.AuxInt) != 1 {
  8112  			break
  8113  		}
  8114  		s := auxToSym(v.Aux)
  8115  		if v_0.Op != OpARM64ADD {
  8116  			break
  8117  		}
  8118  		_ = v_0.Args[1]
  8119  		v_0_0 := v_0.Args[0]
  8120  		v_0_1 := v_0.Args[1]
  8121  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  8122  			ptr1 := v_0_0
  8123  			idx1 := v_0_1
  8124  			w := v_1
  8125  			x := v_2
  8126  			if x.Op != OpARM64MOVBstoreidx {
  8127  				continue
  8128  			}
  8129  			mem := x.Args[3]
  8130  			ptr0 := x.Args[0]
  8131  			idx0 := x.Args[1]
  8132  			x_2 := x.Args[2]
  8133  			if x_2.Op != OpARM64SRLconst || auxIntToInt64(x_2.AuxInt) != 8 {
  8134  				continue
  8135  			}
  8136  			x_2_0 := x_2.Args[0]
  8137  			if x_2_0.Op != OpARM64MOVDreg || w != x_2_0.Args[0] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
  8138  				continue
  8139  			}
  8140  			v.reset(OpARM64MOVHstoreidx)
  8141  			v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
  8142  			v0.AddArg(w)
  8143  			v.AddArg4(ptr0, idx0, v0, mem)
  8144  			return true
  8145  		}
  8146  		break
  8147  	}
  8148  	// match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (UBFX [armBFAuxInt(8, 24)] w) mem))
  8149  	// cond: x.Uses == 1 && clobber(x)
  8150  	// result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
  8151  	for {
  8152  		i := auxIntToInt32(v.AuxInt)
  8153  		s := auxToSym(v.Aux)
  8154  		ptr := v_0
  8155  		w := v_1
  8156  		x := v_2
  8157  		if x.Op != OpARM64MOVBstore || auxIntToInt32(x.AuxInt) != i-1 || auxToSym(x.Aux) != s {
  8158  			break
  8159  		}
  8160  		mem := x.Args[2]
  8161  		if ptr != x.Args[0] {
  8162  			break
  8163  		}
  8164  		x_1 := x.Args[1]
  8165  		if x_1.Op != OpARM64UBFX || auxIntToArm64BitField(x_1.AuxInt) != armBFAuxInt(8, 24) || w != x_1.Args[0] || !(x.Uses == 1 && clobber(x)) {
  8166  			break
  8167  		}
  8168  		v.reset(OpARM64MOVHstore)
  8169  		v.AuxInt = int32ToAuxInt(i - 1)
  8170  		v.Aux = symToAux(s)
  8171  		v0 := b.NewValue0(x.Pos, OpARM64REV16W, w.Type)
  8172  		v0.AddArg(w)
  8173  		v.AddArg3(ptr, v0, mem)
  8174  		return true
  8175  	}
  8176  	// match: (MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (UBFX [armBFAuxInt(8, 24)] w) mem))
  8177  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
  8178  	// result: (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
  8179  	for {
  8180  		if auxIntToInt32(v.AuxInt) != 1 {
  8181  			break
  8182  		}
  8183  		s := auxToSym(v.Aux)
  8184  		if v_0.Op != OpARM64ADD {
  8185  			break
  8186  		}
  8187  		_ = v_0.Args[1]
  8188  		v_0_0 := v_0.Args[0]
  8189  		v_0_1 := v_0.Args[1]
  8190  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  8191  			ptr1 := v_0_0
  8192  			idx1 := v_0_1
  8193  			w := v_1
  8194  			x := v_2
  8195  			if x.Op != OpARM64MOVBstoreidx {
  8196  				continue
  8197  			}
  8198  			mem := x.Args[3]
  8199  			ptr0 := x.Args[0]
  8200  			idx0 := x.Args[1]
  8201  			x_2 := x.Args[2]
  8202  			if x_2.Op != OpARM64UBFX || auxIntToArm64BitField(x_2.AuxInt) != armBFAuxInt(8, 24) || w != x_2.Args[0] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
  8203  				continue
  8204  			}
  8205  			v.reset(OpARM64MOVHstoreidx)
  8206  			v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
  8207  			v0.AddArg(w)
  8208  			v.AddArg4(ptr0, idx0, v0, mem)
  8209  			return true
  8210  		}
  8211  		break
  8212  	}
  8213  	return false
  8214  }
  8215  func rewriteValueARM64_OpARM64MOVBstoreidx(v *Value) bool {
  8216  	v_3 := v.Args[3]
  8217  	v_2 := v.Args[2]
  8218  	v_1 := v.Args[1]
  8219  	v_0 := v.Args[0]
  8220  	b := v.Block
  8221  	// match: (MOVBstoreidx ptr (MOVDconst [c]) val mem)
  8222  	// cond: is32Bit(c)
  8223  	// result: (MOVBstore [int32(c)] ptr val mem)
  8224  	for {
  8225  		ptr := v_0
  8226  		if v_1.Op != OpARM64MOVDconst {
  8227  			break
  8228  		}
  8229  		c := auxIntToInt64(v_1.AuxInt)
  8230  		val := v_2
  8231  		mem := v_3
  8232  		if !(is32Bit(c)) {
  8233  			break
  8234  		}
  8235  		v.reset(OpARM64MOVBstore)
  8236  		v.AuxInt = int32ToAuxInt(int32(c))
  8237  		v.AddArg3(ptr, val, mem)
  8238  		return true
  8239  	}
  8240  	// match: (MOVBstoreidx (MOVDconst [c]) idx val mem)
  8241  	// cond: is32Bit(c)
  8242  	// result: (MOVBstore [int32(c)] idx val mem)
  8243  	for {
  8244  		if v_0.Op != OpARM64MOVDconst {
  8245  			break
  8246  		}
  8247  		c := auxIntToInt64(v_0.AuxInt)
  8248  		idx := v_1
  8249  		val := v_2
  8250  		mem := v_3
  8251  		if !(is32Bit(c)) {
  8252  			break
  8253  		}
  8254  		v.reset(OpARM64MOVBstore)
  8255  		v.AuxInt = int32ToAuxInt(int32(c))
  8256  		v.AddArg3(idx, val, mem)
  8257  		return true
  8258  	}
  8259  	// match: (MOVBstoreidx ptr idx (MOVDconst [0]) mem)
  8260  	// result: (MOVBstorezeroidx ptr idx mem)
  8261  	for {
  8262  		ptr := v_0
  8263  		idx := v_1
  8264  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != 0 {
  8265  			break
  8266  		}
  8267  		mem := v_3
  8268  		v.reset(OpARM64MOVBstorezeroidx)
  8269  		v.AddArg3(ptr, idx, mem)
  8270  		return true
  8271  	}
  8272  	// match: (MOVBstoreidx ptr idx (MOVBreg x) mem)
  8273  	// result: (MOVBstoreidx ptr idx x mem)
  8274  	for {
  8275  		ptr := v_0
  8276  		idx := v_1
  8277  		if v_2.Op != OpARM64MOVBreg {
  8278  			break
  8279  		}
  8280  		x := v_2.Args[0]
  8281  		mem := v_3
  8282  		v.reset(OpARM64MOVBstoreidx)
  8283  		v.AddArg4(ptr, idx, x, mem)
  8284  		return true
  8285  	}
  8286  	// match: (MOVBstoreidx ptr idx (MOVBUreg x) mem)
  8287  	// result: (MOVBstoreidx ptr idx x mem)
  8288  	for {
  8289  		ptr := v_0
  8290  		idx := v_1
  8291  		if v_2.Op != OpARM64MOVBUreg {
  8292  			break
  8293  		}
  8294  		x := v_2.Args[0]
  8295  		mem := v_3
  8296  		v.reset(OpARM64MOVBstoreidx)
  8297  		v.AddArg4(ptr, idx, x, mem)
  8298  		return true
  8299  	}
  8300  	// match: (MOVBstoreidx ptr idx (MOVHreg x) mem)
  8301  	// result: (MOVBstoreidx ptr idx x mem)
  8302  	for {
  8303  		ptr := v_0
  8304  		idx := v_1
  8305  		if v_2.Op != OpARM64MOVHreg {
  8306  			break
  8307  		}
  8308  		x := v_2.Args[0]
  8309  		mem := v_3
  8310  		v.reset(OpARM64MOVBstoreidx)
  8311  		v.AddArg4(ptr, idx, x, mem)
  8312  		return true
  8313  	}
  8314  	// match: (MOVBstoreidx ptr idx (MOVHUreg x) mem)
  8315  	// result: (MOVBstoreidx ptr idx x mem)
  8316  	for {
  8317  		ptr := v_0
  8318  		idx := v_1
  8319  		if v_2.Op != OpARM64MOVHUreg {
  8320  			break
  8321  		}
  8322  		x := v_2.Args[0]
  8323  		mem := v_3
  8324  		v.reset(OpARM64MOVBstoreidx)
  8325  		v.AddArg4(ptr, idx, x, mem)
  8326  		return true
  8327  	}
  8328  	// match: (MOVBstoreidx ptr idx (MOVWreg x) mem)
  8329  	// result: (MOVBstoreidx ptr idx x mem)
  8330  	for {
  8331  		ptr := v_0
  8332  		idx := v_1
  8333  		if v_2.Op != OpARM64MOVWreg {
  8334  			break
  8335  		}
  8336  		x := v_2.Args[0]
  8337  		mem := v_3
  8338  		v.reset(OpARM64MOVBstoreidx)
  8339  		v.AddArg4(ptr, idx, x, mem)
  8340  		return true
  8341  	}
  8342  	// match: (MOVBstoreidx ptr idx (MOVWUreg x) mem)
  8343  	// result: (MOVBstoreidx ptr idx x mem)
  8344  	for {
  8345  		ptr := v_0
  8346  		idx := v_1
  8347  		if v_2.Op != OpARM64MOVWUreg {
  8348  			break
  8349  		}
  8350  		x := v_2.Args[0]
  8351  		mem := v_3
  8352  		v.reset(OpARM64MOVBstoreidx)
  8353  		v.AddArg4(ptr, idx, x, mem)
  8354  		return true
  8355  	}
  8356  	// match: (MOVBstoreidx ptr (ADDconst [1] idx) (SRLconst [8] w) x:(MOVBstoreidx ptr idx w mem))
  8357  	// cond: x.Uses == 1 && clobber(x)
  8358  	// result: (MOVHstoreidx ptr idx w mem)
  8359  	for {
  8360  		ptr := v_0
  8361  		if v_1.Op != OpARM64ADDconst || auxIntToInt64(v_1.AuxInt) != 1 {
  8362  			break
  8363  		}
  8364  		idx := v_1.Args[0]
  8365  		if v_2.Op != OpARM64SRLconst || auxIntToInt64(v_2.AuxInt) != 8 {
  8366  			break
  8367  		}
  8368  		w := v_2.Args[0]
  8369  		x := v_3
  8370  		if x.Op != OpARM64MOVBstoreidx {
  8371  			break
  8372  		}
  8373  		mem := x.Args[3]
  8374  		if ptr != x.Args[0] || idx != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) {
  8375  			break
  8376  		}
  8377  		v.reset(OpARM64MOVHstoreidx)
  8378  		v.AddArg4(ptr, idx, w, mem)
  8379  		return true
  8380  	}
  8381  	// match: (MOVBstoreidx ptr (ADDconst [3] idx) w x0:(MOVBstoreidx ptr (ADDconst [2] idx) (UBFX [armBFAuxInt(8, 24)] w) x1:(MOVBstoreidx ptr (ADDconst [1] idx) (UBFX [armBFAuxInt(16, 16)] w) x2:(MOVBstoreidx ptr idx (UBFX [armBFAuxInt(24, 8)] w) mem))))
  8382  	// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0, x1, x2)
  8383  	// result: (MOVWstoreidx ptr idx (REVW <w.Type> w) mem)
  8384  	for {
  8385  		ptr := v_0
  8386  		if v_1.Op != OpARM64ADDconst || auxIntToInt64(v_1.AuxInt) != 3 {
  8387  			break
  8388  		}
  8389  		idx := v_1.Args[0]
  8390  		w := v_2
  8391  		x0 := v_3
  8392  		if x0.Op != OpARM64MOVBstoreidx {
  8393  			break
  8394  		}
  8395  		_ = x0.Args[3]
  8396  		if ptr != x0.Args[0] {
  8397  			break
  8398  		}
  8399  		x0_1 := x0.Args[1]
  8400  		if x0_1.Op != OpARM64ADDconst || auxIntToInt64(x0_1.AuxInt) != 2 || idx != x0_1.Args[0] {
  8401  			break
  8402  		}
  8403  		x0_2 := x0.Args[2]
  8404  		if x0_2.Op != OpARM64UBFX || auxIntToArm64BitField(x0_2.AuxInt) != armBFAuxInt(8, 24) || w != x0_2.Args[0] {
  8405  			break
  8406  		}
  8407  		x1 := x0.Args[3]
  8408  		if x1.Op != OpARM64MOVBstoreidx {
  8409  			break
  8410  		}
  8411  		_ = x1.Args[3]
  8412  		if ptr != x1.Args[0] {
  8413  			break
  8414  		}
  8415  		x1_1 := x1.Args[1]
  8416  		if x1_1.Op != OpARM64ADDconst || auxIntToInt64(x1_1.AuxInt) != 1 || idx != x1_1.Args[0] {
  8417  			break
  8418  		}
  8419  		x1_2 := x1.Args[2]
  8420  		if x1_2.Op != OpARM64UBFX || auxIntToArm64BitField(x1_2.AuxInt) != armBFAuxInt(16, 16) || w != x1_2.Args[0] {
  8421  			break
  8422  		}
  8423  		x2 := x1.Args[3]
  8424  		if x2.Op != OpARM64MOVBstoreidx {
  8425  			break
  8426  		}
  8427  		mem := x2.Args[3]
  8428  		if ptr != x2.Args[0] || idx != x2.Args[1] {
  8429  			break
  8430  		}
  8431  		x2_2 := x2.Args[2]
  8432  		if x2_2.Op != OpARM64UBFX || auxIntToArm64BitField(x2_2.AuxInt) != armBFAuxInt(24, 8) || w != x2_2.Args[0] || !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0, x1, x2)) {
  8433  			break
  8434  		}
  8435  		v.reset(OpARM64MOVWstoreidx)
  8436  		v0 := b.NewValue0(v.Pos, OpARM64REVW, w.Type)
  8437  		v0.AddArg(w)
  8438  		v.AddArg4(ptr, idx, v0, mem)
  8439  		return true
  8440  	}
  8441  	// match: (MOVBstoreidx ptr idx w x0:(MOVBstoreidx ptr (ADDconst [1] idx) (UBFX [armBFAuxInt(8, 24)] w) x1:(MOVBstoreidx ptr (ADDconst [2] idx) (UBFX [armBFAuxInt(16, 16)] w) x2:(MOVBstoreidx ptr (ADDconst [3] idx) (UBFX [armBFAuxInt(24, 8)] w) mem))))
  8442  	// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0, x1, x2)
  8443  	// result: (MOVWstoreidx ptr idx w mem)
  8444  	for {
  8445  		ptr := v_0
  8446  		idx := v_1
  8447  		w := v_2
  8448  		x0 := v_3
  8449  		if x0.Op != OpARM64MOVBstoreidx {
  8450  			break
  8451  		}
  8452  		_ = x0.Args[3]
  8453  		if ptr != x0.Args[0] {
  8454  			break
  8455  		}
  8456  		x0_1 := x0.Args[1]
  8457  		if x0_1.Op != OpARM64ADDconst || auxIntToInt64(x0_1.AuxInt) != 1 || idx != x0_1.Args[0] {
  8458  			break
  8459  		}
  8460  		x0_2 := x0.Args[2]
  8461  		if x0_2.Op != OpARM64UBFX || auxIntToArm64BitField(x0_2.AuxInt) != armBFAuxInt(8, 24) || w != x0_2.Args[0] {
  8462  			break
  8463  		}
  8464  		x1 := x0.Args[3]
  8465  		if x1.Op != OpARM64MOVBstoreidx {
  8466  			break
  8467  		}
  8468  		_ = x1.Args[3]
  8469  		if ptr != x1.Args[0] {
  8470  			break
  8471  		}
  8472  		x1_1 := x1.Args[1]
  8473  		if x1_1.Op != OpARM64ADDconst || auxIntToInt64(x1_1.AuxInt) != 2 || idx != x1_1.Args[0] {
  8474  			break
  8475  		}
  8476  		x1_2 := x1.Args[2]
  8477  		if x1_2.Op != OpARM64UBFX || auxIntToArm64BitField(x1_2.AuxInt) != armBFAuxInt(16, 16) || w != x1_2.Args[0] {
  8478  			break
  8479  		}
  8480  		x2 := x1.Args[3]
  8481  		if x2.Op != OpARM64MOVBstoreidx {
  8482  			break
  8483  		}
  8484  		mem := x2.Args[3]
  8485  		if ptr != x2.Args[0] {
  8486  			break
  8487  		}
  8488  		x2_1 := x2.Args[1]
  8489  		if x2_1.Op != OpARM64ADDconst || auxIntToInt64(x2_1.AuxInt) != 3 || idx != x2_1.Args[0] {
  8490  			break
  8491  		}
  8492  		x2_2 := x2.Args[2]
  8493  		if x2_2.Op != OpARM64UBFX || auxIntToArm64BitField(x2_2.AuxInt) != armBFAuxInt(24, 8) || w != x2_2.Args[0] || !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0, x1, x2)) {
  8494  			break
  8495  		}
  8496  		v.reset(OpARM64MOVWstoreidx)
  8497  		v.AddArg4(ptr, idx, w, mem)
  8498  		return true
  8499  	}
  8500  	// match: (MOVBstoreidx ptr (ADDconst [1] idx) w x:(MOVBstoreidx ptr idx (UBFX [armBFAuxInt(8, 8)] w) mem))
  8501  	// cond: x.Uses == 1 && clobber(x)
  8502  	// result: (MOVHstoreidx ptr idx (REV16W <w.Type> w) mem)
  8503  	for {
  8504  		ptr := v_0
  8505  		if v_1.Op != OpARM64ADDconst || auxIntToInt64(v_1.AuxInt) != 1 {
  8506  			break
  8507  		}
  8508  		idx := v_1.Args[0]
  8509  		w := v_2
  8510  		x := v_3
  8511  		if x.Op != OpARM64MOVBstoreidx {
  8512  			break
  8513  		}
  8514  		mem := x.Args[3]
  8515  		if ptr != x.Args[0] || idx != x.Args[1] {
  8516  			break
  8517  		}
  8518  		x_2 := x.Args[2]
  8519  		if x_2.Op != OpARM64UBFX || auxIntToArm64BitField(x_2.AuxInt) != armBFAuxInt(8, 8) || w != x_2.Args[0] || !(x.Uses == 1 && clobber(x)) {
  8520  			break
  8521  		}
  8522  		v.reset(OpARM64MOVHstoreidx)
  8523  		v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
  8524  		v0.AddArg(w)
  8525  		v.AddArg4(ptr, idx, v0, mem)
  8526  		return true
  8527  	}
  8528  	// match: (MOVBstoreidx ptr idx w x:(MOVBstoreidx ptr (ADDconst [1] idx) (UBFX [armBFAuxInt(8, 8)] w) mem))
  8529  	// cond: x.Uses == 1 && clobber(x)
  8530  	// result: (MOVHstoreidx ptr idx w mem)
  8531  	for {
  8532  		ptr := v_0
  8533  		idx := v_1
  8534  		w := v_2
  8535  		x := v_3
  8536  		if x.Op != OpARM64MOVBstoreidx {
  8537  			break
  8538  		}
  8539  		mem := x.Args[3]
  8540  		if ptr != x.Args[0] {
  8541  			break
  8542  		}
  8543  		x_1 := x.Args[1]
  8544  		if x_1.Op != OpARM64ADDconst || auxIntToInt64(x_1.AuxInt) != 1 || idx != x_1.Args[0] {
  8545  			break
  8546  		}
  8547  		x_2 := x.Args[2]
  8548  		if x_2.Op != OpARM64UBFX || auxIntToArm64BitField(x_2.AuxInt) != armBFAuxInt(8, 8) || w != x_2.Args[0] || !(x.Uses == 1 && clobber(x)) {
  8549  			break
  8550  		}
  8551  		v.reset(OpARM64MOVHstoreidx)
  8552  		v.AddArg4(ptr, idx, w, mem)
  8553  		return true
  8554  	}
  8555  	return false
  8556  }
  8557  func rewriteValueARM64_OpARM64MOVBstorezero(v *Value) bool {
  8558  	v_1 := v.Args[1]
  8559  	v_0 := v.Args[0]
  8560  	b := v.Block
  8561  	config := b.Func.Config
  8562  	// match: (MOVBstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
  8563  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  8564  	// result: (MOVBstorezero [off1+int32(off2)] {sym} ptr mem)
  8565  	for {
  8566  		off1 := auxIntToInt32(v.AuxInt)
  8567  		sym := auxToSym(v.Aux)
  8568  		if v_0.Op != OpARM64ADDconst {
  8569  			break
  8570  		}
  8571  		off2 := auxIntToInt64(v_0.AuxInt)
  8572  		ptr := v_0.Args[0]
  8573  		mem := v_1
  8574  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  8575  			break
  8576  		}
  8577  		v.reset(OpARM64MOVBstorezero)
  8578  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  8579  		v.Aux = symToAux(sym)
  8580  		v.AddArg2(ptr, mem)
  8581  		return true
  8582  	}
  8583  	// match: (MOVBstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  8584  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  8585  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  8586  	for {
  8587  		off1 := auxIntToInt32(v.AuxInt)
  8588  		sym1 := auxToSym(v.Aux)
  8589  		if v_0.Op != OpARM64MOVDaddr {
  8590  			break
  8591  		}
  8592  		off2 := auxIntToInt32(v_0.AuxInt)
  8593  		sym2 := auxToSym(v_0.Aux)
  8594  		ptr := v_0.Args[0]
  8595  		mem := v_1
  8596  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  8597  			break
  8598  		}
  8599  		v.reset(OpARM64MOVBstorezero)
  8600  		v.AuxInt = int32ToAuxInt(off1 + off2)
  8601  		v.Aux = symToAux(mergeSym(sym1, sym2))
  8602  		v.AddArg2(ptr, mem)
  8603  		return true
  8604  	}
  8605  	// match: (MOVBstorezero [off] {sym} (ADD ptr idx) mem)
  8606  	// cond: off == 0 && sym == nil
  8607  	// result: (MOVBstorezeroidx ptr idx mem)
  8608  	for {
  8609  		off := auxIntToInt32(v.AuxInt)
  8610  		sym := auxToSym(v.Aux)
  8611  		if v_0.Op != OpARM64ADD {
  8612  			break
  8613  		}
  8614  		idx := v_0.Args[1]
  8615  		ptr := v_0.Args[0]
  8616  		mem := v_1
  8617  		if !(off == 0 && sym == nil) {
  8618  			break
  8619  		}
  8620  		v.reset(OpARM64MOVBstorezeroidx)
  8621  		v.AddArg3(ptr, idx, mem)
  8622  		return true
  8623  	}
  8624  	// match: (MOVBstorezero [i] {s} ptr0 x:(MOVBstorezero [j] {s} ptr1 mem))
  8625  	// cond: x.Uses == 1 && areAdjacentOffsets(int64(i),int64(j),1) && isSamePtr(ptr0, ptr1) && clobber(x)
  8626  	// result: (MOVHstorezero [int32(min(int64(i),int64(j)))] {s} ptr0 mem)
  8627  	for {
  8628  		i := auxIntToInt32(v.AuxInt)
  8629  		s := auxToSym(v.Aux)
  8630  		ptr0 := v_0
  8631  		x := v_1
  8632  		if x.Op != OpARM64MOVBstorezero {
  8633  			break
  8634  		}
  8635  		j := auxIntToInt32(x.AuxInt)
  8636  		if auxToSym(x.Aux) != s {
  8637  			break
  8638  		}
  8639  		mem := x.Args[1]
  8640  		ptr1 := x.Args[0]
  8641  		if !(x.Uses == 1 && areAdjacentOffsets(int64(i), int64(j), 1) && isSamePtr(ptr0, ptr1) && clobber(x)) {
  8642  			break
  8643  		}
  8644  		v.reset(OpARM64MOVHstorezero)
  8645  		v.AuxInt = int32ToAuxInt(int32(min(int64(i), int64(j))))
  8646  		v.Aux = symToAux(s)
  8647  		v.AddArg2(ptr0, mem)
  8648  		return true
  8649  	}
  8650  	// match: (MOVBstorezero [1] {s} (ADD ptr0 idx0) x:(MOVBstorezeroidx ptr1 idx1 mem))
  8651  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
  8652  	// result: (MOVHstorezeroidx ptr1 idx1 mem)
  8653  	for {
  8654  		if auxIntToInt32(v.AuxInt) != 1 {
  8655  			break
  8656  		}
  8657  		s := auxToSym(v.Aux)
  8658  		if v_0.Op != OpARM64ADD {
  8659  			break
  8660  		}
  8661  		_ = v_0.Args[1]
  8662  		v_0_0 := v_0.Args[0]
  8663  		v_0_1 := v_0.Args[1]
  8664  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  8665  			ptr0 := v_0_0
  8666  			idx0 := v_0_1
  8667  			x := v_1
  8668  			if x.Op != OpARM64MOVBstorezeroidx {
  8669  				continue
  8670  			}
  8671  			mem := x.Args[2]
  8672  			ptr1 := x.Args[0]
  8673  			idx1 := x.Args[1]
  8674  			if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
  8675  				continue
  8676  			}
  8677  			v.reset(OpARM64MOVHstorezeroidx)
  8678  			v.AddArg3(ptr1, idx1, mem)
  8679  			return true
  8680  		}
  8681  		break
  8682  	}
  8683  	return false
  8684  }
  8685  func rewriteValueARM64_OpARM64MOVBstorezeroidx(v *Value) bool {
  8686  	v_2 := v.Args[2]
  8687  	v_1 := v.Args[1]
  8688  	v_0 := v.Args[0]
  8689  	// match: (MOVBstorezeroidx ptr (MOVDconst [c]) mem)
  8690  	// cond: is32Bit(c)
  8691  	// result: (MOVBstorezero [int32(c)] ptr mem)
  8692  	for {
  8693  		ptr := v_0
  8694  		if v_1.Op != OpARM64MOVDconst {
  8695  			break
  8696  		}
  8697  		c := auxIntToInt64(v_1.AuxInt)
  8698  		mem := v_2
  8699  		if !(is32Bit(c)) {
  8700  			break
  8701  		}
  8702  		v.reset(OpARM64MOVBstorezero)
  8703  		v.AuxInt = int32ToAuxInt(int32(c))
  8704  		v.AddArg2(ptr, mem)
  8705  		return true
  8706  	}
  8707  	// match: (MOVBstorezeroidx (MOVDconst [c]) idx mem)
  8708  	// cond: is32Bit(c)
  8709  	// result: (MOVBstorezero [int32(c)] idx mem)
  8710  	for {
  8711  		if v_0.Op != OpARM64MOVDconst {
  8712  			break
  8713  		}
  8714  		c := auxIntToInt64(v_0.AuxInt)
  8715  		idx := v_1
  8716  		mem := v_2
  8717  		if !(is32Bit(c)) {
  8718  			break
  8719  		}
  8720  		v.reset(OpARM64MOVBstorezero)
  8721  		v.AuxInt = int32ToAuxInt(int32(c))
  8722  		v.AddArg2(idx, mem)
  8723  		return true
  8724  	}
  8725  	// match: (MOVBstorezeroidx ptr (ADDconst [1] idx) x:(MOVBstorezeroidx ptr idx mem))
  8726  	// cond: x.Uses == 1 && clobber(x)
  8727  	// result: (MOVHstorezeroidx ptr idx mem)
  8728  	for {
  8729  		ptr := v_0
  8730  		if v_1.Op != OpARM64ADDconst || auxIntToInt64(v_1.AuxInt) != 1 {
  8731  			break
  8732  		}
  8733  		idx := v_1.Args[0]
  8734  		x := v_2
  8735  		if x.Op != OpARM64MOVBstorezeroidx {
  8736  			break
  8737  		}
  8738  		mem := x.Args[2]
  8739  		if ptr != x.Args[0] || idx != x.Args[1] || !(x.Uses == 1 && clobber(x)) {
  8740  			break
  8741  		}
  8742  		v.reset(OpARM64MOVHstorezeroidx)
  8743  		v.AddArg3(ptr, idx, mem)
  8744  		return true
  8745  	}
  8746  	return false
  8747  }
  8748  func rewriteValueARM64_OpARM64MOVDload(v *Value) bool {
  8749  	v_1 := v.Args[1]
  8750  	v_0 := v.Args[0]
  8751  	b := v.Block
  8752  	config := b.Func.Config
  8753  	// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr val _))
  8754  	// result: (FMOVDfpgp val)
  8755  	for {
  8756  		off := auxIntToInt32(v.AuxInt)
  8757  		sym := auxToSym(v.Aux)
  8758  		ptr := v_0
  8759  		if v_1.Op != OpARM64FMOVDstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  8760  			break
  8761  		}
  8762  		val := v_1.Args[1]
  8763  		if ptr != v_1.Args[0] {
  8764  			break
  8765  		}
  8766  		v.reset(OpARM64FMOVDfpgp)
  8767  		v.AddArg(val)
  8768  		return true
  8769  	}
  8770  	// match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  8771  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  8772  	// result: (MOVDload [off1+int32(off2)] {sym} ptr mem)
  8773  	for {
  8774  		off1 := auxIntToInt32(v.AuxInt)
  8775  		sym := auxToSym(v.Aux)
  8776  		if v_0.Op != OpARM64ADDconst {
  8777  			break
  8778  		}
  8779  		off2 := auxIntToInt64(v_0.AuxInt)
  8780  		ptr := v_0.Args[0]
  8781  		mem := v_1
  8782  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  8783  			break
  8784  		}
  8785  		v.reset(OpARM64MOVDload)
  8786  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  8787  		v.Aux = symToAux(sym)
  8788  		v.AddArg2(ptr, mem)
  8789  		return true
  8790  	}
  8791  	// match: (MOVDload [off] {sym} (ADD ptr idx) mem)
  8792  	// cond: off == 0 && sym == nil
  8793  	// result: (MOVDloadidx ptr idx mem)
  8794  	for {
  8795  		off := auxIntToInt32(v.AuxInt)
  8796  		sym := auxToSym(v.Aux)
  8797  		if v_0.Op != OpARM64ADD {
  8798  			break
  8799  		}
  8800  		idx := v_0.Args[1]
  8801  		ptr := v_0.Args[0]
  8802  		mem := v_1
  8803  		if !(off == 0 && sym == nil) {
  8804  			break
  8805  		}
  8806  		v.reset(OpARM64MOVDloadidx)
  8807  		v.AddArg3(ptr, idx, mem)
  8808  		return true
  8809  	}
  8810  	// match: (MOVDload [off] {sym} (ADDshiftLL [3] ptr idx) mem)
  8811  	// cond: off == 0 && sym == nil
  8812  	// result: (MOVDloadidx8 ptr idx mem)
  8813  	for {
  8814  		off := auxIntToInt32(v.AuxInt)
  8815  		sym := auxToSym(v.Aux)
  8816  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 3 {
  8817  			break
  8818  		}
  8819  		idx := v_0.Args[1]
  8820  		ptr := v_0.Args[0]
  8821  		mem := v_1
  8822  		if !(off == 0 && sym == nil) {
  8823  			break
  8824  		}
  8825  		v.reset(OpARM64MOVDloadidx8)
  8826  		v.AddArg3(ptr, idx, mem)
  8827  		return true
  8828  	}
  8829  	// match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  8830  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  8831  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  8832  	for {
  8833  		off1 := auxIntToInt32(v.AuxInt)
  8834  		sym1 := auxToSym(v.Aux)
  8835  		if v_0.Op != OpARM64MOVDaddr {
  8836  			break
  8837  		}
  8838  		off2 := auxIntToInt32(v_0.AuxInt)
  8839  		sym2 := auxToSym(v_0.Aux)
  8840  		ptr := v_0.Args[0]
  8841  		mem := v_1
  8842  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  8843  			break
  8844  		}
  8845  		v.reset(OpARM64MOVDload)
  8846  		v.AuxInt = int32ToAuxInt(off1 + off2)
  8847  		v.Aux = symToAux(mergeSym(sym1, sym2))
  8848  		v.AddArg2(ptr, mem)
  8849  		return true
  8850  	}
  8851  	// match: (MOVDload [off] {sym} ptr (MOVDstorezero [off2] {sym2} ptr2 _))
  8852  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  8853  	// result: (MOVDconst [0])
  8854  	for {
  8855  		off := auxIntToInt32(v.AuxInt)
  8856  		sym := auxToSym(v.Aux)
  8857  		ptr := v_0
  8858  		if v_1.Op != OpARM64MOVDstorezero {
  8859  			break
  8860  		}
  8861  		off2 := auxIntToInt32(v_1.AuxInt)
  8862  		sym2 := auxToSym(v_1.Aux)
  8863  		ptr2 := v_1.Args[0]
  8864  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  8865  			break
  8866  		}
  8867  		v.reset(OpARM64MOVDconst)
  8868  		v.AuxInt = int64ToAuxInt(0)
  8869  		return true
  8870  	}
  8871  	// match: (MOVDload [off] {sym} (SB) _)
  8872  	// cond: symIsRO(sym)
  8873  	// result: (MOVDconst [int64(read64(sym, int64(off), config.ctxt.Arch.ByteOrder))])
  8874  	for {
  8875  		off := auxIntToInt32(v.AuxInt)
  8876  		sym := auxToSym(v.Aux)
  8877  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  8878  			break
  8879  		}
  8880  		v.reset(OpARM64MOVDconst)
  8881  		v.AuxInt = int64ToAuxInt(int64(read64(sym, int64(off), config.ctxt.Arch.ByteOrder)))
  8882  		return true
  8883  	}
  8884  	return false
  8885  }
  8886  func rewriteValueARM64_OpARM64MOVDloadidx(v *Value) bool {
  8887  	v_2 := v.Args[2]
  8888  	v_1 := v.Args[1]
  8889  	v_0 := v.Args[0]
  8890  	// match: (MOVDloadidx ptr (MOVDconst [c]) mem)
  8891  	// cond: is32Bit(c)
  8892  	// result: (MOVDload [int32(c)] ptr mem)
  8893  	for {
  8894  		ptr := v_0
  8895  		if v_1.Op != OpARM64MOVDconst {
  8896  			break
  8897  		}
  8898  		c := auxIntToInt64(v_1.AuxInt)
  8899  		mem := v_2
  8900  		if !(is32Bit(c)) {
  8901  			break
  8902  		}
  8903  		v.reset(OpARM64MOVDload)
  8904  		v.AuxInt = int32ToAuxInt(int32(c))
  8905  		v.AddArg2(ptr, mem)
  8906  		return true
  8907  	}
  8908  	// match: (MOVDloadidx (MOVDconst [c]) ptr mem)
  8909  	// cond: is32Bit(c)
  8910  	// result: (MOVDload [int32(c)] ptr mem)
  8911  	for {
  8912  		if v_0.Op != OpARM64MOVDconst {
  8913  			break
  8914  		}
  8915  		c := auxIntToInt64(v_0.AuxInt)
  8916  		ptr := v_1
  8917  		mem := v_2
  8918  		if !(is32Bit(c)) {
  8919  			break
  8920  		}
  8921  		v.reset(OpARM64MOVDload)
  8922  		v.AuxInt = int32ToAuxInt(int32(c))
  8923  		v.AddArg2(ptr, mem)
  8924  		return true
  8925  	}
  8926  	// match: (MOVDloadidx ptr (SLLconst [3] idx) mem)
  8927  	// result: (MOVDloadidx8 ptr idx mem)
  8928  	for {
  8929  		ptr := v_0
  8930  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 3 {
  8931  			break
  8932  		}
  8933  		idx := v_1.Args[0]
  8934  		mem := v_2
  8935  		v.reset(OpARM64MOVDloadidx8)
  8936  		v.AddArg3(ptr, idx, mem)
  8937  		return true
  8938  	}
  8939  	// match: (MOVDloadidx (SLLconst [3] idx) ptr mem)
  8940  	// result: (MOVDloadidx8 ptr idx mem)
  8941  	for {
  8942  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 3 {
  8943  			break
  8944  		}
  8945  		idx := v_0.Args[0]
  8946  		ptr := v_1
  8947  		mem := v_2
  8948  		v.reset(OpARM64MOVDloadidx8)
  8949  		v.AddArg3(ptr, idx, mem)
  8950  		return true
  8951  	}
  8952  	// match: (MOVDloadidx ptr idx (MOVDstorezeroidx ptr2 idx2 _))
  8953  	// cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
  8954  	// result: (MOVDconst [0])
  8955  	for {
  8956  		ptr := v_0
  8957  		idx := v_1
  8958  		if v_2.Op != OpARM64MOVDstorezeroidx {
  8959  			break
  8960  		}
  8961  		idx2 := v_2.Args[1]
  8962  		ptr2 := v_2.Args[0]
  8963  		if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
  8964  			break
  8965  		}
  8966  		v.reset(OpARM64MOVDconst)
  8967  		v.AuxInt = int64ToAuxInt(0)
  8968  		return true
  8969  	}
  8970  	return false
  8971  }
  8972  func rewriteValueARM64_OpARM64MOVDloadidx8(v *Value) bool {
  8973  	v_2 := v.Args[2]
  8974  	v_1 := v.Args[1]
  8975  	v_0 := v.Args[0]
  8976  	// match: (MOVDloadidx8 ptr (MOVDconst [c]) mem)
  8977  	// cond: is32Bit(c<<3)
  8978  	// result: (MOVDload [int32(c)<<3] ptr mem)
  8979  	for {
  8980  		ptr := v_0
  8981  		if v_1.Op != OpARM64MOVDconst {
  8982  			break
  8983  		}
  8984  		c := auxIntToInt64(v_1.AuxInt)
  8985  		mem := v_2
  8986  		if !(is32Bit(c << 3)) {
  8987  			break
  8988  		}
  8989  		v.reset(OpARM64MOVDload)
  8990  		v.AuxInt = int32ToAuxInt(int32(c) << 3)
  8991  		v.AddArg2(ptr, mem)
  8992  		return true
  8993  	}
  8994  	// match: (MOVDloadidx8 ptr idx (MOVDstorezeroidx8 ptr2 idx2 _))
  8995  	// cond: isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2)
  8996  	// result: (MOVDconst [0])
  8997  	for {
  8998  		ptr := v_0
  8999  		idx := v_1
  9000  		if v_2.Op != OpARM64MOVDstorezeroidx8 {
  9001  			break
  9002  		}
  9003  		idx2 := v_2.Args[1]
  9004  		ptr2 := v_2.Args[0]
  9005  		if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2)) {
  9006  			break
  9007  		}
  9008  		v.reset(OpARM64MOVDconst)
  9009  		v.AuxInt = int64ToAuxInt(0)
  9010  		return true
  9011  	}
  9012  	return false
  9013  }
  9014  func rewriteValueARM64_OpARM64MOVDreg(v *Value) bool {
  9015  	v_0 := v.Args[0]
  9016  	// match: (MOVDreg x)
  9017  	// cond: x.Uses == 1
  9018  	// result: (MOVDnop x)
  9019  	for {
  9020  		x := v_0
  9021  		if !(x.Uses == 1) {
  9022  			break
  9023  		}
  9024  		v.reset(OpARM64MOVDnop)
  9025  		v.AddArg(x)
  9026  		return true
  9027  	}
  9028  	// match: (MOVDreg (MOVDconst [c]))
  9029  	// result: (MOVDconst [c])
  9030  	for {
  9031  		if v_0.Op != OpARM64MOVDconst {
  9032  			break
  9033  		}
  9034  		c := auxIntToInt64(v_0.AuxInt)
  9035  		v.reset(OpARM64MOVDconst)
  9036  		v.AuxInt = int64ToAuxInt(c)
  9037  		return true
  9038  	}
  9039  	return false
  9040  }
  9041  func rewriteValueARM64_OpARM64MOVDstore(v *Value) bool {
  9042  	v_2 := v.Args[2]
  9043  	v_1 := v.Args[1]
  9044  	v_0 := v.Args[0]
  9045  	b := v.Block
  9046  	config := b.Func.Config
  9047  	// match: (MOVDstore [off] {sym} ptr (FMOVDfpgp val) mem)
  9048  	// result: (FMOVDstore [off] {sym} ptr val mem)
  9049  	for {
  9050  		off := auxIntToInt32(v.AuxInt)
  9051  		sym := auxToSym(v.Aux)
  9052  		ptr := v_0
  9053  		if v_1.Op != OpARM64FMOVDfpgp {
  9054  			break
  9055  		}
  9056  		val := v_1.Args[0]
  9057  		mem := v_2
  9058  		v.reset(OpARM64FMOVDstore)
  9059  		v.AuxInt = int32ToAuxInt(off)
  9060  		v.Aux = symToAux(sym)
  9061  		v.AddArg3(ptr, val, mem)
  9062  		return true
  9063  	}
  9064  	// match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  9065  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  9066  	// result: (MOVDstore [off1+int32(off2)] {sym} ptr val mem)
  9067  	for {
  9068  		off1 := auxIntToInt32(v.AuxInt)
  9069  		sym := auxToSym(v.Aux)
  9070  		if v_0.Op != OpARM64ADDconst {
  9071  			break
  9072  		}
  9073  		off2 := auxIntToInt64(v_0.AuxInt)
  9074  		ptr := v_0.Args[0]
  9075  		val := v_1
  9076  		mem := v_2
  9077  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  9078  			break
  9079  		}
  9080  		v.reset(OpARM64MOVDstore)
  9081  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  9082  		v.Aux = symToAux(sym)
  9083  		v.AddArg3(ptr, val, mem)
  9084  		return true
  9085  	}
  9086  	// match: (MOVDstore [off] {sym} (ADD ptr idx) val mem)
  9087  	// cond: off == 0 && sym == nil
  9088  	// result: (MOVDstoreidx ptr idx val mem)
  9089  	for {
  9090  		off := auxIntToInt32(v.AuxInt)
  9091  		sym := auxToSym(v.Aux)
  9092  		if v_0.Op != OpARM64ADD {
  9093  			break
  9094  		}
  9095  		idx := v_0.Args[1]
  9096  		ptr := v_0.Args[0]
  9097  		val := v_1
  9098  		mem := v_2
  9099  		if !(off == 0 && sym == nil) {
  9100  			break
  9101  		}
  9102  		v.reset(OpARM64MOVDstoreidx)
  9103  		v.AddArg4(ptr, idx, val, mem)
  9104  		return true
  9105  	}
  9106  	// match: (MOVDstore [off] {sym} (ADDshiftLL [3] ptr idx) val mem)
  9107  	// cond: off == 0 && sym == nil
  9108  	// result: (MOVDstoreidx8 ptr idx val mem)
  9109  	for {
  9110  		off := auxIntToInt32(v.AuxInt)
  9111  		sym := auxToSym(v.Aux)
  9112  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 3 {
  9113  			break
  9114  		}
  9115  		idx := v_0.Args[1]
  9116  		ptr := v_0.Args[0]
  9117  		val := v_1
  9118  		mem := v_2
  9119  		if !(off == 0 && sym == nil) {
  9120  			break
  9121  		}
  9122  		v.reset(OpARM64MOVDstoreidx8)
  9123  		v.AddArg4(ptr, idx, val, mem)
  9124  		return true
  9125  	}
  9126  	// match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  9127  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  9128  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  9129  	for {
  9130  		off1 := auxIntToInt32(v.AuxInt)
  9131  		sym1 := auxToSym(v.Aux)
  9132  		if v_0.Op != OpARM64MOVDaddr {
  9133  			break
  9134  		}
  9135  		off2 := auxIntToInt32(v_0.AuxInt)
  9136  		sym2 := auxToSym(v_0.Aux)
  9137  		ptr := v_0.Args[0]
  9138  		val := v_1
  9139  		mem := v_2
  9140  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  9141  			break
  9142  		}
  9143  		v.reset(OpARM64MOVDstore)
  9144  		v.AuxInt = int32ToAuxInt(off1 + off2)
  9145  		v.Aux = symToAux(mergeSym(sym1, sym2))
  9146  		v.AddArg3(ptr, val, mem)
  9147  		return true
  9148  	}
  9149  	// match: (MOVDstore [off] {sym} ptr (MOVDconst [0]) mem)
  9150  	// result: (MOVDstorezero [off] {sym} ptr mem)
  9151  	for {
  9152  		off := auxIntToInt32(v.AuxInt)
  9153  		sym := auxToSym(v.Aux)
  9154  		ptr := v_0
  9155  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
  9156  			break
  9157  		}
  9158  		mem := v_2
  9159  		v.reset(OpARM64MOVDstorezero)
  9160  		v.AuxInt = int32ToAuxInt(off)
  9161  		v.Aux = symToAux(sym)
  9162  		v.AddArg2(ptr, mem)
  9163  		return true
  9164  	}
  9165  	return false
  9166  }
  9167  func rewriteValueARM64_OpARM64MOVDstoreidx(v *Value) bool {
  9168  	v_3 := v.Args[3]
  9169  	v_2 := v.Args[2]
  9170  	v_1 := v.Args[1]
  9171  	v_0 := v.Args[0]
  9172  	// match: (MOVDstoreidx ptr (MOVDconst [c]) val mem)
  9173  	// cond: is32Bit(c)
  9174  	// result: (MOVDstore [int32(c)] ptr val mem)
  9175  	for {
  9176  		ptr := v_0
  9177  		if v_1.Op != OpARM64MOVDconst {
  9178  			break
  9179  		}
  9180  		c := auxIntToInt64(v_1.AuxInt)
  9181  		val := v_2
  9182  		mem := v_3
  9183  		if !(is32Bit(c)) {
  9184  			break
  9185  		}
  9186  		v.reset(OpARM64MOVDstore)
  9187  		v.AuxInt = int32ToAuxInt(int32(c))
  9188  		v.AddArg3(ptr, val, mem)
  9189  		return true
  9190  	}
  9191  	// match: (MOVDstoreidx (MOVDconst [c]) idx val mem)
  9192  	// cond: is32Bit(c)
  9193  	// result: (MOVDstore [int32(c)] idx val mem)
  9194  	for {
  9195  		if v_0.Op != OpARM64MOVDconst {
  9196  			break
  9197  		}
  9198  		c := auxIntToInt64(v_0.AuxInt)
  9199  		idx := v_1
  9200  		val := v_2
  9201  		mem := v_3
  9202  		if !(is32Bit(c)) {
  9203  			break
  9204  		}
  9205  		v.reset(OpARM64MOVDstore)
  9206  		v.AuxInt = int32ToAuxInt(int32(c))
  9207  		v.AddArg3(idx, val, mem)
  9208  		return true
  9209  	}
  9210  	// match: (MOVDstoreidx ptr (SLLconst [3] idx) val mem)
  9211  	// result: (MOVDstoreidx8 ptr idx val mem)
  9212  	for {
  9213  		ptr := v_0
  9214  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 3 {
  9215  			break
  9216  		}
  9217  		idx := v_1.Args[0]
  9218  		val := v_2
  9219  		mem := v_3
  9220  		v.reset(OpARM64MOVDstoreidx8)
  9221  		v.AddArg4(ptr, idx, val, mem)
  9222  		return true
  9223  	}
  9224  	// match: (MOVDstoreidx (SLLconst [3] idx) ptr val mem)
  9225  	// result: (MOVDstoreidx8 ptr idx val mem)
  9226  	for {
  9227  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 3 {
  9228  			break
  9229  		}
  9230  		idx := v_0.Args[0]
  9231  		ptr := v_1
  9232  		val := v_2
  9233  		mem := v_3
  9234  		v.reset(OpARM64MOVDstoreidx8)
  9235  		v.AddArg4(ptr, idx, val, mem)
  9236  		return true
  9237  	}
  9238  	// match: (MOVDstoreidx ptr idx (MOVDconst [0]) mem)
  9239  	// result: (MOVDstorezeroidx ptr idx mem)
  9240  	for {
  9241  		ptr := v_0
  9242  		idx := v_1
  9243  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != 0 {
  9244  			break
  9245  		}
  9246  		mem := v_3
  9247  		v.reset(OpARM64MOVDstorezeroidx)
  9248  		v.AddArg3(ptr, idx, mem)
  9249  		return true
  9250  	}
  9251  	return false
  9252  }
  9253  func rewriteValueARM64_OpARM64MOVDstoreidx8(v *Value) bool {
  9254  	v_3 := v.Args[3]
  9255  	v_2 := v.Args[2]
  9256  	v_1 := v.Args[1]
  9257  	v_0 := v.Args[0]
  9258  	// match: (MOVDstoreidx8 ptr (MOVDconst [c]) val mem)
  9259  	// cond: is32Bit(c<<3)
  9260  	// result: (MOVDstore [int32(c)<<3] ptr val mem)
  9261  	for {
  9262  		ptr := v_0
  9263  		if v_1.Op != OpARM64MOVDconst {
  9264  			break
  9265  		}
  9266  		c := auxIntToInt64(v_1.AuxInt)
  9267  		val := v_2
  9268  		mem := v_3
  9269  		if !(is32Bit(c << 3)) {
  9270  			break
  9271  		}
  9272  		v.reset(OpARM64MOVDstore)
  9273  		v.AuxInt = int32ToAuxInt(int32(c) << 3)
  9274  		v.AddArg3(ptr, val, mem)
  9275  		return true
  9276  	}
  9277  	// match: (MOVDstoreidx8 ptr idx (MOVDconst [0]) mem)
  9278  	// result: (MOVDstorezeroidx8 ptr idx mem)
  9279  	for {
  9280  		ptr := v_0
  9281  		idx := v_1
  9282  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != 0 {
  9283  			break
  9284  		}
  9285  		mem := v_3
  9286  		v.reset(OpARM64MOVDstorezeroidx8)
  9287  		v.AddArg3(ptr, idx, mem)
  9288  		return true
  9289  	}
  9290  	return false
  9291  }
  9292  func rewriteValueARM64_OpARM64MOVDstorezero(v *Value) bool {
  9293  	v_1 := v.Args[1]
  9294  	v_0 := v.Args[0]
  9295  	b := v.Block
  9296  	config := b.Func.Config
  9297  	// match: (MOVDstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
  9298  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  9299  	// result: (MOVDstorezero [off1+int32(off2)] {sym} ptr mem)
  9300  	for {
  9301  		off1 := auxIntToInt32(v.AuxInt)
  9302  		sym := auxToSym(v.Aux)
  9303  		if v_0.Op != OpARM64ADDconst {
  9304  			break
  9305  		}
  9306  		off2 := auxIntToInt64(v_0.AuxInt)
  9307  		ptr := v_0.Args[0]
  9308  		mem := v_1
  9309  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  9310  			break
  9311  		}
  9312  		v.reset(OpARM64MOVDstorezero)
  9313  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  9314  		v.Aux = symToAux(sym)
  9315  		v.AddArg2(ptr, mem)
  9316  		return true
  9317  	}
  9318  	// match: (MOVDstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  9319  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  9320  	// result: (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  9321  	for {
  9322  		off1 := auxIntToInt32(v.AuxInt)
  9323  		sym1 := auxToSym(v.Aux)
  9324  		if v_0.Op != OpARM64MOVDaddr {
  9325  			break
  9326  		}
  9327  		off2 := auxIntToInt32(v_0.AuxInt)
  9328  		sym2 := auxToSym(v_0.Aux)
  9329  		ptr := v_0.Args[0]
  9330  		mem := v_1
  9331  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  9332  			break
  9333  		}
  9334  		v.reset(OpARM64MOVDstorezero)
  9335  		v.AuxInt = int32ToAuxInt(off1 + off2)
  9336  		v.Aux = symToAux(mergeSym(sym1, sym2))
  9337  		v.AddArg2(ptr, mem)
  9338  		return true
  9339  	}
  9340  	// match: (MOVDstorezero [off] {sym} (ADD ptr idx) mem)
  9341  	// cond: off == 0 && sym == nil
  9342  	// result: (MOVDstorezeroidx ptr idx mem)
  9343  	for {
  9344  		off := auxIntToInt32(v.AuxInt)
  9345  		sym := auxToSym(v.Aux)
  9346  		if v_0.Op != OpARM64ADD {
  9347  			break
  9348  		}
  9349  		idx := v_0.Args[1]
  9350  		ptr := v_0.Args[0]
  9351  		mem := v_1
  9352  		if !(off == 0 && sym == nil) {
  9353  			break
  9354  		}
  9355  		v.reset(OpARM64MOVDstorezeroidx)
  9356  		v.AddArg3(ptr, idx, mem)
  9357  		return true
  9358  	}
  9359  	// match: (MOVDstorezero [off] {sym} (ADDshiftLL [3] ptr idx) mem)
  9360  	// cond: off == 0 && sym == nil
  9361  	// result: (MOVDstorezeroidx8 ptr idx mem)
  9362  	for {
  9363  		off := auxIntToInt32(v.AuxInt)
  9364  		sym := auxToSym(v.Aux)
  9365  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 3 {
  9366  			break
  9367  		}
  9368  		idx := v_0.Args[1]
  9369  		ptr := v_0.Args[0]
  9370  		mem := v_1
  9371  		if !(off == 0 && sym == nil) {
  9372  			break
  9373  		}
  9374  		v.reset(OpARM64MOVDstorezeroidx8)
  9375  		v.AddArg3(ptr, idx, mem)
  9376  		return true
  9377  	}
  9378  	// match: (MOVDstorezero [i] {s} ptr0 x:(MOVDstorezero [j] {s} ptr1 mem))
  9379  	// cond: x.Uses == 1 && areAdjacentOffsets(int64(i),int64(j),8) && isSamePtr(ptr0, ptr1) && clobber(x)
  9380  	// result: (MOVQstorezero [int32(min(int64(i),int64(j)))] {s} ptr0 mem)
  9381  	for {
  9382  		i := auxIntToInt32(v.AuxInt)
  9383  		s := auxToSym(v.Aux)
  9384  		ptr0 := v_0
  9385  		x := v_1
  9386  		if x.Op != OpARM64MOVDstorezero {
  9387  			break
  9388  		}
  9389  		j := auxIntToInt32(x.AuxInt)
  9390  		if auxToSym(x.Aux) != s {
  9391  			break
  9392  		}
  9393  		mem := x.Args[1]
  9394  		ptr1 := x.Args[0]
  9395  		if !(x.Uses == 1 && areAdjacentOffsets(int64(i), int64(j), 8) && isSamePtr(ptr0, ptr1) && clobber(x)) {
  9396  			break
  9397  		}
  9398  		v.reset(OpARM64MOVQstorezero)
  9399  		v.AuxInt = int32ToAuxInt(int32(min(int64(i), int64(j))))
  9400  		v.Aux = symToAux(s)
  9401  		v.AddArg2(ptr0, mem)
  9402  		return true
  9403  	}
  9404  	// match: (MOVDstorezero [8] {s} p0:(ADD ptr0 idx0) x:(MOVDstorezeroidx ptr1 idx1 mem))
  9405  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
  9406  	// result: (MOVQstorezero [0] {s} p0 mem)
  9407  	for {
  9408  		if auxIntToInt32(v.AuxInt) != 8 {
  9409  			break
  9410  		}
  9411  		s := auxToSym(v.Aux)
  9412  		p0 := v_0
  9413  		if p0.Op != OpARM64ADD {
  9414  			break
  9415  		}
  9416  		_ = p0.Args[1]
  9417  		p0_0 := p0.Args[0]
  9418  		p0_1 := p0.Args[1]
  9419  		for _i0 := 0; _i0 <= 1; _i0, p0_0, p0_1 = _i0+1, p0_1, p0_0 {
  9420  			ptr0 := p0_0
  9421  			idx0 := p0_1
  9422  			x := v_1
  9423  			if x.Op != OpARM64MOVDstorezeroidx {
  9424  				continue
  9425  			}
  9426  			mem := x.Args[2]
  9427  			ptr1 := x.Args[0]
  9428  			idx1 := x.Args[1]
  9429  			if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
  9430  				continue
  9431  			}
  9432  			v.reset(OpARM64MOVQstorezero)
  9433  			v.AuxInt = int32ToAuxInt(0)
  9434  			v.Aux = symToAux(s)
  9435  			v.AddArg2(p0, mem)
  9436  			return true
  9437  		}
  9438  		break
  9439  	}
  9440  	// match: (MOVDstorezero [8] {s} p0:(ADDshiftLL [3] ptr0 idx0) x:(MOVDstorezeroidx8 ptr1 idx1 mem))
  9441  	// cond: x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)
  9442  	// result: (MOVQstorezero [0] {s} p0 mem)
  9443  	for {
  9444  		if auxIntToInt32(v.AuxInt) != 8 {
  9445  			break
  9446  		}
  9447  		s := auxToSym(v.Aux)
  9448  		p0 := v_0
  9449  		if p0.Op != OpARM64ADDshiftLL || auxIntToInt64(p0.AuxInt) != 3 {
  9450  			break
  9451  		}
  9452  		idx0 := p0.Args[1]
  9453  		ptr0 := p0.Args[0]
  9454  		x := v_1
  9455  		if x.Op != OpARM64MOVDstorezeroidx8 {
  9456  			break
  9457  		}
  9458  		mem := x.Args[2]
  9459  		ptr1 := x.Args[0]
  9460  		idx1 := x.Args[1]
  9461  		if !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
  9462  			break
  9463  		}
  9464  		v.reset(OpARM64MOVQstorezero)
  9465  		v.AuxInt = int32ToAuxInt(0)
  9466  		v.Aux = symToAux(s)
  9467  		v.AddArg2(p0, mem)
  9468  		return true
  9469  	}
  9470  	return false
  9471  }
  9472  func rewriteValueARM64_OpARM64MOVDstorezeroidx(v *Value) bool {
  9473  	v_2 := v.Args[2]
  9474  	v_1 := v.Args[1]
  9475  	v_0 := v.Args[0]
  9476  	// match: (MOVDstorezeroidx ptr (MOVDconst [c]) mem)
  9477  	// cond: is32Bit(c)
  9478  	// result: (MOVDstorezero [int32(c)] ptr mem)
  9479  	for {
  9480  		ptr := v_0
  9481  		if v_1.Op != OpARM64MOVDconst {
  9482  			break
  9483  		}
  9484  		c := auxIntToInt64(v_1.AuxInt)
  9485  		mem := v_2
  9486  		if !(is32Bit(c)) {
  9487  			break
  9488  		}
  9489  		v.reset(OpARM64MOVDstorezero)
  9490  		v.AuxInt = int32ToAuxInt(int32(c))
  9491  		v.AddArg2(ptr, mem)
  9492  		return true
  9493  	}
  9494  	// match: (MOVDstorezeroidx (MOVDconst [c]) idx mem)
  9495  	// cond: is32Bit(c)
  9496  	// result: (MOVDstorezero [int32(c)] idx mem)
  9497  	for {
  9498  		if v_0.Op != OpARM64MOVDconst {
  9499  			break
  9500  		}
  9501  		c := auxIntToInt64(v_0.AuxInt)
  9502  		idx := v_1
  9503  		mem := v_2
  9504  		if !(is32Bit(c)) {
  9505  			break
  9506  		}
  9507  		v.reset(OpARM64MOVDstorezero)
  9508  		v.AuxInt = int32ToAuxInt(int32(c))
  9509  		v.AddArg2(idx, mem)
  9510  		return true
  9511  	}
  9512  	// match: (MOVDstorezeroidx ptr (SLLconst [3] idx) mem)
  9513  	// result: (MOVDstorezeroidx8 ptr idx mem)
  9514  	for {
  9515  		ptr := v_0
  9516  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 3 {
  9517  			break
  9518  		}
  9519  		idx := v_1.Args[0]
  9520  		mem := v_2
  9521  		v.reset(OpARM64MOVDstorezeroidx8)
  9522  		v.AddArg3(ptr, idx, mem)
  9523  		return true
  9524  	}
  9525  	// match: (MOVDstorezeroidx (SLLconst [3] idx) ptr mem)
  9526  	// result: (MOVDstorezeroidx8 ptr idx mem)
  9527  	for {
  9528  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 3 {
  9529  			break
  9530  		}
  9531  		idx := v_0.Args[0]
  9532  		ptr := v_1
  9533  		mem := v_2
  9534  		v.reset(OpARM64MOVDstorezeroidx8)
  9535  		v.AddArg3(ptr, idx, mem)
  9536  		return true
  9537  	}
  9538  	return false
  9539  }
  9540  func rewriteValueARM64_OpARM64MOVDstorezeroidx8(v *Value) bool {
  9541  	v_2 := v.Args[2]
  9542  	v_1 := v.Args[1]
  9543  	v_0 := v.Args[0]
  9544  	// match: (MOVDstorezeroidx8 ptr (MOVDconst [c]) mem)
  9545  	// cond: is32Bit(c<<3)
  9546  	// result: (MOVDstorezero [int32(c<<3)] ptr mem)
  9547  	for {
  9548  		ptr := v_0
  9549  		if v_1.Op != OpARM64MOVDconst {
  9550  			break
  9551  		}
  9552  		c := auxIntToInt64(v_1.AuxInt)
  9553  		mem := v_2
  9554  		if !(is32Bit(c << 3)) {
  9555  			break
  9556  		}
  9557  		v.reset(OpARM64MOVDstorezero)
  9558  		v.AuxInt = int32ToAuxInt(int32(c << 3))
  9559  		v.AddArg2(ptr, mem)
  9560  		return true
  9561  	}
  9562  	return false
  9563  }
  9564  func rewriteValueARM64_OpARM64MOVHUload(v *Value) bool {
  9565  	v_1 := v.Args[1]
  9566  	v_0 := v.Args[0]
  9567  	b := v.Block
  9568  	config := b.Func.Config
  9569  	// match: (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem)
  9570  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  9571  	// result: (MOVHUload [off1+int32(off2)] {sym} ptr mem)
  9572  	for {
  9573  		off1 := auxIntToInt32(v.AuxInt)
  9574  		sym := auxToSym(v.Aux)
  9575  		if v_0.Op != OpARM64ADDconst {
  9576  			break
  9577  		}
  9578  		off2 := auxIntToInt64(v_0.AuxInt)
  9579  		ptr := v_0.Args[0]
  9580  		mem := v_1
  9581  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  9582  			break
  9583  		}
  9584  		v.reset(OpARM64MOVHUload)
  9585  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  9586  		v.Aux = symToAux(sym)
  9587  		v.AddArg2(ptr, mem)
  9588  		return true
  9589  	}
  9590  	// match: (MOVHUload [off] {sym} (ADD ptr idx) mem)
  9591  	// cond: off == 0 && sym == nil
  9592  	// result: (MOVHUloadidx ptr idx mem)
  9593  	for {
  9594  		off := auxIntToInt32(v.AuxInt)
  9595  		sym := auxToSym(v.Aux)
  9596  		if v_0.Op != OpARM64ADD {
  9597  			break
  9598  		}
  9599  		idx := v_0.Args[1]
  9600  		ptr := v_0.Args[0]
  9601  		mem := v_1
  9602  		if !(off == 0 && sym == nil) {
  9603  			break
  9604  		}
  9605  		v.reset(OpARM64MOVHUloadidx)
  9606  		v.AddArg3(ptr, idx, mem)
  9607  		return true
  9608  	}
  9609  	// match: (MOVHUload [off] {sym} (ADDshiftLL [1] ptr idx) mem)
  9610  	// cond: off == 0 && sym == nil
  9611  	// result: (MOVHUloadidx2 ptr idx mem)
  9612  	for {
  9613  		off := auxIntToInt32(v.AuxInt)
  9614  		sym := auxToSym(v.Aux)
  9615  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 1 {
  9616  			break
  9617  		}
  9618  		idx := v_0.Args[1]
  9619  		ptr := v_0.Args[0]
  9620  		mem := v_1
  9621  		if !(off == 0 && sym == nil) {
  9622  			break
  9623  		}
  9624  		v.reset(OpARM64MOVHUloadidx2)
  9625  		v.AddArg3(ptr, idx, mem)
  9626  		return true
  9627  	}
  9628  	// match: (MOVHUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  9629  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  9630  	// result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  9631  	for {
  9632  		off1 := auxIntToInt32(v.AuxInt)
  9633  		sym1 := auxToSym(v.Aux)
  9634  		if v_0.Op != OpARM64MOVDaddr {
  9635  			break
  9636  		}
  9637  		off2 := auxIntToInt32(v_0.AuxInt)
  9638  		sym2 := auxToSym(v_0.Aux)
  9639  		ptr := v_0.Args[0]
  9640  		mem := v_1
  9641  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  9642  			break
  9643  		}
  9644  		v.reset(OpARM64MOVHUload)
  9645  		v.AuxInt = int32ToAuxInt(off1 + off2)
  9646  		v.Aux = symToAux(mergeSym(sym1, sym2))
  9647  		v.AddArg2(ptr, mem)
  9648  		return true
  9649  	}
  9650  	// match: (MOVHUload [off] {sym} ptr (MOVHstorezero [off2] {sym2} ptr2 _))
  9651  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  9652  	// result: (MOVDconst [0])
  9653  	for {
  9654  		off := auxIntToInt32(v.AuxInt)
  9655  		sym := auxToSym(v.Aux)
  9656  		ptr := v_0
  9657  		if v_1.Op != OpARM64MOVHstorezero {
  9658  			break
  9659  		}
  9660  		off2 := auxIntToInt32(v_1.AuxInt)
  9661  		sym2 := auxToSym(v_1.Aux)
  9662  		ptr2 := v_1.Args[0]
  9663  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  9664  			break
  9665  		}
  9666  		v.reset(OpARM64MOVDconst)
  9667  		v.AuxInt = int64ToAuxInt(0)
  9668  		return true
  9669  	}
  9670  	// match: (MOVHUload [off] {sym} (SB) _)
  9671  	// cond: symIsRO(sym)
  9672  	// result: (MOVDconst [int64(read16(sym, int64(off), config.ctxt.Arch.ByteOrder))])
  9673  	for {
  9674  		off := auxIntToInt32(v.AuxInt)
  9675  		sym := auxToSym(v.Aux)
  9676  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  9677  			break
  9678  		}
  9679  		v.reset(OpARM64MOVDconst)
  9680  		v.AuxInt = int64ToAuxInt(int64(read16(sym, int64(off), config.ctxt.Arch.ByteOrder)))
  9681  		return true
  9682  	}
  9683  	return false
  9684  }
  9685  func rewriteValueARM64_OpARM64MOVHUloadidx(v *Value) bool {
  9686  	v_2 := v.Args[2]
  9687  	v_1 := v.Args[1]
  9688  	v_0 := v.Args[0]
  9689  	// match: (MOVHUloadidx ptr (MOVDconst [c]) mem)
  9690  	// cond: is32Bit(c)
  9691  	// result: (MOVHUload [int32(c)] ptr mem)
  9692  	for {
  9693  		ptr := v_0
  9694  		if v_1.Op != OpARM64MOVDconst {
  9695  			break
  9696  		}
  9697  		c := auxIntToInt64(v_1.AuxInt)
  9698  		mem := v_2
  9699  		if !(is32Bit(c)) {
  9700  			break
  9701  		}
  9702  		v.reset(OpARM64MOVHUload)
  9703  		v.AuxInt = int32ToAuxInt(int32(c))
  9704  		v.AddArg2(ptr, mem)
  9705  		return true
  9706  	}
  9707  	// match: (MOVHUloadidx (MOVDconst [c]) ptr mem)
  9708  	// cond: is32Bit(c)
  9709  	// result: (MOVHUload [int32(c)] ptr mem)
  9710  	for {
  9711  		if v_0.Op != OpARM64MOVDconst {
  9712  			break
  9713  		}
  9714  		c := auxIntToInt64(v_0.AuxInt)
  9715  		ptr := v_1
  9716  		mem := v_2
  9717  		if !(is32Bit(c)) {
  9718  			break
  9719  		}
  9720  		v.reset(OpARM64MOVHUload)
  9721  		v.AuxInt = int32ToAuxInt(int32(c))
  9722  		v.AddArg2(ptr, mem)
  9723  		return true
  9724  	}
  9725  	// match: (MOVHUloadidx ptr (SLLconst [1] idx) mem)
  9726  	// result: (MOVHUloadidx2 ptr idx mem)
  9727  	for {
  9728  		ptr := v_0
  9729  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 1 {
  9730  			break
  9731  		}
  9732  		idx := v_1.Args[0]
  9733  		mem := v_2
  9734  		v.reset(OpARM64MOVHUloadidx2)
  9735  		v.AddArg3(ptr, idx, mem)
  9736  		return true
  9737  	}
  9738  	// match: (MOVHUloadidx ptr (ADD idx idx) mem)
  9739  	// result: (MOVHUloadidx2 ptr idx mem)
  9740  	for {
  9741  		ptr := v_0
  9742  		if v_1.Op != OpARM64ADD {
  9743  			break
  9744  		}
  9745  		idx := v_1.Args[1]
  9746  		if idx != v_1.Args[0] {
  9747  			break
  9748  		}
  9749  		mem := v_2
  9750  		v.reset(OpARM64MOVHUloadidx2)
  9751  		v.AddArg3(ptr, idx, mem)
  9752  		return true
  9753  	}
  9754  	// match: (MOVHUloadidx (ADD idx idx) ptr mem)
  9755  	// result: (MOVHUloadidx2 ptr idx mem)
  9756  	for {
  9757  		if v_0.Op != OpARM64ADD {
  9758  			break
  9759  		}
  9760  		idx := v_0.Args[1]
  9761  		if idx != v_0.Args[0] {
  9762  			break
  9763  		}
  9764  		ptr := v_1
  9765  		mem := v_2
  9766  		v.reset(OpARM64MOVHUloadidx2)
  9767  		v.AddArg3(ptr, idx, mem)
  9768  		return true
  9769  	}
  9770  	// match: (MOVHUloadidx ptr idx (MOVHstorezeroidx ptr2 idx2 _))
  9771  	// cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
  9772  	// result: (MOVDconst [0])
  9773  	for {
  9774  		ptr := v_0
  9775  		idx := v_1
  9776  		if v_2.Op != OpARM64MOVHstorezeroidx {
  9777  			break
  9778  		}
  9779  		idx2 := v_2.Args[1]
  9780  		ptr2 := v_2.Args[0]
  9781  		if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
  9782  			break
  9783  		}
  9784  		v.reset(OpARM64MOVDconst)
  9785  		v.AuxInt = int64ToAuxInt(0)
  9786  		return true
  9787  	}
  9788  	return false
  9789  }
  9790  func rewriteValueARM64_OpARM64MOVHUloadidx2(v *Value) bool {
  9791  	v_2 := v.Args[2]
  9792  	v_1 := v.Args[1]
  9793  	v_0 := v.Args[0]
  9794  	// match: (MOVHUloadidx2 ptr (MOVDconst [c]) mem)
  9795  	// cond: is32Bit(c<<1)
  9796  	// result: (MOVHUload [int32(c)<<1] ptr mem)
  9797  	for {
  9798  		ptr := v_0
  9799  		if v_1.Op != OpARM64MOVDconst {
  9800  			break
  9801  		}
  9802  		c := auxIntToInt64(v_1.AuxInt)
  9803  		mem := v_2
  9804  		if !(is32Bit(c << 1)) {
  9805  			break
  9806  		}
  9807  		v.reset(OpARM64MOVHUload)
  9808  		v.AuxInt = int32ToAuxInt(int32(c) << 1)
  9809  		v.AddArg2(ptr, mem)
  9810  		return true
  9811  	}
  9812  	// match: (MOVHUloadidx2 ptr idx (MOVHstorezeroidx2 ptr2 idx2 _))
  9813  	// cond: isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2)
  9814  	// result: (MOVDconst [0])
  9815  	for {
  9816  		ptr := v_0
  9817  		idx := v_1
  9818  		if v_2.Op != OpARM64MOVHstorezeroidx2 {
  9819  			break
  9820  		}
  9821  		idx2 := v_2.Args[1]
  9822  		ptr2 := v_2.Args[0]
  9823  		if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2)) {
  9824  			break
  9825  		}
  9826  		v.reset(OpARM64MOVDconst)
  9827  		v.AuxInt = int64ToAuxInt(0)
  9828  		return true
  9829  	}
  9830  	return false
  9831  }
  9832  func rewriteValueARM64_OpARM64MOVHUreg(v *Value) bool {
  9833  	v_0 := v.Args[0]
  9834  	// match: (MOVHUreg x:(MOVBUload _ _))
  9835  	// result: (MOVDreg x)
  9836  	for {
  9837  		x := v_0
  9838  		if x.Op != OpARM64MOVBUload {
  9839  			break
  9840  		}
  9841  		v.reset(OpARM64MOVDreg)
  9842  		v.AddArg(x)
  9843  		return true
  9844  	}
  9845  	// match: (MOVHUreg x:(MOVHUload _ _))
  9846  	// result: (MOVDreg x)
  9847  	for {
  9848  		x := v_0
  9849  		if x.Op != OpARM64MOVHUload {
  9850  			break
  9851  		}
  9852  		v.reset(OpARM64MOVDreg)
  9853  		v.AddArg(x)
  9854  		return true
  9855  	}
  9856  	// match: (MOVHUreg x:(MOVBUloadidx _ _ _))
  9857  	// result: (MOVDreg x)
  9858  	for {
  9859  		x := v_0
  9860  		if x.Op != OpARM64MOVBUloadidx {
  9861  			break
  9862  		}
  9863  		v.reset(OpARM64MOVDreg)
  9864  		v.AddArg(x)
  9865  		return true
  9866  	}
  9867  	// match: (MOVHUreg x:(MOVHUloadidx _ _ _))
  9868  	// result: (MOVDreg x)
  9869  	for {
  9870  		x := v_0
  9871  		if x.Op != OpARM64MOVHUloadidx {
  9872  			break
  9873  		}
  9874  		v.reset(OpARM64MOVDreg)
  9875  		v.AddArg(x)
  9876  		return true
  9877  	}
  9878  	// match: (MOVHUreg x:(MOVHUloadidx2 _ _ _))
  9879  	// result: (MOVDreg x)
  9880  	for {
  9881  		x := v_0
  9882  		if x.Op != OpARM64MOVHUloadidx2 {
  9883  			break
  9884  		}
  9885  		v.reset(OpARM64MOVDreg)
  9886  		v.AddArg(x)
  9887  		return true
  9888  	}
  9889  	// match: (MOVHUreg x:(MOVBUreg _))
  9890  	// result: (MOVDreg x)
  9891  	for {
  9892  		x := v_0
  9893  		if x.Op != OpARM64MOVBUreg {
  9894  			break
  9895  		}
  9896  		v.reset(OpARM64MOVDreg)
  9897  		v.AddArg(x)
  9898  		return true
  9899  	}
  9900  	// match: (MOVHUreg x:(MOVHUreg _))
  9901  	// result: (MOVDreg x)
  9902  	for {
  9903  		x := v_0
  9904  		if x.Op != OpARM64MOVHUreg {
  9905  			break
  9906  		}
  9907  		v.reset(OpARM64MOVDreg)
  9908  		v.AddArg(x)
  9909  		return true
  9910  	}
  9911  	// match: (MOVHUreg (ANDconst [c] x))
  9912  	// result: (ANDconst [c&(1<<16-1)] x)
  9913  	for {
  9914  		if v_0.Op != OpARM64ANDconst {
  9915  			break
  9916  		}
  9917  		c := auxIntToInt64(v_0.AuxInt)
  9918  		x := v_0.Args[0]
  9919  		v.reset(OpARM64ANDconst)
  9920  		v.AuxInt = int64ToAuxInt(c & (1<<16 - 1))
  9921  		v.AddArg(x)
  9922  		return true
  9923  	}
  9924  	// match: (MOVHUreg (MOVDconst [c]))
  9925  	// result: (MOVDconst [int64(uint16(c))])
  9926  	for {
  9927  		if v_0.Op != OpARM64MOVDconst {
  9928  			break
  9929  		}
  9930  		c := auxIntToInt64(v_0.AuxInt)
  9931  		v.reset(OpARM64MOVDconst)
  9932  		v.AuxInt = int64ToAuxInt(int64(uint16(c)))
  9933  		return true
  9934  	}
  9935  	// match: (MOVHUreg (SLLconst [sc] x))
  9936  	// cond: isARM64BFMask(sc, 1<<16-1, sc)
  9937  	// result: (UBFIZ [armBFAuxInt(sc, arm64BFWidth(1<<16-1, sc))] x)
  9938  	for {
  9939  		if v_0.Op != OpARM64SLLconst {
  9940  			break
  9941  		}
  9942  		sc := auxIntToInt64(v_0.AuxInt)
  9943  		x := v_0.Args[0]
  9944  		if !(isARM64BFMask(sc, 1<<16-1, sc)) {
  9945  			break
  9946  		}
  9947  		v.reset(OpARM64UBFIZ)
  9948  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, arm64BFWidth(1<<16-1, sc)))
  9949  		v.AddArg(x)
  9950  		return true
  9951  	}
  9952  	// match: (MOVHUreg (SRLconst [sc] x))
  9953  	// cond: isARM64BFMask(sc, 1<<16-1, 0)
  9954  	// result: (UBFX [armBFAuxInt(sc, 16)] x)
  9955  	for {
  9956  		if v_0.Op != OpARM64SRLconst {
  9957  			break
  9958  		}
  9959  		sc := auxIntToInt64(v_0.AuxInt)
  9960  		x := v_0.Args[0]
  9961  		if !(isARM64BFMask(sc, 1<<16-1, 0)) {
  9962  			break
  9963  		}
  9964  		v.reset(OpARM64UBFX)
  9965  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, 16))
  9966  		v.AddArg(x)
  9967  		return true
  9968  	}
  9969  	return false
  9970  }
  9971  func rewriteValueARM64_OpARM64MOVHload(v *Value) bool {
  9972  	v_1 := v.Args[1]
  9973  	v_0 := v.Args[0]
  9974  	b := v.Block
  9975  	config := b.Func.Config
  9976  	// match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem)
  9977  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  9978  	// result: (MOVHload [off1+int32(off2)] {sym} ptr mem)
  9979  	for {
  9980  		off1 := auxIntToInt32(v.AuxInt)
  9981  		sym := auxToSym(v.Aux)
  9982  		if v_0.Op != OpARM64ADDconst {
  9983  			break
  9984  		}
  9985  		off2 := auxIntToInt64(v_0.AuxInt)
  9986  		ptr := v_0.Args[0]
  9987  		mem := v_1
  9988  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  9989  			break
  9990  		}
  9991  		v.reset(OpARM64MOVHload)
  9992  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  9993  		v.Aux = symToAux(sym)
  9994  		v.AddArg2(ptr, mem)
  9995  		return true
  9996  	}
  9997  	// match: (MOVHload [off] {sym} (ADD ptr idx) mem)
  9998  	// cond: off == 0 && sym == nil
  9999  	// result: (MOVHloadidx ptr idx mem)
 10000  	for {
 10001  		off := auxIntToInt32(v.AuxInt)
 10002  		sym := auxToSym(v.Aux)
 10003  		if v_0.Op != OpARM64ADD {
 10004  			break
 10005  		}
 10006  		idx := v_0.Args[1]
 10007  		ptr := v_0.Args[0]
 10008  		mem := v_1
 10009  		if !(off == 0 && sym == nil) {
 10010  			break
 10011  		}
 10012  		v.reset(OpARM64MOVHloadidx)
 10013  		v.AddArg3(ptr, idx, mem)
 10014  		return true
 10015  	}
 10016  	// match: (MOVHload [off] {sym} (ADDshiftLL [1] ptr idx) mem)
 10017  	// cond: off == 0 && sym == nil
 10018  	// result: (MOVHloadidx2 ptr idx mem)
 10019  	for {
 10020  		off := auxIntToInt32(v.AuxInt)
 10021  		sym := auxToSym(v.Aux)
 10022  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 1 {
 10023  			break
 10024  		}
 10025  		idx := v_0.Args[1]
 10026  		ptr := v_0.Args[0]
 10027  		mem := v_1
 10028  		if !(off == 0 && sym == nil) {
 10029  			break
 10030  		}
 10031  		v.reset(OpARM64MOVHloadidx2)
 10032  		v.AddArg3(ptr, idx, mem)
 10033  		return true
 10034  	}
 10035  	// match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10036  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 10037  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 10038  	for {
 10039  		off1 := auxIntToInt32(v.AuxInt)
 10040  		sym1 := auxToSym(v.Aux)
 10041  		if v_0.Op != OpARM64MOVDaddr {
 10042  			break
 10043  		}
 10044  		off2 := auxIntToInt32(v_0.AuxInt)
 10045  		sym2 := auxToSym(v_0.Aux)
 10046  		ptr := v_0.Args[0]
 10047  		mem := v_1
 10048  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 10049  			break
 10050  		}
 10051  		v.reset(OpARM64MOVHload)
 10052  		v.AuxInt = int32ToAuxInt(off1 + off2)
 10053  		v.Aux = symToAux(mergeSym(sym1, sym2))
 10054  		v.AddArg2(ptr, mem)
 10055  		return true
 10056  	}
 10057  	// match: (MOVHload [off] {sym} ptr (MOVHstorezero [off2] {sym2} ptr2 _))
 10058  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
 10059  	// result: (MOVDconst [0])
 10060  	for {
 10061  		off := auxIntToInt32(v.AuxInt)
 10062  		sym := auxToSym(v.Aux)
 10063  		ptr := v_0
 10064  		if v_1.Op != OpARM64MOVHstorezero {
 10065  			break
 10066  		}
 10067  		off2 := auxIntToInt32(v_1.AuxInt)
 10068  		sym2 := auxToSym(v_1.Aux)
 10069  		ptr2 := v_1.Args[0]
 10070  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
 10071  			break
 10072  		}
 10073  		v.reset(OpARM64MOVDconst)
 10074  		v.AuxInt = int64ToAuxInt(0)
 10075  		return true
 10076  	}
 10077  	return false
 10078  }
 10079  func rewriteValueARM64_OpARM64MOVHloadidx(v *Value) bool {
 10080  	v_2 := v.Args[2]
 10081  	v_1 := v.Args[1]
 10082  	v_0 := v.Args[0]
 10083  	// match: (MOVHloadidx ptr (MOVDconst [c]) mem)
 10084  	// cond: is32Bit(c)
 10085  	// result: (MOVHload [int32(c)] ptr mem)
 10086  	for {
 10087  		ptr := v_0
 10088  		if v_1.Op != OpARM64MOVDconst {
 10089  			break
 10090  		}
 10091  		c := auxIntToInt64(v_1.AuxInt)
 10092  		mem := v_2
 10093  		if !(is32Bit(c)) {
 10094  			break
 10095  		}
 10096  		v.reset(OpARM64MOVHload)
 10097  		v.AuxInt = int32ToAuxInt(int32(c))
 10098  		v.AddArg2(ptr, mem)
 10099  		return true
 10100  	}
 10101  	// match: (MOVHloadidx (MOVDconst [c]) ptr mem)
 10102  	// cond: is32Bit(c)
 10103  	// result: (MOVHload [int32(c)] ptr mem)
 10104  	for {
 10105  		if v_0.Op != OpARM64MOVDconst {
 10106  			break
 10107  		}
 10108  		c := auxIntToInt64(v_0.AuxInt)
 10109  		ptr := v_1
 10110  		mem := v_2
 10111  		if !(is32Bit(c)) {
 10112  			break
 10113  		}
 10114  		v.reset(OpARM64MOVHload)
 10115  		v.AuxInt = int32ToAuxInt(int32(c))
 10116  		v.AddArg2(ptr, mem)
 10117  		return true
 10118  	}
 10119  	// match: (MOVHloadidx ptr (SLLconst [1] idx) mem)
 10120  	// result: (MOVHloadidx2 ptr idx mem)
 10121  	for {
 10122  		ptr := v_0
 10123  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 1 {
 10124  			break
 10125  		}
 10126  		idx := v_1.Args[0]
 10127  		mem := v_2
 10128  		v.reset(OpARM64MOVHloadidx2)
 10129  		v.AddArg3(ptr, idx, mem)
 10130  		return true
 10131  	}
 10132  	// match: (MOVHloadidx ptr (ADD idx idx) mem)
 10133  	// result: (MOVHloadidx2 ptr idx mem)
 10134  	for {
 10135  		ptr := v_0
 10136  		if v_1.Op != OpARM64ADD {
 10137  			break
 10138  		}
 10139  		idx := v_1.Args[1]
 10140  		if idx != v_1.Args[0] {
 10141  			break
 10142  		}
 10143  		mem := v_2
 10144  		v.reset(OpARM64MOVHloadidx2)
 10145  		v.AddArg3(ptr, idx, mem)
 10146  		return true
 10147  	}
 10148  	// match: (MOVHloadidx (ADD idx idx) ptr mem)
 10149  	// result: (MOVHloadidx2 ptr idx mem)
 10150  	for {
 10151  		if v_0.Op != OpARM64ADD {
 10152  			break
 10153  		}
 10154  		idx := v_0.Args[1]
 10155  		if idx != v_0.Args[0] {
 10156  			break
 10157  		}
 10158  		ptr := v_1
 10159  		mem := v_2
 10160  		v.reset(OpARM64MOVHloadidx2)
 10161  		v.AddArg3(ptr, idx, mem)
 10162  		return true
 10163  	}
 10164  	// match: (MOVHloadidx ptr idx (MOVHstorezeroidx ptr2 idx2 _))
 10165  	// cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
 10166  	// result: (MOVDconst [0])
 10167  	for {
 10168  		ptr := v_0
 10169  		idx := v_1
 10170  		if v_2.Op != OpARM64MOVHstorezeroidx {
 10171  			break
 10172  		}
 10173  		idx2 := v_2.Args[1]
 10174  		ptr2 := v_2.Args[0]
 10175  		if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
 10176  			break
 10177  		}
 10178  		v.reset(OpARM64MOVDconst)
 10179  		v.AuxInt = int64ToAuxInt(0)
 10180  		return true
 10181  	}
 10182  	return false
 10183  }
 10184  func rewriteValueARM64_OpARM64MOVHloadidx2(v *Value) bool {
 10185  	v_2 := v.Args[2]
 10186  	v_1 := v.Args[1]
 10187  	v_0 := v.Args[0]
 10188  	// match: (MOVHloadidx2 ptr (MOVDconst [c]) mem)
 10189  	// cond: is32Bit(c<<1)
 10190  	// result: (MOVHload [int32(c)<<1] ptr mem)
 10191  	for {
 10192  		ptr := v_0
 10193  		if v_1.Op != OpARM64MOVDconst {
 10194  			break
 10195  		}
 10196  		c := auxIntToInt64(v_1.AuxInt)
 10197  		mem := v_2
 10198  		if !(is32Bit(c << 1)) {
 10199  			break
 10200  		}
 10201  		v.reset(OpARM64MOVHload)
 10202  		v.AuxInt = int32ToAuxInt(int32(c) << 1)
 10203  		v.AddArg2(ptr, mem)
 10204  		return true
 10205  	}
 10206  	// match: (MOVHloadidx2 ptr idx (MOVHstorezeroidx2 ptr2 idx2 _))
 10207  	// cond: isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2)
 10208  	// result: (MOVDconst [0])
 10209  	for {
 10210  		ptr := v_0
 10211  		idx := v_1
 10212  		if v_2.Op != OpARM64MOVHstorezeroidx2 {
 10213  			break
 10214  		}
 10215  		idx2 := v_2.Args[1]
 10216  		ptr2 := v_2.Args[0]
 10217  		if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2)) {
 10218  			break
 10219  		}
 10220  		v.reset(OpARM64MOVDconst)
 10221  		v.AuxInt = int64ToAuxInt(0)
 10222  		return true
 10223  	}
 10224  	return false
 10225  }
 10226  func rewriteValueARM64_OpARM64MOVHreg(v *Value) bool {
 10227  	v_0 := v.Args[0]
 10228  	// match: (MOVHreg x:(MOVBload _ _))
 10229  	// result: (MOVDreg x)
 10230  	for {
 10231  		x := v_0
 10232  		if x.Op != OpARM64MOVBload {
 10233  			break
 10234  		}
 10235  		v.reset(OpARM64MOVDreg)
 10236  		v.AddArg(x)
 10237  		return true
 10238  	}
 10239  	// match: (MOVHreg x:(MOVBUload _ _))
 10240  	// result: (MOVDreg x)
 10241  	for {
 10242  		x := v_0
 10243  		if x.Op != OpARM64MOVBUload {
 10244  			break
 10245  		}
 10246  		v.reset(OpARM64MOVDreg)
 10247  		v.AddArg(x)
 10248  		return true
 10249  	}
 10250  	// match: (MOVHreg x:(MOVHload _ _))
 10251  	// result: (MOVDreg x)
 10252  	for {
 10253  		x := v_0
 10254  		if x.Op != OpARM64MOVHload {
 10255  			break
 10256  		}
 10257  		v.reset(OpARM64MOVDreg)
 10258  		v.AddArg(x)
 10259  		return true
 10260  	}
 10261  	// match: (MOVHreg x:(MOVBloadidx _ _ _))
 10262  	// result: (MOVDreg x)
 10263  	for {
 10264  		x := v_0
 10265  		if x.Op != OpARM64MOVBloadidx {
 10266  			break
 10267  		}
 10268  		v.reset(OpARM64MOVDreg)
 10269  		v.AddArg(x)
 10270  		return true
 10271  	}
 10272  	// match: (MOVHreg x:(MOVBUloadidx _ _ _))
 10273  	// result: (MOVDreg x)
 10274  	for {
 10275  		x := v_0
 10276  		if x.Op != OpARM64MOVBUloadidx {
 10277  			break
 10278  		}
 10279  		v.reset(OpARM64MOVDreg)
 10280  		v.AddArg(x)
 10281  		return true
 10282  	}
 10283  	// match: (MOVHreg x:(MOVHloadidx _ _ _))
 10284  	// result: (MOVDreg x)
 10285  	for {
 10286  		x := v_0
 10287  		if x.Op != OpARM64MOVHloadidx {
 10288  			break
 10289  		}
 10290  		v.reset(OpARM64MOVDreg)
 10291  		v.AddArg(x)
 10292  		return true
 10293  	}
 10294  	// match: (MOVHreg x:(MOVHloadidx2 _ _ _))
 10295  	// result: (MOVDreg x)
 10296  	for {
 10297  		x := v_0
 10298  		if x.Op != OpARM64MOVHloadidx2 {
 10299  			break
 10300  		}
 10301  		v.reset(OpARM64MOVDreg)
 10302  		v.AddArg(x)
 10303  		return true
 10304  	}
 10305  	// match: (MOVHreg x:(MOVBreg _))
 10306  	// result: (MOVDreg x)
 10307  	for {
 10308  		x := v_0
 10309  		if x.Op != OpARM64MOVBreg {
 10310  			break
 10311  		}
 10312  		v.reset(OpARM64MOVDreg)
 10313  		v.AddArg(x)
 10314  		return true
 10315  	}
 10316  	// match: (MOVHreg x:(MOVBUreg _))
 10317  	// result: (MOVDreg x)
 10318  	for {
 10319  		x := v_0
 10320  		if x.Op != OpARM64MOVBUreg {
 10321  			break
 10322  		}
 10323  		v.reset(OpARM64MOVDreg)
 10324  		v.AddArg(x)
 10325  		return true
 10326  	}
 10327  	// match: (MOVHreg x:(MOVHreg _))
 10328  	// result: (MOVDreg x)
 10329  	for {
 10330  		x := v_0
 10331  		if x.Op != OpARM64MOVHreg {
 10332  			break
 10333  		}
 10334  		v.reset(OpARM64MOVDreg)
 10335  		v.AddArg(x)
 10336  		return true
 10337  	}
 10338  	// match: (MOVHreg (MOVDconst [c]))
 10339  	// result: (MOVDconst [int64(int16(c))])
 10340  	for {
 10341  		if v_0.Op != OpARM64MOVDconst {
 10342  			break
 10343  		}
 10344  		c := auxIntToInt64(v_0.AuxInt)
 10345  		v.reset(OpARM64MOVDconst)
 10346  		v.AuxInt = int64ToAuxInt(int64(int16(c)))
 10347  		return true
 10348  	}
 10349  	// match: (MOVHreg (SLLconst [lc] x))
 10350  	// cond: lc < 16
 10351  	// result: (SBFIZ [armBFAuxInt(lc, 16-lc)] x)
 10352  	for {
 10353  		if v_0.Op != OpARM64SLLconst {
 10354  			break
 10355  		}
 10356  		lc := auxIntToInt64(v_0.AuxInt)
 10357  		x := v_0.Args[0]
 10358  		if !(lc < 16) {
 10359  			break
 10360  		}
 10361  		v.reset(OpARM64SBFIZ)
 10362  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, 16-lc))
 10363  		v.AddArg(x)
 10364  		return true
 10365  	}
 10366  	return false
 10367  }
 10368  func rewriteValueARM64_OpARM64MOVHstore(v *Value) bool {
 10369  	v_2 := v.Args[2]
 10370  	v_1 := v.Args[1]
 10371  	v_0 := v.Args[0]
 10372  	b := v.Block
 10373  	config := b.Func.Config
 10374  	// match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 10375  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 10376  	// result: (MOVHstore [off1+int32(off2)] {sym} ptr val mem)
 10377  	for {
 10378  		off1 := auxIntToInt32(v.AuxInt)
 10379  		sym := auxToSym(v.Aux)
 10380  		if v_0.Op != OpARM64ADDconst {
 10381  			break
 10382  		}
 10383  		off2 := auxIntToInt64(v_0.AuxInt)
 10384  		ptr := v_0.Args[0]
 10385  		val := v_1
 10386  		mem := v_2
 10387  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 10388  			break
 10389  		}
 10390  		v.reset(OpARM64MOVHstore)
 10391  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 10392  		v.Aux = symToAux(sym)
 10393  		v.AddArg3(ptr, val, mem)
 10394  		return true
 10395  	}
 10396  	// match: (MOVHstore [off] {sym} (ADD ptr idx) val mem)
 10397  	// cond: off == 0 && sym == nil
 10398  	// result: (MOVHstoreidx ptr idx val mem)
 10399  	for {
 10400  		off := auxIntToInt32(v.AuxInt)
 10401  		sym := auxToSym(v.Aux)
 10402  		if v_0.Op != OpARM64ADD {
 10403  			break
 10404  		}
 10405  		idx := v_0.Args[1]
 10406  		ptr := v_0.Args[0]
 10407  		val := v_1
 10408  		mem := v_2
 10409  		if !(off == 0 && sym == nil) {
 10410  			break
 10411  		}
 10412  		v.reset(OpARM64MOVHstoreidx)
 10413  		v.AddArg4(ptr, idx, val, mem)
 10414  		return true
 10415  	}
 10416  	// match: (MOVHstore [off] {sym} (ADDshiftLL [1] ptr idx) val mem)
 10417  	// cond: off == 0 && sym == nil
 10418  	// result: (MOVHstoreidx2 ptr idx val mem)
 10419  	for {
 10420  		off := auxIntToInt32(v.AuxInt)
 10421  		sym := auxToSym(v.Aux)
 10422  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 1 {
 10423  			break
 10424  		}
 10425  		idx := v_0.Args[1]
 10426  		ptr := v_0.Args[0]
 10427  		val := v_1
 10428  		mem := v_2
 10429  		if !(off == 0 && sym == nil) {
 10430  			break
 10431  		}
 10432  		v.reset(OpARM64MOVHstoreidx2)
 10433  		v.AddArg4(ptr, idx, val, mem)
 10434  		return true
 10435  	}
 10436  	// match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 10437  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 10438  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
 10439  	for {
 10440  		off1 := auxIntToInt32(v.AuxInt)
 10441  		sym1 := auxToSym(v.Aux)
 10442  		if v_0.Op != OpARM64MOVDaddr {
 10443  			break
 10444  		}
 10445  		off2 := auxIntToInt32(v_0.AuxInt)
 10446  		sym2 := auxToSym(v_0.Aux)
 10447  		ptr := v_0.Args[0]
 10448  		val := v_1
 10449  		mem := v_2
 10450  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 10451  			break
 10452  		}
 10453  		v.reset(OpARM64MOVHstore)
 10454  		v.AuxInt = int32ToAuxInt(off1 + off2)
 10455  		v.Aux = symToAux(mergeSym(sym1, sym2))
 10456  		v.AddArg3(ptr, val, mem)
 10457  		return true
 10458  	}
 10459  	// match: (MOVHstore [off] {sym} ptr (MOVDconst [0]) mem)
 10460  	// result: (MOVHstorezero [off] {sym} ptr mem)
 10461  	for {
 10462  		off := auxIntToInt32(v.AuxInt)
 10463  		sym := auxToSym(v.Aux)
 10464  		ptr := v_0
 10465  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
 10466  			break
 10467  		}
 10468  		mem := v_2
 10469  		v.reset(OpARM64MOVHstorezero)
 10470  		v.AuxInt = int32ToAuxInt(off)
 10471  		v.Aux = symToAux(sym)
 10472  		v.AddArg2(ptr, mem)
 10473  		return true
 10474  	}
 10475  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
 10476  	// result: (MOVHstore [off] {sym} ptr x mem)
 10477  	for {
 10478  		off := auxIntToInt32(v.AuxInt)
 10479  		sym := auxToSym(v.Aux)
 10480  		ptr := v_0
 10481  		if v_1.Op != OpARM64MOVHreg {
 10482  			break
 10483  		}
 10484  		x := v_1.Args[0]
 10485  		mem := v_2
 10486  		v.reset(OpARM64MOVHstore)
 10487  		v.AuxInt = int32ToAuxInt(off)
 10488  		v.Aux = symToAux(sym)
 10489  		v.AddArg3(ptr, x, mem)
 10490  		return true
 10491  	}
 10492  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
 10493  	// result: (MOVHstore [off] {sym} ptr x mem)
 10494  	for {
 10495  		off := auxIntToInt32(v.AuxInt)
 10496  		sym := auxToSym(v.Aux)
 10497  		ptr := v_0
 10498  		if v_1.Op != OpARM64MOVHUreg {
 10499  			break
 10500  		}
 10501  		x := v_1.Args[0]
 10502  		mem := v_2
 10503  		v.reset(OpARM64MOVHstore)
 10504  		v.AuxInt = int32ToAuxInt(off)
 10505  		v.Aux = symToAux(sym)
 10506  		v.AddArg3(ptr, x, mem)
 10507  		return true
 10508  	}
 10509  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
 10510  	// result: (MOVHstore [off] {sym} ptr x mem)
 10511  	for {
 10512  		off := auxIntToInt32(v.AuxInt)
 10513  		sym := auxToSym(v.Aux)
 10514  		ptr := v_0
 10515  		if v_1.Op != OpARM64MOVWreg {
 10516  			break
 10517  		}
 10518  		x := v_1.Args[0]
 10519  		mem := v_2
 10520  		v.reset(OpARM64MOVHstore)
 10521  		v.AuxInt = int32ToAuxInt(off)
 10522  		v.Aux = symToAux(sym)
 10523  		v.AddArg3(ptr, x, mem)
 10524  		return true
 10525  	}
 10526  	// match: (MOVHstore [off] {sym} ptr (MOVWUreg x) mem)
 10527  	// result: (MOVHstore [off] {sym} ptr x mem)
 10528  	for {
 10529  		off := auxIntToInt32(v.AuxInt)
 10530  		sym := auxToSym(v.Aux)
 10531  		ptr := v_0
 10532  		if v_1.Op != OpARM64MOVWUreg {
 10533  			break
 10534  		}
 10535  		x := v_1.Args[0]
 10536  		mem := v_2
 10537  		v.reset(OpARM64MOVHstore)
 10538  		v.AuxInt = int32ToAuxInt(off)
 10539  		v.Aux = symToAux(sym)
 10540  		v.AddArg3(ptr, x, mem)
 10541  		return true
 10542  	}
 10543  	// match: (MOVHstore [i] {s} ptr0 (SRLconst [16] w) x:(MOVHstore [i-2] {s} ptr1 w mem))
 10544  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
 10545  	// result: (MOVWstore [i-2] {s} ptr0 w mem)
 10546  	for {
 10547  		i := auxIntToInt32(v.AuxInt)
 10548  		s := auxToSym(v.Aux)
 10549  		ptr0 := v_0
 10550  		if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 16 {
 10551  			break
 10552  		}
 10553  		w := v_1.Args[0]
 10554  		x := v_2
 10555  		if x.Op != OpARM64MOVHstore || auxIntToInt32(x.AuxInt) != i-2 || auxToSym(x.Aux) != s {
 10556  			break
 10557  		}
 10558  		mem := x.Args[2]
 10559  		ptr1 := x.Args[0]
 10560  		if w != x.Args[1] || !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
 10561  			break
 10562  		}
 10563  		v.reset(OpARM64MOVWstore)
 10564  		v.AuxInt = int32ToAuxInt(i - 2)
 10565  		v.Aux = symToAux(s)
 10566  		v.AddArg3(ptr0, w, mem)
 10567  		return true
 10568  	}
 10569  	// match: (MOVHstore [2] {s} (ADD ptr0 idx0) (SRLconst [16] w) x:(MOVHstoreidx ptr1 idx1 w mem))
 10570  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
 10571  	// result: (MOVWstoreidx ptr1 idx1 w mem)
 10572  	for {
 10573  		if auxIntToInt32(v.AuxInt) != 2 {
 10574  			break
 10575  		}
 10576  		s := auxToSym(v.Aux)
 10577  		if v_0.Op != OpARM64ADD {
 10578  			break
 10579  		}
 10580  		_ = v_0.Args[1]
 10581  		v_0_0 := v_0.Args[0]
 10582  		v_0_1 := v_0.Args[1]
 10583  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 10584  			ptr0 := v_0_0
 10585  			idx0 := v_0_1
 10586  			if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 16 {
 10587  				continue
 10588  			}
 10589  			w := v_1.Args[0]
 10590  			x := v_2
 10591  			if x.Op != OpARM64MOVHstoreidx {
 10592  				continue
 10593  			}
 10594  			mem := x.Args[3]
 10595  			ptr1 := x.Args[0]
 10596  			idx1 := x.Args[1]
 10597  			if w != x.Args[2] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
 10598  				continue
 10599  			}
 10600  			v.reset(OpARM64MOVWstoreidx)
 10601  			v.AddArg4(ptr1, idx1, w, mem)
 10602  			return true
 10603  		}
 10604  		break
 10605  	}
 10606  	// match: (MOVHstore [2] {s} (ADDshiftLL [1] ptr0 idx0) (SRLconst [16] w) x:(MOVHstoreidx2 ptr1 idx1 w mem))
 10607  	// cond: x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)
 10608  	// result: (MOVWstoreidx ptr1 (SLLconst <idx1.Type> [1] idx1) w mem)
 10609  	for {
 10610  		if auxIntToInt32(v.AuxInt) != 2 {
 10611  			break
 10612  		}
 10613  		s := auxToSym(v.Aux)
 10614  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 1 {
 10615  			break
 10616  		}
 10617  		idx0 := v_0.Args[1]
 10618  		ptr0 := v_0.Args[0]
 10619  		if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 16 {
 10620  			break
 10621  		}
 10622  		w := v_1.Args[0]
 10623  		x := v_2
 10624  		if x.Op != OpARM64MOVHstoreidx2 {
 10625  			break
 10626  		}
 10627  		mem := x.Args[3]
 10628  		ptr1 := x.Args[0]
 10629  		idx1 := x.Args[1]
 10630  		if w != x.Args[2] || !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
 10631  			break
 10632  		}
 10633  		v.reset(OpARM64MOVWstoreidx)
 10634  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, idx1.Type)
 10635  		v0.AuxInt = int64ToAuxInt(1)
 10636  		v0.AddArg(idx1)
 10637  		v.AddArg4(ptr1, v0, w, mem)
 10638  		return true
 10639  	}
 10640  	// match: (MOVHstore [i] {s} ptr0 (UBFX [armBFAuxInt(16, 16)] w) x:(MOVHstore [i-2] {s} ptr1 w mem))
 10641  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
 10642  	// result: (MOVWstore [i-2] {s} ptr0 w mem)
 10643  	for {
 10644  		i := auxIntToInt32(v.AuxInt)
 10645  		s := auxToSym(v.Aux)
 10646  		ptr0 := v_0
 10647  		if v_1.Op != OpARM64UBFX || auxIntToArm64BitField(v_1.AuxInt) != armBFAuxInt(16, 16) {
 10648  			break
 10649  		}
 10650  		w := v_1.Args[0]
 10651  		x := v_2
 10652  		if x.Op != OpARM64MOVHstore || auxIntToInt32(x.AuxInt) != i-2 || auxToSym(x.Aux) != s {
 10653  			break
 10654  		}
 10655  		mem := x.Args[2]
 10656  		ptr1 := x.Args[0]
 10657  		if w != x.Args[1] || !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
 10658  			break
 10659  		}
 10660  		v.reset(OpARM64MOVWstore)
 10661  		v.AuxInt = int32ToAuxInt(i - 2)
 10662  		v.Aux = symToAux(s)
 10663  		v.AddArg3(ptr0, w, mem)
 10664  		return true
 10665  	}
 10666  	// match: (MOVHstore [2] {s} (ADD ptr0 idx0) (UBFX [armBFAuxInt(16, 16)] w) x:(MOVHstoreidx ptr1 idx1 w mem))
 10667  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
 10668  	// result: (MOVWstoreidx ptr1 idx1 w mem)
 10669  	for {
 10670  		if auxIntToInt32(v.AuxInt) != 2 {
 10671  			break
 10672  		}
 10673  		s := auxToSym(v.Aux)
 10674  		if v_0.Op != OpARM64ADD {
 10675  			break
 10676  		}
 10677  		_ = v_0.Args[1]
 10678  		v_0_0 := v_0.Args[0]
 10679  		v_0_1 := v_0.Args[1]
 10680  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 10681  			ptr0 := v_0_0
 10682  			idx0 := v_0_1
 10683  			if v_1.Op != OpARM64UBFX || auxIntToArm64BitField(v_1.AuxInt) != armBFAuxInt(16, 16) {
 10684  				continue
 10685  			}
 10686  			w := v_1.Args[0]
 10687  			x := v_2
 10688  			if x.Op != OpARM64MOVHstoreidx {
 10689  				continue
 10690  			}
 10691  			mem := x.Args[3]
 10692  			ptr1 := x.Args[0]
 10693  			idx1 := x.Args[1]
 10694  			if w != x.Args[2] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
 10695  				continue
 10696  			}
 10697  			v.reset(OpARM64MOVWstoreidx)
 10698  			v.AddArg4(ptr1, idx1, w, mem)
 10699  			return true
 10700  		}
 10701  		break
 10702  	}
 10703  	// match: (MOVHstore [2] {s} (ADDshiftLL [1] ptr0 idx0) (UBFX [armBFAuxInt(16, 16)] w) x:(MOVHstoreidx2 ptr1 idx1 w mem))
 10704  	// cond: x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)
 10705  	// result: (MOVWstoreidx ptr1 (SLLconst <idx1.Type> [1] idx1) w mem)
 10706  	for {
 10707  		if auxIntToInt32(v.AuxInt) != 2 {
 10708  			break
 10709  		}
 10710  		s := auxToSym(v.Aux)
 10711  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 1 {
 10712  			break
 10713  		}
 10714  		idx0 := v_0.Args[1]
 10715  		ptr0 := v_0.Args[0]
 10716  		if v_1.Op != OpARM64UBFX || auxIntToArm64BitField(v_1.AuxInt) != armBFAuxInt(16, 16) {
 10717  			break
 10718  		}
 10719  		w := v_1.Args[0]
 10720  		x := v_2
 10721  		if x.Op != OpARM64MOVHstoreidx2 {
 10722  			break
 10723  		}
 10724  		mem := x.Args[3]
 10725  		ptr1 := x.Args[0]
 10726  		idx1 := x.Args[1]
 10727  		if w != x.Args[2] || !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
 10728  			break
 10729  		}
 10730  		v.reset(OpARM64MOVWstoreidx)
 10731  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, idx1.Type)
 10732  		v0.AuxInt = int64ToAuxInt(1)
 10733  		v0.AddArg(idx1)
 10734  		v.AddArg4(ptr1, v0, w, mem)
 10735  		return true
 10736  	}
 10737  	// match: (MOVHstore [i] {s} ptr0 (SRLconst [16] (MOVDreg w)) x:(MOVHstore [i-2] {s} ptr1 w mem))
 10738  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
 10739  	// result: (MOVWstore [i-2] {s} ptr0 w mem)
 10740  	for {
 10741  		i := auxIntToInt32(v.AuxInt)
 10742  		s := auxToSym(v.Aux)
 10743  		ptr0 := v_0
 10744  		if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 16 {
 10745  			break
 10746  		}
 10747  		v_1_0 := v_1.Args[0]
 10748  		if v_1_0.Op != OpARM64MOVDreg {
 10749  			break
 10750  		}
 10751  		w := v_1_0.Args[0]
 10752  		x := v_2
 10753  		if x.Op != OpARM64MOVHstore || auxIntToInt32(x.AuxInt) != i-2 || auxToSym(x.Aux) != s {
 10754  			break
 10755  		}
 10756  		mem := x.Args[2]
 10757  		ptr1 := x.Args[0]
 10758  		if w != x.Args[1] || !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
 10759  			break
 10760  		}
 10761  		v.reset(OpARM64MOVWstore)
 10762  		v.AuxInt = int32ToAuxInt(i - 2)
 10763  		v.Aux = symToAux(s)
 10764  		v.AddArg3(ptr0, w, mem)
 10765  		return true
 10766  	}
 10767  	// match: (MOVHstore [2] {s} (ADD ptr0 idx0) (SRLconst [16] (MOVDreg w)) x:(MOVHstoreidx ptr1 idx1 w mem))
 10768  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
 10769  	// result: (MOVWstoreidx ptr1 idx1 w mem)
 10770  	for {
 10771  		if auxIntToInt32(v.AuxInt) != 2 {
 10772  			break
 10773  		}
 10774  		s := auxToSym(v.Aux)
 10775  		if v_0.Op != OpARM64ADD {
 10776  			break
 10777  		}
 10778  		_ = v_0.Args[1]
 10779  		v_0_0 := v_0.Args[0]
 10780  		v_0_1 := v_0.Args[1]
 10781  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 10782  			ptr0 := v_0_0
 10783  			idx0 := v_0_1
 10784  			if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 16 {
 10785  				continue
 10786  			}
 10787  			v_1_0 := v_1.Args[0]
 10788  			if v_1_0.Op != OpARM64MOVDreg {
 10789  				continue
 10790  			}
 10791  			w := v_1_0.Args[0]
 10792  			x := v_2
 10793  			if x.Op != OpARM64MOVHstoreidx {
 10794  				continue
 10795  			}
 10796  			mem := x.Args[3]
 10797  			ptr1 := x.Args[0]
 10798  			idx1 := x.Args[1]
 10799  			if w != x.Args[2] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
 10800  				continue
 10801  			}
 10802  			v.reset(OpARM64MOVWstoreidx)
 10803  			v.AddArg4(ptr1, idx1, w, mem)
 10804  			return true
 10805  		}
 10806  		break
 10807  	}
 10808  	// match: (MOVHstore [2] {s} (ADDshiftLL [1] ptr0 idx0) (SRLconst [16] (MOVDreg w)) x:(MOVHstoreidx2 ptr1 idx1 w mem))
 10809  	// cond: x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)
 10810  	// result: (MOVWstoreidx ptr1 (SLLconst <idx1.Type> [1] idx1) w mem)
 10811  	for {
 10812  		if auxIntToInt32(v.AuxInt) != 2 {
 10813  			break
 10814  		}
 10815  		s := auxToSym(v.Aux)
 10816  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 1 {
 10817  			break
 10818  		}
 10819  		idx0 := v_0.Args[1]
 10820  		ptr0 := v_0.Args[0]
 10821  		if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 16 {
 10822  			break
 10823  		}
 10824  		v_1_0 := v_1.Args[0]
 10825  		if v_1_0.Op != OpARM64MOVDreg {
 10826  			break
 10827  		}
 10828  		w := v_1_0.Args[0]
 10829  		x := v_2
 10830  		if x.Op != OpARM64MOVHstoreidx2 {
 10831  			break
 10832  		}
 10833  		mem := x.Args[3]
 10834  		ptr1 := x.Args[0]
 10835  		idx1 := x.Args[1]
 10836  		if w != x.Args[2] || !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
 10837  			break
 10838  		}
 10839  		v.reset(OpARM64MOVWstoreidx)
 10840  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, idx1.Type)
 10841  		v0.AuxInt = int64ToAuxInt(1)
 10842  		v0.AddArg(idx1)
 10843  		v.AddArg4(ptr1, v0, w, mem)
 10844  		return true
 10845  	}
 10846  	// match: (MOVHstore [i] {s} ptr0 (SRLconst [j] w) x:(MOVHstore [i-2] {s} ptr1 w0:(SRLconst [j-16] w) mem))
 10847  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
 10848  	// result: (MOVWstore [i-2] {s} ptr0 w0 mem)
 10849  	for {
 10850  		i := auxIntToInt32(v.AuxInt)
 10851  		s := auxToSym(v.Aux)
 10852  		ptr0 := v_0
 10853  		if v_1.Op != OpARM64SRLconst {
 10854  			break
 10855  		}
 10856  		j := auxIntToInt64(v_1.AuxInt)
 10857  		w := v_1.Args[0]
 10858  		x := v_2
 10859  		if x.Op != OpARM64MOVHstore || auxIntToInt32(x.AuxInt) != i-2 || auxToSym(x.Aux) != s {
 10860  			break
 10861  		}
 10862  		mem := x.Args[2]
 10863  		ptr1 := x.Args[0]
 10864  		w0 := x.Args[1]
 10865  		if w0.Op != OpARM64SRLconst || auxIntToInt64(w0.AuxInt) != j-16 || w != w0.Args[0] || !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
 10866  			break
 10867  		}
 10868  		v.reset(OpARM64MOVWstore)
 10869  		v.AuxInt = int32ToAuxInt(i - 2)
 10870  		v.Aux = symToAux(s)
 10871  		v.AddArg3(ptr0, w0, mem)
 10872  		return true
 10873  	}
 10874  	// match: (MOVHstore [2] {s} (ADD ptr0 idx0) (SRLconst [j] w) x:(MOVHstoreidx ptr1 idx1 w0:(SRLconst [j-16] w) mem))
 10875  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
 10876  	// result: (MOVWstoreidx ptr1 idx1 w0 mem)
 10877  	for {
 10878  		if auxIntToInt32(v.AuxInt) != 2 {
 10879  			break
 10880  		}
 10881  		s := auxToSym(v.Aux)
 10882  		if v_0.Op != OpARM64ADD {
 10883  			break
 10884  		}
 10885  		_ = v_0.Args[1]
 10886  		v_0_0 := v_0.Args[0]
 10887  		v_0_1 := v_0.Args[1]
 10888  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 10889  			ptr0 := v_0_0
 10890  			idx0 := v_0_1
 10891  			if v_1.Op != OpARM64SRLconst {
 10892  				continue
 10893  			}
 10894  			j := auxIntToInt64(v_1.AuxInt)
 10895  			w := v_1.Args[0]
 10896  			x := v_2
 10897  			if x.Op != OpARM64MOVHstoreidx {
 10898  				continue
 10899  			}
 10900  			mem := x.Args[3]
 10901  			ptr1 := x.Args[0]
 10902  			idx1 := x.Args[1]
 10903  			w0 := x.Args[2]
 10904  			if w0.Op != OpARM64SRLconst || auxIntToInt64(w0.AuxInt) != j-16 || w != w0.Args[0] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
 10905  				continue
 10906  			}
 10907  			v.reset(OpARM64MOVWstoreidx)
 10908  			v.AddArg4(ptr1, idx1, w0, mem)
 10909  			return true
 10910  		}
 10911  		break
 10912  	}
 10913  	// match: (MOVHstore [2] {s} (ADDshiftLL [1] ptr0 idx0) (SRLconst [j] w) x:(MOVHstoreidx2 ptr1 idx1 w0:(SRLconst [j-16] w) mem))
 10914  	// cond: x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)
 10915  	// result: (MOVWstoreidx ptr1 (SLLconst <idx1.Type> [1] idx1) w0 mem)
 10916  	for {
 10917  		if auxIntToInt32(v.AuxInt) != 2 {
 10918  			break
 10919  		}
 10920  		s := auxToSym(v.Aux)
 10921  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 1 {
 10922  			break
 10923  		}
 10924  		idx0 := v_0.Args[1]
 10925  		ptr0 := v_0.Args[0]
 10926  		if v_1.Op != OpARM64SRLconst {
 10927  			break
 10928  		}
 10929  		j := auxIntToInt64(v_1.AuxInt)
 10930  		w := v_1.Args[0]
 10931  		x := v_2
 10932  		if x.Op != OpARM64MOVHstoreidx2 {
 10933  			break
 10934  		}
 10935  		mem := x.Args[3]
 10936  		ptr1 := x.Args[0]
 10937  		idx1 := x.Args[1]
 10938  		w0 := x.Args[2]
 10939  		if w0.Op != OpARM64SRLconst || auxIntToInt64(w0.AuxInt) != j-16 || w != w0.Args[0] || !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
 10940  			break
 10941  		}
 10942  		v.reset(OpARM64MOVWstoreidx)
 10943  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, idx1.Type)
 10944  		v0.AuxInt = int64ToAuxInt(1)
 10945  		v0.AddArg(idx1)
 10946  		v.AddArg4(ptr1, v0, w0, mem)
 10947  		return true
 10948  	}
 10949  	return false
 10950  }
 10951  func rewriteValueARM64_OpARM64MOVHstoreidx(v *Value) bool {
 10952  	v_3 := v.Args[3]
 10953  	v_2 := v.Args[2]
 10954  	v_1 := v.Args[1]
 10955  	v_0 := v.Args[0]
 10956  	// match: (MOVHstoreidx ptr (MOVDconst [c]) val mem)
 10957  	// cond: is32Bit(c)
 10958  	// result: (MOVHstore [int32(c)] ptr val mem)
 10959  	for {
 10960  		ptr := v_0
 10961  		if v_1.Op != OpARM64MOVDconst {
 10962  			break
 10963  		}
 10964  		c := auxIntToInt64(v_1.AuxInt)
 10965  		val := v_2
 10966  		mem := v_3
 10967  		if !(is32Bit(c)) {
 10968  			break
 10969  		}
 10970  		v.reset(OpARM64MOVHstore)
 10971  		v.AuxInt = int32ToAuxInt(int32(c))
 10972  		v.AddArg3(ptr, val, mem)
 10973  		return true
 10974  	}
 10975  	// match: (MOVHstoreidx (MOVDconst [c]) idx val mem)
 10976  	// cond: is32Bit(c)
 10977  	// result: (MOVHstore [int32(c)] idx val mem)
 10978  	for {
 10979  		if v_0.Op != OpARM64MOVDconst {
 10980  			break
 10981  		}
 10982  		c := auxIntToInt64(v_0.AuxInt)
 10983  		idx := v_1
 10984  		val := v_2
 10985  		mem := v_3
 10986  		if !(is32Bit(c)) {
 10987  			break
 10988  		}
 10989  		v.reset(OpARM64MOVHstore)
 10990  		v.AuxInt = int32ToAuxInt(int32(c))
 10991  		v.AddArg3(idx, val, mem)
 10992  		return true
 10993  	}
 10994  	// match: (MOVHstoreidx ptr (SLLconst [1] idx) val mem)
 10995  	// result: (MOVHstoreidx2 ptr idx val mem)
 10996  	for {
 10997  		ptr := v_0
 10998  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 1 {
 10999  			break
 11000  		}
 11001  		idx := v_1.Args[0]
 11002  		val := v_2
 11003  		mem := v_3
 11004  		v.reset(OpARM64MOVHstoreidx2)
 11005  		v.AddArg4(ptr, idx, val, mem)
 11006  		return true
 11007  	}
 11008  	// match: (MOVHstoreidx ptr (ADD idx idx) val mem)
 11009  	// result: (MOVHstoreidx2 ptr idx val mem)
 11010  	for {
 11011  		ptr := v_0
 11012  		if v_1.Op != OpARM64ADD {
 11013  			break
 11014  		}
 11015  		idx := v_1.Args[1]
 11016  		if idx != v_1.Args[0] {
 11017  			break
 11018  		}
 11019  		val := v_2
 11020  		mem := v_3
 11021  		v.reset(OpARM64MOVHstoreidx2)
 11022  		v.AddArg4(ptr, idx, val, mem)
 11023  		return true
 11024  	}
 11025  	// match: (MOVHstoreidx (SLLconst [1] idx) ptr val mem)
 11026  	// result: (MOVHstoreidx2 ptr idx val mem)
 11027  	for {
 11028  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 1 {
 11029  			break
 11030  		}
 11031  		idx := v_0.Args[0]
 11032  		ptr := v_1
 11033  		val := v_2
 11034  		mem := v_3
 11035  		v.reset(OpARM64MOVHstoreidx2)
 11036  		v.AddArg4(ptr, idx, val, mem)
 11037  		return true
 11038  	}
 11039  	// match: (MOVHstoreidx (ADD idx idx) ptr val mem)
 11040  	// result: (MOVHstoreidx2 ptr idx val mem)
 11041  	for {
 11042  		if v_0.Op != OpARM64ADD {
 11043  			break
 11044  		}
 11045  		idx := v_0.Args[1]
 11046  		if idx != v_0.Args[0] {
 11047  			break
 11048  		}
 11049  		ptr := v_1
 11050  		val := v_2
 11051  		mem := v_3
 11052  		v.reset(OpARM64MOVHstoreidx2)
 11053  		v.AddArg4(ptr, idx, val, mem)
 11054  		return true
 11055  	}
 11056  	// match: (MOVHstoreidx ptr idx (MOVDconst [0]) mem)
 11057  	// result: (MOVHstorezeroidx ptr idx mem)
 11058  	for {
 11059  		ptr := v_0
 11060  		idx := v_1
 11061  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != 0 {
 11062  			break
 11063  		}
 11064  		mem := v_3
 11065  		v.reset(OpARM64MOVHstorezeroidx)
 11066  		v.AddArg3(ptr, idx, mem)
 11067  		return true
 11068  	}
 11069  	// match: (MOVHstoreidx ptr idx (MOVHreg x) mem)
 11070  	// result: (MOVHstoreidx ptr idx x mem)
 11071  	for {
 11072  		ptr := v_0
 11073  		idx := v_1
 11074  		if v_2.Op != OpARM64MOVHreg {
 11075  			break
 11076  		}
 11077  		x := v_2.Args[0]
 11078  		mem := v_3
 11079  		v.reset(OpARM64MOVHstoreidx)
 11080  		v.AddArg4(ptr, idx, x, mem)
 11081  		return true
 11082  	}
 11083  	// match: (MOVHstoreidx ptr idx (MOVHUreg x) mem)
 11084  	// result: (MOVHstoreidx ptr idx x mem)
 11085  	for {
 11086  		ptr := v_0
 11087  		idx := v_1
 11088  		if v_2.Op != OpARM64MOVHUreg {
 11089  			break
 11090  		}
 11091  		x := v_2.Args[0]
 11092  		mem := v_3
 11093  		v.reset(OpARM64MOVHstoreidx)
 11094  		v.AddArg4(ptr, idx, x, mem)
 11095  		return true
 11096  	}
 11097  	// match: (MOVHstoreidx ptr idx (MOVWreg x) mem)
 11098  	// result: (MOVHstoreidx ptr idx x mem)
 11099  	for {
 11100  		ptr := v_0
 11101  		idx := v_1
 11102  		if v_2.Op != OpARM64MOVWreg {
 11103  			break
 11104  		}
 11105  		x := v_2.Args[0]
 11106  		mem := v_3
 11107  		v.reset(OpARM64MOVHstoreidx)
 11108  		v.AddArg4(ptr, idx, x, mem)
 11109  		return true
 11110  	}
 11111  	// match: (MOVHstoreidx ptr idx (MOVWUreg x) mem)
 11112  	// result: (MOVHstoreidx ptr idx x mem)
 11113  	for {
 11114  		ptr := v_0
 11115  		idx := v_1
 11116  		if v_2.Op != OpARM64MOVWUreg {
 11117  			break
 11118  		}
 11119  		x := v_2.Args[0]
 11120  		mem := v_3
 11121  		v.reset(OpARM64MOVHstoreidx)
 11122  		v.AddArg4(ptr, idx, x, mem)
 11123  		return true
 11124  	}
 11125  	// match: (MOVHstoreidx ptr (ADDconst [2] idx) (SRLconst [16] w) x:(MOVHstoreidx ptr idx w mem))
 11126  	// cond: x.Uses == 1 && clobber(x)
 11127  	// result: (MOVWstoreidx ptr idx w mem)
 11128  	for {
 11129  		ptr := v_0
 11130  		if v_1.Op != OpARM64ADDconst || auxIntToInt64(v_1.AuxInt) != 2 {
 11131  			break
 11132  		}
 11133  		idx := v_1.Args[0]
 11134  		if v_2.Op != OpARM64SRLconst || auxIntToInt64(v_2.AuxInt) != 16 {
 11135  			break
 11136  		}
 11137  		w := v_2.Args[0]
 11138  		x := v_3
 11139  		if x.Op != OpARM64MOVHstoreidx {
 11140  			break
 11141  		}
 11142  		mem := x.Args[3]
 11143  		if ptr != x.Args[0] || idx != x.Args[1] || w != x.Args[2] || !(x.Uses == 1 && clobber(x)) {
 11144  			break
 11145  		}
 11146  		v.reset(OpARM64MOVWstoreidx)
 11147  		v.AddArg4(ptr, idx, w, mem)
 11148  		return true
 11149  	}
 11150  	return false
 11151  }
 11152  func rewriteValueARM64_OpARM64MOVHstoreidx2(v *Value) bool {
 11153  	v_3 := v.Args[3]
 11154  	v_2 := v.Args[2]
 11155  	v_1 := v.Args[1]
 11156  	v_0 := v.Args[0]
 11157  	// match: (MOVHstoreidx2 ptr (MOVDconst [c]) val mem)
 11158  	// cond: is32Bit(c<<1)
 11159  	// result: (MOVHstore [int32(c)<<1] ptr val mem)
 11160  	for {
 11161  		ptr := v_0
 11162  		if v_1.Op != OpARM64MOVDconst {
 11163  			break
 11164  		}
 11165  		c := auxIntToInt64(v_1.AuxInt)
 11166  		val := v_2
 11167  		mem := v_3
 11168  		if !(is32Bit(c << 1)) {
 11169  			break
 11170  		}
 11171  		v.reset(OpARM64MOVHstore)
 11172  		v.AuxInt = int32ToAuxInt(int32(c) << 1)
 11173  		v.AddArg3(ptr, val, mem)
 11174  		return true
 11175  	}
 11176  	// match: (MOVHstoreidx2 ptr idx (MOVDconst [0]) mem)
 11177  	// result: (MOVHstorezeroidx2 ptr idx mem)
 11178  	for {
 11179  		ptr := v_0
 11180  		idx := v_1
 11181  		if v_2.Op != OpARM64MOVDconst || auxIntToInt64(v_2.AuxInt) != 0 {
 11182  			break
 11183  		}
 11184  		mem := v_3
 11185  		v.reset(OpARM64MOVHstorezeroidx2)
 11186  		v.AddArg3(ptr, idx, mem)
 11187  		return true
 11188  	}
 11189  	// match: (MOVHstoreidx2 ptr idx (MOVHreg x) mem)
 11190  	// result: (MOVHstoreidx2 ptr idx x mem)
 11191  	for {
 11192  		ptr := v_0
 11193  		idx := v_1
 11194  		if v_2.Op != OpARM64MOVHreg {
 11195  			break
 11196  		}
 11197  		x := v_2.Args[0]
 11198  		mem := v_3
 11199  		v.reset(OpARM64MOVHstoreidx2)
 11200  		v.AddArg4(ptr, idx, x, mem)
 11201  		return true
 11202  	}
 11203  	// match: (MOVHstoreidx2 ptr idx (MOVHUreg x) mem)
 11204  	// result: (MOVHstoreidx2 ptr idx x mem)
 11205  	for {
 11206  		ptr := v_0
 11207  		idx := v_1
 11208  		if v_2.Op != OpARM64MOVHUreg {
 11209  			break
 11210  		}
 11211  		x := v_2.Args[0]
 11212  		mem := v_3
 11213  		v.reset(OpARM64MOVHstoreidx2)
 11214  		v.AddArg4(ptr, idx, x, mem)
 11215  		return true
 11216  	}
 11217  	// match: (MOVHstoreidx2 ptr idx (MOVWreg x) mem)
 11218  	// result: (MOVHstoreidx2 ptr idx x mem)
 11219  	for {
 11220  		ptr := v_0
 11221  		idx := v_1
 11222  		if v_2.Op != OpARM64MOVWreg {
 11223  			break
 11224  		}
 11225  		x := v_2.Args[0]
 11226  		mem := v_3
 11227  		v.reset(OpARM64MOVHstoreidx2)
 11228  		v.AddArg4(ptr, idx, x, mem)
 11229  		return true
 11230  	}
 11231  	// match: (MOVHstoreidx2 ptr idx (MOVWUreg x) mem)
 11232  	// result: (MOVHstoreidx2 ptr idx x mem)
 11233  	for {
 11234  		ptr := v_0
 11235  		idx := v_1
 11236  		if v_2.Op != OpARM64MOVWUreg {
 11237  			break
 11238  		}
 11239  		x := v_2.Args[0]
 11240  		mem := v_3
 11241  		v.reset(OpARM64MOVHstoreidx2)
 11242  		v.AddArg4(ptr, idx, x, mem)
 11243  		return true
 11244  	}
 11245  	return false
 11246  }
 11247  func rewriteValueARM64_OpARM64MOVHstorezero(v *Value) bool {
 11248  	v_1 := v.Args[1]
 11249  	v_0 := v.Args[0]
 11250  	b := v.Block
 11251  	config := b.Func.Config
 11252  	// match: (MOVHstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
 11253  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 11254  	// result: (MOVHstorezero [off1+int32(off2)] {sym} ptr mem)
 11255  	for {
 11256  		off1 := auxIntToInt32(v.AuxInt)
 11257  		sym := auxToSym(v.Aux)
 11258  		if v_0.Op != OpARM64ADDconst {
 11259  			break
 11260  		}
 11261  		off2 := auxIntToInt64(v_0.AuxInt)
 11262  		ptr := v_0.Args[0]
 11263  		mem := v_1
 11264  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 11265  			break
 11266  		}
 11267  		v.reset(OpARM64MOVHstorezero)
 11268  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 11269  		v.Aux = symToAux(sym)
 11270  		v.AddArg2(ptr, mem)
 11271  		return true
 11272  	}
 11273  	// match: (MOVHstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11274  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 11275  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 11276  	for {
 11277  		off1 := auxIntToInt32(v.AuxInt)
 11278  		sym1 := auxToSym(v.Aux)
 11279  		if v_0.Op != OpARM64MOVDaddr {
 11280  			break
 11281  		}
 11282  		off2 := auxIntToInt32(v_0.AuxInt)
 11283  		sym2 := auxToSym(v_0.Aux)
 11284  		ptr := v_0.Args[0]
 11285  		mem := v_1
 11286  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 11287  			break
 11288  		}
 11289  		v.reset(OpARM64MOVHstorezero)
 11290  		v.AuxInt = int32ToAuxInt(off1 + off2)
 11291  		v.Aux = symToAux(mergeSym(sym1, sym2))
 11292  		v.AddArg2(ptr, mem)
 11293  		return true
 11294  	}
 11295  	// match: (MOVHstorezero [off] {sym} (ADD ptr idx) mem)
 11296  	// cond: off == 0 && sym == nil
 11297  	// result: (MOVHstorezeroidx ptr idx mem)
 11298  	for {
 11299  		off := auxIntToInt32(v.AuxInt)
 11300  		sym := auxToSym(v.Aux)
 11301  		if v_0.Op != OpARM64ADD {
 11302  			break
 11303  		}
 11304  		idx := v_0.Args[1]
 11305  		ptr := v_0.Args[0]
 11306  		mem := v_1
 11307  		if !(off == 0 && sym == nil) {
 11308  			break
 11309  		}
 11310  		v.reset(OpARM64MOVHstorezeroidx)
 11311  		v.AddArg3(ptr, idx, mem)
 11312  		return true
 11313  	}
 11314  	// match: (MOVHstorezero [off] {sym} (ADDshiftLL [1] ptr idx) mem)
 11315  	// cond: off == 0 && sym == nil
 11316  	// result: (MOVHstorezeroidx2 ptr idx mem)
 11317  	for {
 11318  		off := auxIntToInt32(v.AuxInt)
 11319  		sym := auxToSym(v.Aux)
 11320  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 1 {
 11321  			break
 11322  		}
 11323  		idx := v_0.Args[1]
 11324  		ptr := v_0.Args[0]
 11325  		mem := v_1
 11326  		if !(off == 0 && sym == nil) {
 11327  			break
 11328  		}
 11329  		v.reset(OpARM64MOVHstorezeroidx2)
 11330  		v.AddArg3(ptr, idx, mem)
 11331  		return true
 11332  	}
 11333  	// match: (MOVHstorezero [i] {s} ptr0 x:(MOVHstorezero [j] {s} ptr1 mem))
 11334  	// cond: x.Uses == 1 && areAdjacentOffsets(int64(i),int64(j),2) && isSamePtr(ptr0, ptr1) && clobber(x)
 11335  	// result: (MOVWstorezero [int32(min(int64(i),int64(j)))] {s} ptr0 mem)
 11336  	for {
 11337  		i := auxIntToInt32(v.AuxInt)
 11338  		s := auxToSym(v.Aux)
 11339  		ptr0 := v_0
 11340  		x := v_1
 11341  		if x.Op != OpARM64MOVHstorezero {
 11342  			break
 11343  		}
 11344  		j := auxIntToInt32(x.AuxInt)
 11345  		if auxToSym(x.Aux) != s {
 11346  			break
 11347  		}
 11348  		mem := x.Args[1]
 11349  		ptr1 := x.Args[0]
 11350  		if !(x.Uses == 1 && areAdjacentOffsets(int64(i), int64(j), 2) && isSamePtr(ptr0, ptr1) && clobber(x)) {
 11351  			break
 11352  		}
 11353  		v.reset(OpARM64MOVWstorezero)
 11354  		v.AuxInt = int32ToAuxInt(int32(min(int64(i), int64(j))))
 11355  		v.Aux = symToAux(s)
 11356  		v.AddArg2(ptr0, mem)
 11357  		return true
 11358  	}
 11359  	// match: (MOVHstorezero [2] {s} (ADD ptr0 idx0) x:(MOVHstorezeroidx ptr1 idx1 mem))
 11360  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
 11361  	// result: (MOVWstorezeroidx ptr1 idx1 mem)
 11362  	for {
 11363  		if auxIntToInt32(v.AuxInt) != 2 {
 11364  			break
 11365  		}
 11366  		s := auxToSym(v.Aux)
 11367  		if v_0.Op != OpARM64ADD {
 11368  			break
 11369  		}
 11370  		_ = v_0.Args[1]
 11371  		v_0_0 := v_0.Args[0]
 11372  		v_0_1 := v_0.Args[1]
 11373  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 11374  			ptr0 := v_0_0
 11375  			idx0 := v_0_1
 11376  			x := v_1
 11377  			if x.Op != OpARM64MOVHstorezeroidx {
 11378  				continue
 11379  			}
 11380  			mem := x.Args[2]
 11381  			ptr1 := x.Args[0]
 11382  			idx1 := x.Args[1]
 11383  			if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
 11384  				continue
 11385  			}
 11386  			v.reset(OpARM64MOVWstorezeroidx)
 11387  			v.AddArg3(ptr1, idx1, mem)
 11388  			return true
 11389  		}
 11390  		break
 11391  	}
 11392  	// match: (MOVHstorezero [2] {s} (ADDshiftLL [1] ptr0 idx0) x:(MOVHstorezeroidx2 ptr1 idx1 mem))
 11393  	// cond: x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)
 11394  	// result: (MOVWstorezeroidx ptr1 (SLLconst <idx1.Type> [1] idx1) mem)
 11395  	for {
 11396  		if auxIntToInt32(v.AuxInt) != 2 {
 11397  			break
 11398  		}
 11399  		s := auxToSym(v.Aux)
 11400  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 1 {
 11401  			break
 11402  		}
 11403  		idx0 := v_0.Args[1]
 11404  		ptr0 := v_0.Args[0]
 11405  		x := v_1
 11406  		if x.Op != OpARM64MOVHstorezeroidx2 {
 11407  			break
 11408  		}
 11409  		mem := x.Args[2]
 11410  		ptr1 := x.Args[0]
 11411  		idx1 := x.Args[1]
 11412  		if !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
 11413  			break
 11414  		}
 11415  		v.reset(OpARM64MOVWstorezeroidx)
 11416  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, idx1.Type)
 11417  		v0.AuxInt = int64ToAuxInt(1)
 11418  		v0.AddArg(idx1)
 11419  		v.AddArg3(ptr1, v0, mem)
 11420  		return true
 11421  	}
 11422  	return false
 11423  }
 11424  func rewriteValueARM64_OpARM64MOVHstorezeroidx(v *Value) bool {
 11425  	v_2 := v.Args[2]
 11426  	v_1 := v.Args[1]
 11427  	v_0 := v.Args[0]
 11428  	// match: (MOVHstorezeroidx ptr (MOVDconst [c]) mem)
 11429  	// cond: is32Bit(c)
 11430  	// result: (MOVHstorezero [int32(c)] ptr mem)
 11431  	for {
 11432  		ptr := v_0
 11433  		if v_1.Op != OpARM64MOVDconst {
 11434  			break
 11435  		}
 11436  		c := auxIntToInt64(v_1.AuxInt)
 11437  		mem := v_2
 11438  		if !(is32Bit(c)) {
 11439  			break
 11440  		}
 11441  		v.reset(OpARM64MOVHstorezero)
 11442  		v.AuxInt = int32ToAuxInt(int32(c))
 11443  		v.AddArg2(ptr, mem)
 11444  		return true
 11445  	}
 11446  	// match: (MOVHstorezeroidx (MOVDconst [c]) idx mem)
 11447  	// cond: is32Bit(c)
 11448  	// result: (MOVHstorezero [int32(c)] idx mem)
 11449  	for {
 11450  		if v_0.Op != OpARM64MOVDconst {
 11451  			break
 11452  		}
 11453  		c := auxIntToInt64(v_0.AuxInt)
 11454  		idx := v_1
 11455  		mem := v_2
 11456  		if !(is32Bit(c)) {
 11457  			break
 11458  		}
 11459  		v.reset(OpARM64MOVHstorezero)
 11460  		v.AuxInt = int32ToAuxInt(int32(c))
 11461  		v.AddArg2(idx, mem)
 11462  		return true
 11463  	}
 11464  	// match: (MOVHstorezeroidx ptr (SLLconst [1] idx) mem)
 11465  	// result: (MOVHstorezeroidx2 ptr idx mem)
 11466  	for {
 11467  		ptr := v_0
 11468  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 1 {
 11469  			break
 11470  		}
 11471  		idx := v_1.Args[0]
 11472  		mem := v_2
 11473  		v.reset(OpARM64MOVHstorezeroidx2)
 11474  		v.AddArg3(ptr, idx, mem)
 11475  		return true
 11476  	}
 11477  	// match: (MOVHstorezeroidx ptr (ADD idx idx) mem)
 11478  	// result: (MOVHstorezeroidx2 ptr idx mem)
 11479  	for {
 11480  		ptr := v_0
 11481  		if v_1.Op != OpARM64ADD {
 11482  			break
 11483  		}
 11484  		idx := v_1.Args[1]
 11485  		if idx != v_1.Args[0] {
 11486  			break
 11487  		}
 11488  		mem := v_2
 11489  		v.reset(OpARM64MOVHstorezeroidx2)
 11490  		v.AddArg3(ptr, idx, mem)
 11491  		return true
 11492  	}
 11493  	// match: (MOVHstorezeroidx (SLLconst [1] idx) ptr mem)
 11494  	// result: (MOVHstorezeroidx2 ptr idx mem)
 11495  	for {
 11496  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 1 {
 11497  			break
 11498  		}
 11499  		idx := v_0.Args[0]
 11500  		ptr := v_1
 11501  		mem := v_2
 11502  		v.reset(OpARM64MOVHstorezeroidx2)
 11503  		v.AddArg3(ptr, idx, mem)
 11504  		return true
 11505  	}
 11506  	// match: (MOVHstorezeroidx (ADD idx idx) ptr mem)
 11507  	// result: (MOVHstorezeroidx2 ptr idx mem)
 11508  	for {
 11509  		if v_0.Op != OpARM64ADD {
 11510  			break
 11511  		}
 11512  		idx := v_0.Args[1]
 11513  		if idx != v_0.Args[0] {
 11514  			break
 11515  		}
 11516  		ptr := v_1
 11517  		mem := v_2
 11518  		v.reset(OpARM64MOVHstorezeroidx2)
 11519  		v.AddArg3(ptr, idx, mem)
 11520  		return true
 11521  	}
 11522  	// match: (MOVHstorezeroidx ptr (ADDconst [2] idx) x:(MOVHstorezeroidx ptr idx mem))
 11523  	// cond: x.Uses == 1 && clobber(x)
 11524  	// result: (MOVWstorezeroidx ptr idx mem)
 11525  	for {
 11526  		ptr := v_0
 11527  		if v_1.Op != OpARM64ADDconst || auxIntToInt64(v_1.AuxInt) != 2 {
 11528  			break
 11529  		}
 11530  		idx := v_1.Args[0]
 11531  		x := v_2
 11532  		if x.Op != OpARM64MOVHstorezeroidx {
 11533  			break
 11534  		}
 11535  		mem := x.Args[2]
 11536  		if ptr != x.Args[0] || idx != x.Args[1] || !(x.Uses == 1 && clobber(x)) {
 11537  			break
 11538  		}
 11539  		v.reset(OpARM64MOVWstorezeroidx)
 11540  		v.AddArg3(ptr, idx, mem)
 11541  		return true
 11542  	}
 11543  	return false
 11544  }
 11545  func rewriteValueARM64_OpARM64MOVHstorezeroidx2(v *Value) bool {
 11546  	v_2 := v.Args[2]
 11547  	v_1 := v.Args[1]
 11548  	v_0 := v.Args[0]
 11549  	// match: (MOVHstorezeroidx2 ptr (MOVDconst [c]) mem)
 11550  	// cond: is32Bit(c<<1)
 11551  	// result: (MOVHstorezero [int32(c<<1)] ptr mem)
 11552  	for {
 11553  		ptr := v_0
 11554  		if v_1.Op != OpARM64MOVDconst {
 11555  			break
 11556  		}
 11557  		c := auxIntToInt64(v_1.AuxInt)
 11558  		mem := v_2
 11559  		if !(is32Bit(c << 1)) {
 11560  			break
 11561  		}
 11562  		v.reset(OpARM64MOVHstorezero)
 11563  		v.AuxInt = int32ToAuxInt(int32(c << 1))
 11564  		v.AddArg2(ptr, mem)
 11565  		return true
 11566  	}
 11567  	return false
 11568  }
 11569  func rewriteValueARM64_OpARM64MOVQstorezero(v *Value) bool {
 11570  	v_1 := v.Args[1]
 11571  	v_0 := v.Args[0]
 11572  	b := v.Block
 11573  	config := b.Func.Config
 11574  	// match: (MOVQstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
 11575  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 11576  	// result: (MOVQstorezero [off1+int32(off2)] {sym} ptr mem)
 11577  	for {
 11578  		off1 := auxIntToInt32(v.AuxInt)
 11579  		sym := auxToSym(v.Aux)
 11580  		if v_0.Op != OpARM64ADDconst {
 11581  			break
 11582  		}
 11583  		off2 := auxIntToInt64(v_0.AuxInt)
 11584  		ptr := v_0.Args[0]
 11585  		mem := v_1
 11586  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 11587  			break
 11588  		}
 11589  		v.reset(OpARM64MOVQstorezero)
 11590  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 11591  		v.Aux = symToAux(sym)
 11592  		v.AddArg2(ptr, mem)
 11593  		return true
 11594  	}
 11595  	// match: (MOVQstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11596  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 11597  	// result: (MOVQstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 11598  	for {
 11599  		off1 := auxIntToInt32(v.AuxInt)
 11600  		sym1 := auxToSym(v.Aux)
 11601  		if v_0.Op != OpARM64MOVDaddr {
 11602  			break
 11603  		}
 11604  		off2 := auxIntToInt32(v_0.AuxInt)
 11605  		sym2 := auxToSym(v_0.Aux)
 11606  		ptr := v_0.Args[0]
 11607  		mem := v_1
 11608  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 11609  			break
 11610  		}
 11611  		v.reset(OpARM64MOVQstorezero)
 11612  		v.AuxInt = int32ToAuxInt(off1 + off2)
 11613  		v.Aux = symToAux(mergeSym(sym1, sym2))
 11614  		v.AddArg2(ptr, mem)
 11615  		return true
 11616  	}
 11617  	return false
 11618  }
 11619  func rewriteValueARM64_OpARM64MOVWUload(v *Value) bool {
 11620  	v_1 := v.Args[1]
 11621  	v_0 := v.Args[0]
 11622  	b := v.Block
 11623  	config := b.Func.Config
 11624  	// match: (MOVWUload [off] {sym} ptr (FMOVSstore [off] {sym} ptr val _))
 11625  	// result: (FMOVSfpgp val)
 11626  	for {
 11627  		off := auxIntToInt32(v.AuxInt)
 11628  		sym := auxToSym(v.Aux)
 11629  		ptr := v_0
 11630  		if v_1.Op != OpARM64FMOVSstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
 11631  			break
 11632  		}
 11633  		val := v_1.Args[1]
 11634  		if ptr != v_1.Args[0] {
 11635  			break
 11636  		}
 11637  		v.reset(OpARM64FMOVSfpgp)
 11638  		v.AddArg(val)
 11639  		return true
 11640  	}
 11641  	// match: (MOVWUload [off1] {sym} (ADDconst [off2] ptr) mem)
 11642  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 11643  	// result: (MOVWUload [off1+int32(off2)] {sym} ptr mem)
 11644  	for {
 11645  		off1 := auxIntToInt32(v.AuxInt)
 11646  		sym := auxToSym(v.Aux)
 11647  		if v_0.Op != OpARM64ADDconst {
 11648  			break
 11649  		}
 11650  		off2 := auxIntToInt64(v_0.AuxInt)
 11651  		ptr := v_0.Args[0]
 11652  		mem := v_1
 11653  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 11654  			break
 11655  		}
 11656  		v.reset(OpARM64MOVWUload)
 11657  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 11658  		v.Aux = symToAux(sym)
 11659  		v.AddArg2(ptr, mem)
 11660  		return true
 11661  	}
 11662  	// match: (MOVWUload [off] {sym} (ADD ptr idx) mem)
 11663  	// cond: off == 0 && sym == nil
 11664  	// result: (MOVWUloadidx ptr idx mem)
 11665  	for {
 11666  		off := auxIntToInt32(v.AuxInt)
 11667  		sym := auxToSym(v.Aux)
 11668  		if v_0.Op != OpARM64ADD {
 11669  			break
 11670  		}
 11671  		idx := v_0.Args[1]
 11672  		ptr := v_0.Args[0]
 11673  		mem := v_1
 11674  		if !(off == 0 && sym == nil) {
 11675  			break
 11676  		}
 11677  		v.reset(OpARM64MOVWUloadidx)
 11678  		v.AddArg3(ptr, idx, mem)
 11679  		return true
 11680  	}
 11681  	// match: (MOVWUload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
 11682  	// cond: off == 0 && sym == nil
 11683  	// result: (MOVWUloadidx4 ptr idx mem)
 11684  	for {
 11685  		off := auxIntToInt32(v.AuxInt)
 11686  		sym := auxToSym(v.Aux)
 11687  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 2 {
 11688  			break
 11689  		}
 11690  		idx := v_0.Args[1]
 11691  		ptr := v_0.Args[0]
 11692  		mem := v_1
 11693  		if !(off == 0 && sym == nil) {
 11694  			break
 11695  		}
 11696  		v.reset(OpARM64MOVWUloadidx4)
 11697  		v.AddArg3(ptr, idx, mem)
 11698  		return true
 11699  	}
 11700  	// match: (MOVWUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11701  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 11702  	// result: (MOVWUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 11703  	for {
 11704  		off1 := auxIntToInt32(v.AuxInt)
 11705  		sym1 := auxToSym(v.Aux)
 11706  		if v_0.Op != OpARM64MOVDaddr {
 11707  			break
 11708  		}
 11709  		off2 := auxIntToInt32(v_0.AuxInt)
 11710  		sym2 := auxToSym(v_0.Aux)
 11711  		ptr := v_0.Args[0]
 11712  		mem := v_1
 11713  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 11714  			break
 11715  		}
 11716  		v.reset(OpARM64MOVWUload)
 11717  		v.AuxInt = int32ToAuxInt(off1 + off2)
 11718  		v.Aux = symToAux(mergeSym(sym1, sym2))
 11719  		v.AddArg2(ptr, mem)
 11720  		return true
 11721  	}
 11722  	// match: (MOVWUload [off] {sym} ptr (MOVWstorezero [off2] {sym2} ptr2 _))
 11723  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
 11724  	// result: (MOVDconst [0])
 11725  	for {
 11726  		off := auxIntToInt32(v.AuxInt)
 11727  		sym := auxToSym(v.Aux)
 11728  		ptr := v_0
 11729  		if v_1.Op != OpARM64MOVWstorezero {
 11730  			break
 11731  		}
 11732  		off2 := auxIntToInt32(v_1.AuxInt)
 11733  		sym2 := auxToSym(v_1.Aux)
 11734  		ptr2 := v_1.Args[0]
 11735  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
 11736  			break
 11737  		}
 11738  		v.reset(OpARM64MOVDconst)
 11739  		v.AuxInt = int64ToAuxInt(0)
 11740  		return true
 11741  	}
 11742  	// match: (MOVWUload [off] {sym} (SB) _)
 11743  	// cond: symIsRO(sym)
 11744  	// result: (MOVDconst [int64(read32(sym, int64(off), config.ctxt.Arch.ByteOrder))])
 11745  	for {
 11746  		off := auxIntToInt32(v.AuxInt)
 11747  		sym := auxToSym(v.Aux)
 11748  		if v_0.Op != OpSB || !(symIsRO(sym)) {
 11749  			break
 11750  		}
 11751  		v.reset(OpARM64MOVDconst)
 11752  		v.AuxInt = int64ToAuxInt(int64(read32(sym, int64(off), config.ctxt.Arch.ByteOrder)))
 11753  		return true
 11754  	}
 11755  	return false
 11756  }
 11757  func rewriteValueARM64_OpARM64MOVWUloadidx(v *Value) bool {
 11758  	v_2 := v.Args[2]
 11759  	v_1 := v.Args[1]
 11760  	v_0 := v.Args[0]
 11761  	// match: (MOVWUloadidx ptr (MOVDconst [c]) mem)
 11762  	// cond: is32Bit(c)
 11763  	// result: (MOVWUload [int32(c)] ptr mem)
 11764  	for {
 11765  		ptr := v_0
 11766  		if v_1.Op != OpARM64MOVDconst {
 11767  			break
 11768  		}
 11769  		c := auxIntToInt64(v_1.AuxInt)
 11770  		mem := v_2
 11771  		if !(is32Bit(c)) {
 11772  			break
 11773  		}
 11774  		v.reset(OpARM64MOVWUload)
 11775  		v.AuxInt = int32ToAuxInt(int32(c))
 11776  		v.AddArg2(ptr, mem)
 11777  		return true
 11778  	}
 11779  	// match: (MOVWUloadidx (MOVDconst [c]) ptr mem)
 11780  	// cond: is32Bit(c)
 11781  	// result: (MOVWUload [int32(c)] ptr mem)
 11782  	for {
 11783  		if v_0.Op != OpARM64MOVDconst {
 11784  			break
 11785  		}
 11786  		c := auxIntToInt64(v_0.AuxInt)
 11787  		ptr := v_1
 11788  		mem := v_2
 11789  		if !(is32Bit(c)) {
 11790  			break
 11791  		}
 11792  		v.reset(OpARM64MOVWUload)
 11793  		v.AuxInt = int32ToAuxInt(int32(c))
 11794  		v.AddArg2(ptr, mem)
 11795  		return true
 11796  	}
 11797  	// match: (MOVWUloadidx ptr (SLLconst [2] idx) mem)
 11798  	// result: (MOVWUloadidx4 ptr idx mem)
 11799  	for {
 11800  		ptr := v_0
 11801  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 2 {
 11802  			break
 11803  		}
 11804  		idx := v_1.Args[0]
 11805  		mem := v_2
 11806  		v.reset(OpARM64MOVWUloadidx4)
 11807  		v.AddArg3(ptr, idx, mem)
 11808  		return true
 11809  	}
 11810  	// match: (MOVWUloadidx (SLLconst [2] idx) ptr mem)
 11811  	// result: (MOVWUloadidx4 ptr idx mem)
 11812  	for {
 11813  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 2 {
 11814  			break
 11815  		}
 11816  		idx := v_0.Args[0]
 11817  		ptr := v_1
 11818  		mem := v_2
 11819  		v.reset(OpARM64MOVWUloadidx4)
 11820  		v.AddArg3(ptr, idx, mem)
 11821  		return true
 11822  	}
 11823  	// match: (MOVWUloadidx ptr idx (MOVWstorezeroidx ptr2 idx2 _))
 11824  	// cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
 11825  	// result: (MOVDconst [0])
 11826  	for {
 11827  		ptr := v_0
 11828  		idx := v_1
 11829  		if v_2.Op != OpARM64MOVWstorezeroidx {
 11830  			break
 11831  		}
 11832  		idx2 := v_2.Args[1]
 11833  		ptr2 := v_2.Args[0]
 11834  		if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
 11835  			break
 11836  		}
 11837  		v.reset(OpARM64MOVDconst)
 11838  		v.AuxInt = int64ToAuxInt(0)
 11839  		return true
 11840  	}
 11841  	return false
 11842  }
 11843  func rewriteValueARM64_OpARM64MOVWUloadidx4(v *Value) bool {
 11844  	v_2 := v.Args[2]
 11845  	v_1 := v.Args[1]
 11846  	v_0 := v.Args[0]
 11847  	// match: (MOVWUloadidx4 ptr (MOVDconst [c]) mem)
 11848  	// cond: is32Bit(c<<2)
 11849  	// result: (MOVWUload [int32(c)<<2] ptr mem)
 11850  	for {
 11851  		ptr := v_0
 11852  		if v_1.Op != OpARM64MOVDconst {
 11853  			break
 11854  		}
 11855  		c := auxIntToInt64(v_1.AuxInt)
 11856  		mem := v_2
 11857  		if !(is32Bit(c << 2)) {
 11858  			break
 11859  		}
 11860  		v.reset(OpARM64MOVWUload)
 11861  		v.AuxInt = int32ToAuxInt(int32(c) << 2)
 11862  		v.AddArg2(ptr, mem)
 11863  		return true
 11864  	}
 11865  	// match: (MOVWUloadidx4 ptr idx (MOVWstorezeroidx4 ptr2 idx2 _))
 11866  	// cond: isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2)
 11867  	// result: (MOVDconst [0])
 11868  	for {
 11869  		ptr := v_0
 11870  		idx := v_1
 11871  		if v_2.Op != OpARM64MOVWstorezeroidx4 {
 11872  			break
 11873  		}
 11874  		idx2 := v_2.Args[1]
 11875  		ptr2 := v_2.Args[0]
 11876  		if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2)) {
 11877  			break
 11878  		}
 11879  		v.reset(OpARM64MOVDconst)
 11880  		v.AuxInt = int64ToAuxInt(0)
 11881  		return true
 11882  	}
 11883  	return false
 11884  }
 11885  func rewriteValueARM64_OpARM64MOVWUreg(v *Value) bool {
 11886  	v_0 := v.Args[0]
 11887  	// match: (MOVWUreg x:(MOVBUload _ _))
 11888  	// result: (MOVDreg x)
 11889  	for {
 11890  		x := v_0
 11891  		if x.Op != OpARM64MOVBUload {
 11892  			break
 11893  		}
 11894  		v.reset(OpARM64MOVDreg)
 11895  		v.AddArg(x)
 11896  		return true
 11897  	}
 11898  	// match: (MOVWUreg x:(MOVHUload _ _))
 11899  	// result: (MOVDreg x)
 11900  	for {
 11901  		x := v_0
 11902  		if x.Op != OpARM64MOVHUload {
 11903  			break
 11904  		}
 11905  		v.reset(OpARM64MOVDreg)
 11906  		v.AddArg(x)
 11907  		return true
 11908  	}
 11909  	// match: (MOVWUreg x:(MOVWUload _ _))
 11910  	// result: (MOVDreg x)
 11911  	for {
 11912  		x := v_0
 11913  		if x.Op != OpARM64MOVWUload {
 11914  			break
 11915  		}
 11916  		v.reset(OpARM64MOVDreg)
 11917  		v.AddArg(x)
 11918  		return true
 11919  	}
 11920  	// match: (MOVWUreg x:(MOVBUloadidx _ _ _))
 11921  	// result: (MOVDreg x)
 11922  	for {
 11923  		x := v_0
 11924  		if x.Op != OpARM64MOVBUloadidx {
 11925  			break
 11926  		}
 11927  		v.reset(OpARM64MOVDreg)
 11928  		v.AddArg(x)
 11929  		return true
 11930  	}
 11931  	// match: (MOVWUreg x:(MOVHUloadidx _ _ _))
 11932  	// result: (MOVDreg x)
 11933  	for {
 11934  		x := v_0
 11935  		if x.Op != OpARM64MOVHUloadidx {
 11936  			break
 11937  		}
 11938  		v.reset(OpARM64MOVDreg)
 11939  		v.AddArg(x)
 11940  		return true
 11941  	}
 11942  	// match: (MOVWUreg x:(MOVWUloadidx _ _ _))
 11943  	// result: (MOVDreg x)
 11944  	for {
 11945  		x := v_0
 11946  		if x.Op != OpARM64MOVWUloadidx {
 11947  			break
 11948  		}
 11949  		v.reset(OpARM64MOVDreg)
 11950  		v.AddArg(x)
 11951  		return true
 11952  	}
 11953  	// match: (MOVWUreg x:(MOVHUloadidx2 _ _ _))
 11954  	// result: (MOVDreg x)
 11955  	for {
 11956  		x := v_0
 11957  		if x.Op != OpARM64MOVHUloadidx2 {
 11958  			break
 11959  		}
 11960  		v.reset(OpARM64MOVDreg)
 11961  		v.AddArg(x)
 11962  		return true
 11963  	}
 11964  	// match: (MOVWUreg x:(MOVWUloadidx4 _ _ _))
 11965  	// result: (MOVDreg x)
 11966  	for {
 11967  		x := v_0
 11968  		if x.Op != OpARM64MOVWUloadidx4 {
 11969  			break
 11970  		}
 11971  		v.reset(OpARM64MOVDreg)
 11972  		v.AddArg(x)
 11973  		return true
 11974  	}
 11975  	// match: (MOVWUreg x:(MOVBUreg _))
 11976  	// result: (MOVDreg x)
 11977  	for {
 11978  		x := v_0
 11979  		if x.Op != OpARM64MOVBUreg {
 11980  			break
 11981  		}
 11982  		v.reset(OpARM64MOVDreg)
 11983  		v.AddArg(x)
 11984  		return true
 11985  	}
 11986  	// match: (MOVWUreg x:(MOVHUreg _))
 11987  	// result: (MOVDreg x)
 11988  	for {
 11989  		x := v_0
 11990  		if x.Op != OpARM64MOVHUreg {
 11991  			break
 11992  		}
 11993  		v.reset(OpARM64MOVDreg)
 11994  		v.AddArg(x)
 11995  		return true
 11996  	}
 11997  	// match: (MOVWUreg x:(MOVWUreg _))
 11998  	// result: (MOVDreg x)
 11999  	for {
 12000  		x := v_0
 12001  		if x.Op != OpARM64MOVWUreg {
 12002  			break
 12003  		}
 12004  		v.reset(OpARM64MOVDreg)
 12005  		v.AddArg(x)
 12006  		return true
 12007  	}
 12008  	// match: (MOVWUreg (ANDconst [c] x))
 12009  	// result: (ANDconst [c&(1<<32-1)] x)
 12010  	for {
 12011  		if v_0.Op != OpARM64ANDconst {
 12012  			break
 12013  		}
 12014  		c := auxIntToInt64(v_0.AuxInt)
 12015  		x := v_0.Args[0]
 12016  		v.reset(OpARM64ANDconst)
 12017  		v.AuxInt = int64ToAuxInt(c & (1<<32 - 1))
 12018  		v.AddArg(x)
 12019  		return true
 12020  	}
 12021  	// match: (MOVWUreg (MOVDconst [c]))
 12022  	// result: (MOVDconst [int64(uint32(c))])
 12023  	for {
 12024  		if v_0.Op != OpARM64MOVDconst {
 12025  			break
 12026  		}
 12027  		c := auxIntToInt64(v_0.AuxInt)
 12028  		v.reset(OpARM64MOVDconst)
 12029  		v.AuxInt = int64ToAuxInt(int64(uint32(c)))
 12030  		return true
 12031  	}
 12032  	// match: (MOVWUreg (SLLconst [sc] x))
 12033  	// cond: isARM64BFMask(sc, 1<<32-1, sc)
 12034  	// result: (UBFIZ [armBFAuxInt(sc, arm64BFWidth(1<<32-1, sc))] x)
 12035  	for {
 12036  		if v_0.Op != OpARM64SLLconst {
 12037  			break
 12038  		}
 12039  		sc := auxIntToInt64(v_0.AuxInt)
 12040  		x := v_0.Args[0]
 12041  		if !(isARM64BFMask(sc, 1<<32-1, sc)) {
 12042  			break
 12043  		}
 12044  		v.reset(OpARM64UBFIZ)
 12045  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, arm64BFWidth(1<<32-1, sc)))
 12046  		v.AddArg(x)
 12047  		return true
 12048  	}
 12049  	// match: (MOVWUreg (SRLconst [sc] x))
 12050  	// cond: isARM64BFMask(sc, 1<<32-1, 0)
 12051  	// result: (UBFX [armBFAuxInt(sc, 32)] x)
 12052  	for {
 12053  		if v_0.Op != OpARM64SRLconst {
 12054  			break
 12055  		}
 12056  		sc := auxIntToInt64(v_0.AuxInt)
 12057  		x := v_0.Args[0]
 12058  		if !(isARM64BFMask(sc, 1<<32-1, 0)) {
 12059  			break
 12060  		}
 12061  		v.reset(OpARM64UBFX)
 12062  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, 32))
 12063  		v.AddArg(x)
 12064  		return true
 12065  	}
 12066  	return false
 12067  }
 12068  func rewriteValueARM64_OpARM64MOVWload(v *Value) bool {
 12069  	v_1 := v.Args[1]
 12070  	v_0 := v.Args[0]
 12071  	b := v.Block
 12072  	config := b.Func.Config
 12073  	// match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem)
 12074  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 12075  	// result: (MOVWload [off1+int32(off2)] {sym} ptr mem)
 12076  	for {
 12077  		off1 := auxIntToInt32(v.AuxInt)
 12078  		sym := auxToSym(v.Aux)
 12079  		if v_0.Op != OpARM64ADDconst {
 12080  			break
 12081  		}
 12082  		off2 := auxIntToInt64(v_0.AuxInt)
 12083  		ptr := v_0.Args[0]
 12084  		mem := v_1
 12085  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 12086  			break
 12087  		}
 12088  		v.reset(OpARM64MOVWload)
 12089  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 12090  		v.Aux = symToAux(sym)
 12091  		v.AddArg2(ptr, mem)
 12092  		return true
 12093  	}
 12094  	// match: (MOVWload [off] {sym} (ADD ptr idx) mem)
 12095  	// cond: off == 0 && sym == nil
 12096  	// result: (MOVWloadidx ptr idx mem)
 12097  	for {
 12098  		off := auxIntToInt32(v.AuxInt)
 12099  		sym := auxToSym(v.Aux)
 12100  		if v_0.Op != OpARM64ADD {
 12101  			break
 12102  		}
 12103  		idx := v_0.Args[1]
 12104  		ptr := v_0.Args[0]
 12105  		mem := v_1
 12106  		if !(off == 0 && sym == nil) {
 12107  			break
 12108  		}
 12109  		v.reset(OpARM64MOVWloadidx)
 12110  		v.AddArg3(ptr, idx, mem)
 12111  		return true
 12112  	}
 12113  	// match: (MOVWload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
 12114  	// cond: off == 0 && sym == nil
 12115  	// result: (MOVWloadidx4 ptr idx mem)
 12116  	for {
 12117  		off := auxIntToInt32(v.AuxInt)
 12118  		sym := auxToSym(v.Aux)
 12119  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 2 {
 12120  			break
 12121  		}
 12122  		idx := v_0.Args[1]
 12123  		ptr := v_0.Args[0]
 12124  		mem := v_1
 12125  		if !(off == 0 && sym == nil) {
 12126  			break
 12127  		}
 12128  		v.reset(OpARM64MOVWloadidx4)
 12129  		v.AddArg3(ptr, idx, mem)
 12130  		return true
 12131  	}
 12132  	// match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 12133  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 12134  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 12135  	for {
 12136  		off1 := auxIntToInt32(v.AuxInt)
 12137  		sym1 := auxToSym(v.Aux)
 12138  		if v_0.Op != OpARM64MOVDaddr {
 12139  			break
 12140  		}
 12141  		off2 := auxIntToInt32(v_0.AuxInt)
 12142  		sym2 := auxToSym(v_0.Aux)
 12143  		ptr := v_0.Args[0]
 12144  		mem := v_1
 12145  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 12146  			break
 12147  		}
 12148  		v.reset(OpARM64MOVWload)
 12149  		v.AuxInt = int32ToAuxInt(off1 + off2)
 12150  		v.Aux = symToAux(mergeSym(sym1, sym2))
 12151  		v.AddArg2(ptr, mem)
 12152  		return true
 12153  	}
 12154  	// match: (MOVWload [off] {sym} ptr (MOVWstorezero [off2] {sym2} ptr2 _))
 12155  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
 12156  	// result: (MOVDconst [0])
 12157  	for {
 12158  		off := auxIntToInt32(v.AuxInt)
 12159  		sym := auxToSym(v.Aux)
 12160  		ptr := v_0
 12161  		if v_1.Op != OpARM64MOVWstorezero {
 12162  			break
 12163  		}
 12164  		off2 := auxIntToInt32(v_1.AuxInt)
 12165  		sym2 := auxToSym(v_1.Aux)
 12166  		ptr2 := v_1.Args[0]
 12167  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
 12168  			break
 12169  		}
 12170  		v.reset(OpARM64MOVDconst)
 12171  		v.AuxInt = int64ToAuxInt(0)
 12172  		return true
 12173  	}
 12174  	return false
 12175  }
 12176  func rewriteValueARM64_OpARM64MOVWloadidx(v *Value) bool {
 12177  	v_2 := v.Args[2]
 12178  	v_1 := v.Args[1]
 12179  	v_0 := v.Args[0]
 12180  	// match: (MOVWloadidx ptr (MOVDconst [c]) mem)
 12181  	// cond: is32Bit(c)
 12182  	// result: (MOVWload [int32(c)] ptr mem)
 12183  	for {
 12184  		ptr := v_0
 12185  		if v_1.Op != OpARM64MOVDconst {
 12186  			break
 12187  		}
 12188  		c := auxIntToInt64(v_1.AuxInt)
 12189  		mem := v_2
 12190  		if !(is32Bit(c)) {
 12191  			break
 12192  		}
 12193  		v.reset(OpARM64MOVWload)
 12194  		v.AuxInt = int32ToAuxInt(int32(c))
 12195  		v.AddArg2(ptr, mem)
 12196  		return true
 12197  	}
 12198  	// match: (MOVWloadidx (MOVDconst [c]) ptr mem)
 12199  	// cond: is32Bit(c)
 12200  	// result: (MOVWload [int32(c)] ptr mem)
 12201  	for {
 12202  		if v_0.Op != OpARM64MOVDconst {
 12203  			break
 12204  		}
 12205  		c := auxIntToInt64(v_0.AuxInt)
 12206  		ptr := v_1
 12207  		mem := v_2
 12208  		if !(is32Bit(c)) {
 12209  			break
 12210  		}
 12211  		v.reset(OpARM64MOVWload)
 12212  		v.AuxInt = int32ToAuxInt(int32(c))
 12213  		v.AddArg2(ptr, mem)
 12214  		return true
 12215  	}
 12216  	// match: (MOVWloadidx ptr (SLLconst [2] idx) mem)
 12217  	// result: (MOVWloadidx4 ptr idx mem)
 12218  	for {
 12219  		ptr := v_0
 12220  		if v_1.Op != OpARM64SLLconst || auxIntToInt64(v_1.AuxInt) != 2 {
 12221  			break
 12222  		}
 12223  		idx := v_1.Args[0]
 12224  		mem := v_2
 12225  		v.reset(OpARM64MOVWloadidx4)
 12226  		v.AddArg3(ptr, idx, mem)
 12227  		return true
 12228  	}
 12229  	// match: (MOVWloadidx (SLLconst [2] idx) ptr mem)
 12230  	// result: (MOVWloadidx4 ptr idx mem)
 12231  	for {
 12232  		if v_0.Op != OpARM64SLLconst || auxIntToInt64(v_0.AuxInt) != 2 {
 12233  			break
 12234  		}
 12235  		idx := v_0.Args[0]
 12236  		ptr := v_1
 12237  		mem := v_2
 12238  		v.reset(OpARM64MOVWloadidx4)
 12239  		v.AddArg3(ptr, idx, mem)
 12240  		return true
 12241  	}
 12242  	// match: (MOVWloadidx ptr idx (MOVWstorezeroidx ptr2 idx2 _))
 12243  	// cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
 12244  	// result: (MOVDconst [0])
 12245  	for {
 12246  		ptr := v_0
 12247  		idx := v_1
 12248  		if v_2.Op != OpARM64MOVWstorezeroidx {
 12249  			break
 12250  		}
 12251  		idx2 := v_2.Args[1]
 12252  		ptr2 := v_2.Args[0]
 12253  		if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
 12254  			break
 12255  		}
 12256  		v.reset(OpARM64MOVDconst)
 12257  		v.AuxInt = int64ToAuxInt(0)
 12258  		return true
 12259  	}
 12260  	return false
 12261  }
 12262  func rewriteValueARM64_OpARM64MOVWloadidx4(v *Value) bool {
 12263  	v_2 := v.Args[2]
 12264  	v_1 := v.Args[1]
 12265  	v_0 := v.Args[0]
 12266  	// match: (MOVWloadidx4 ptr (MOVDconst [c]) mem)
 12267  	// cond: is32Bit(c<<2)
 12268  	// result: (MOVWload [int32(c)<<2] ptr mem)
 12269  	for {
 12270  		ptr := v_0
 12271  		if v_1.Op != OpARM64MOVDconst {
 12272  			break
 12273  		}
 12274  		c := auxIntToInt64(v_1.AuxInt)
 12275  		mem := v_2
 12276  		if !(is32Bit(c << 2)) {
 12277  			break
 12278  		}
 12279  		v.reset(OpARM64MOVWload)
 12280  		v.AuxInt = int32ToAuxInt(int32(c) << 2)
 12281  		v.AddArg2(ptr, mem)
 12282  		return true
 12283  	}
 12284  	// match: (MOVWloadidx4 ptr idx (MOVWstorezeroidx4 ptr2 idx2 _))
 12285  	// cond: isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2)
 12286  	// result: (MOVDconst [0])
 12287  	for {
 12288  		ptr := v_0
 12289  		idx := v_1
 12290  		if v_2.Op != OpARM64MOVWstorezeroidx4 {
 12291  			break
 12292  		}
 12293  		idx2 := v_2.Args[1]
 12294  		ptr2 := v_2.Args[0]
 12295  		if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2)) {
 12296  			break
 12297  		}
 12298  		v.reset(OpARM64MOVDconst)
 12299  		v.AuxInt = int64ToAuxInt(0)
 12300  		return true
 12301  	}
 12302  	return false
 12303  }
 12304  func rewriteValueARM64_OpARM64MOVWreg(v *Value) bool {
 12305  	v_0 := v.Args[0]
 12306  	// match: (MOVWreg x:(MOVBload _ _))
 12307  	// result: (MOVDreg x)
 12308  	for {
 12309  		x := v_0
 12310  		if x.Op != OpARM64MOVBload {
 12311  			break
 12312  		}
 12313  		v.reset(OpARM64MOVDreg)
 12314  		v.AddArg(x)
 12315  		return true
 12316  	}
 12317  	// match: (MOVWreg x:(MOVBUload _ _))
 12318  	// result: (MOVDreg x)
 12319  	for {
 12320  		x := v_0
 12321  		if x.Op != OpARM64MOVBUload {
 12322  			break
 12323  		}
 12324  		v.reset(OpARM64MOVDreg)
 12325  		v.AddArg(x)
 12326  		return true
 12327  	}
 12328  	// match: (MOVWreg x:(MOVHload _ _))
 12329  	// result: (MOVDreg x)
 12330  	for {
 12331  		x := v_0
 12332  		if x.Op != OpARM64MOVHload {
 12333  			break
 12334  		}
 12335  		v.reset(OpARM64MOVDreg)
 12336  		v.AddArg(x)
 12337  		return true
 12338  	}
 12339  	// match: (MOVWreg x:(MOVHUload _ _))
 12340  	// result: (MOVDreg x)
 12341  	for {
 12342  		x := v_0
 12343  		if x.Op != OpARM64MOVHUload {
 12344  			break
 12345  		}
 12346  		v.reset(OpARM64MOVDreg)
 12347  		v.AddArg(x)
 12348  		return true
 12349  	}
 12350  	// match: (MOVWreg x:(MOVWload _ _))
 12351  	// result: (MOVDreg x)
 12352  	for {
 12353  		x := v_0
 12354  		if x.Op != OpARM64MOVWload {
 12355  			break
 12356  		}
 12357  		v.reset(OpARM64MOVDreg)
 12358  		v.AddArg(x)
 12359  		return true
 12360  	}
 12361  	// match: (MOVWreg x:(MOVBloadidx _ _ _))
 12362  	// result: (MOVDreg x)
 12363  	for {
 12364  		x := v_0
 12365  		if x.Op != OpARM64MOVBloadidx {
 12366  			break
 12367  		}
 12368  		v.reset(OpARM64MOVDreg)
 12369  		v.AddArg(x)
 12370  		return true
 12371  	}
 12372  	// match: (MOVWreg x:(MOVBUloadidx _ _ _))
 12373  	// result: (MOVDreg x)
 12374  	for {
 12375  		x := v_0
 12376  		if x.Op != OpARM64MOVBUloadidx {
 12377  			break
 12378  		}
 12379  		v.reset(OpARM64MOVDreg)
 12380  		v.AddArg(x)
 12381  		return true
 12382  	}
 12383  	// match: (MOVWreg x:(MOVHloadidx _ _ _))
 12384  	// result: (MOVDreg x)
 12385  	for {
 12386  		x := v_0
 12387  		if x.Op != OpARM64MOVHloadidx {
 12388  			break
 12389  		}
 12390  		v.reset(OpARM64MOVDreg)
 12391  		v.AddArg(x)
 12392  		return true
 12393  	}
 12394  	// match: (MOVWreg x:(MOVHUloadidx _ _ _))
 12395  	// result: (MOVDreg x)
 12396  	for {
 12397  		x := v_0
 12398  		if x.Op != OpARM64MOVHUloadidx {
 12399  			break
 12400  		}
 12401  		v.reset(OpARM64MOVDreg)
 12402  		v.AddArg(x)
 12403  		return true
 12404  	}
 12405  	// match: (MOVWreg x:(MOVWloadidx _ _ _))
 12406  	// result: (MOVDreg x)
 12407  	for {
 12408  		x := v_0
 12409  		if x.Op != OpARM64MOVWloadidx {
 12410  			break
 12411  		}
 12412  		v.reset(OpARM64MOVDreg)
 12413  		v.AddArg(x)
 12414  		return true
 12415  	}
 12416  	// match: (MOVWreg x:(MOVHloadidx2 _ _ _))
 12417  	// result: (MOVDreg x)
 12418  	for {
 12419  		x := v_0
 12420  		if x.Op != OpARM64MOVHloadidx2 {
 12421  			break
 12422  		}
 12423  		v.reset(OpARM64MOVDreg)
 12424  		v.AddArg(x)
 12425  		return true
 12426  	}
 12427  	// match: (MOVWreg x:(MOVHUloadidx2 _ _ _))
 12428  	// result: (MOVDreg x)
 12429  	for {
 12430  		x := v_0
 12431  		if x.Op != OpARM64MOVHUloadidx2 {
 12432  			break
 12433  		}
 12434  		v.reset(OpARM64MOVDreg)
 12435  		v.AddArg(x)
 12436  		return true
 12437  	}
 12438  	// match: (MOVWreg x:(MOVWloadidx4 _ _ _))
 12439  	// result: (MOVDreg x)
 12440  	for {
 12441  		x := v_0
 12442  		if x.Op != OpARM64MOVWloadidx4 {
 12443  			break
 12444  		}
 12445  		v.reset(OpARM64MOVDreg)
 12446  		v.AddArg(x)
 12447  		return true
 12448  	}
 12449  	// match: (MOVWreg x:(MOVBreg _))
 12450  	// result: (MOVDreg x)
 12451  	for {
 12452  		x := v_0
 12453  		if x.Op != OpARM64MOVBreg {
 12454  			break
 12455  		}
 12456  		v.reset(OpARM64MOVDreg)
 12457  		v.AddArg(x)
 12458  		return true
 12459  	}
 12460  	// match: (MOVWreg x:(MOVBUreg _))
 12461  	// result: (MOVDreg x)
 12462  	for {
 12463  		x := v_0
 12464  		if x.Op != OpARM64MOVBUreg {
 12465  			break
 12466  		}
 12467  		v.reset(OpARM64MOVDreg)
 12468  		v.AddArg(x)
 12469  		return true
 12470  	}
 12471  	// match: (MOVWreg x:(MOVHreg _))
 12472  	// result: (MOVDreg x)
 12473  	for {
 12474  		x := v_0
 12475  		if x.Op != OpARM64MOVHreg {
 12476  			break
 12477  		}
 12478  		v.reset(OpARM64MOVDreg)
 12479  		v.AddArg(x)
 12480  		return true
 12481  	}
 12482  	// match: (MOVWreg x:(MOVWreg _))
 12483  	// result: (MOVDreg x)
 12484  	for {
 12485  		x := v_0
 12486  		if x.Op != OpARM64MOVWreg {
 12487  			break
 12488  		}
 12489  		v.reset(OpARM64MOVDreg)
 12490  		v.AddArg(x)
 12491  		return true
 12492  	}
 12493  	// match: (MOVWreg (MOVDconst [c]))
 12494  	// result: (MOVDconst [int64(int32(c))])
 12495  	for {
 12496  		if v_0.Op != OpARM64MOVDconst {
 12497  			break
 12498  		}
 12499  		c := auxIntToInt64(v_0.AuxInt)
 12500  		v.reset(OpARM64MOVDconst)
 12501  		v.AuxInt = int64ToAuxInt(int64(int32(c)))
 12502  		return true
 12503  	}
 12504  	// match: (MOVWreg (SLLconst [lc] x))
 12505  	// cond: lc < 32
 12506  	// result: (SBFIZ [armBFAuxInt(lc, 32-lc)] x)
 12507  	for {
 12508  		if v_0.Op != OpARM64SLLconst {
 12509  			break
 12510  		}
 12511  		lc := auxIntToInt64(v_0.AuxInt)
 12512  		x := v_0.Args[0]
 12513  		if !(lc < 32) {
 12514  			break
 12515  		}
 12516  		v.reset(OpARM64SBFIZ)
 12517  		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(lc, 32-lc))
 12518  		v.AddArg(x)
 12519  		return true
 12520  	}
 12521  	return false
 12522  }
 12523  func rewriteValueARM64_OpARM64MOVWstore(v *Value) bool {
 12524  	v_2 := v.Args[2]
 12525  	v_1 := v.Args[1]
 12526  	v_0 := v.Args[0]
 12527  	b := v.Block
 12528  	config := b.Func.Config
 12529  	// match: (MOVWstore [off] {sym} ptr (FMOVSfpgp val) mem)
 12530  	// result: (FMOVSstore [off] {sym} ptr val mem)
 12531  	for {
 12532  		off := auxIntToInt32(v.AuxInt)
 12533  		sym := auxToSym(v.Aux)
 12534  		ptr := v_0
 12535  		if v_1.Op != OpARM64FMOVSfpgp {
 12536  			break
 12537  		}
 12538  		val := v_1.Args[0]
 12539  		mem := v_2
 12540  		v.reset(OpARM64FMOVSstore)
 12541  		v.AuxInt = int32ToAuxInt(off)
 12542  		v.Aux = symToAux(sym)
 12543  		v.AddArg3(ptr, val, mem)
 12544  		return true
 12545  	}
 12546  	// match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 12547  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 12548  	// result: (MOVWstore [off1+int32(off2)] {sym} ptr val mem)
 12549  	for {
 12550  		off1 := auxIntToInt32(v.AuxInt)
 12551  		sym := auxToSym(v.Aux)
 12552  		if v_0.Op != OpARM64ADDconst {
 12553  			break
 12554  		}
 12555  		off2 := auxIntToInt64(v_0.AuxInt)
 12556  		ptr := v_0.Args[0]
 12557  		val := v_1
 12558  		mem := v_2
 12559  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 12560  			break
 12561  		}
 12562  		v.reset(OpARM64MOVWstore)
 12563  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
 12564  		v.Aux = symToAux(sym)
 12565  		v.AddArg3(ptr, val, mem)
 12566  		return true
 12567  	}
 12568  	// match: (MOVWstore [off] {sym} (ADD ptr idx) val mem)
 12569  	// cond: off == 0 && sym == nil
 12570  	// result: (MOVWstoreidx ptr idx val mem)
 12571  	for {
 12572  		off := auxIntToInt32(v.AuxInt)
 12573  		sym := auxToSym(v.Aux)
 12574  		if v_0.Op != OpARM64ADD {
 12575  			break
 12576  		}
 12577  		idx := v_0.Args[1]
 12578  		ptr := v_0.Args[0]
 12579  		val := v_1
 12580  		mem := v_2
 12581  		if !(off == 0 && sym == nil) {
 12582  			break
 12583  		}
 12584  		v.reset(OpARM64MOVWstoreidx)
 12585  		v.AddArg4(ptr, idx, val, mem)
 12586  		return true
 12587  	}
 12588  	// match: (MOVWstore [off] {sym} (ADDshiftLL [2] ptr idx) val mem)
 12589  	// cond: off == 0 && sym == nil
 12590  	// result: (MOVWstoreidx4 ptr idx val mem)
 12591  	for {
 12592  		off := auxIntToInt32(v.AuxInt)
 12593  		sym := auxToSym(v.Aux)
 12594  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 2 {
 12595  			break
 12596  		}
 12597  		idx := v_0.Args[1]
 12598  		ptr := v_0.Args[0]
 12599  		val := v_1
 12600  		mem := v_2
 12601  		if !(off == 0 && sym == nil) {
 12602  			break
 12603  		}
 12604  		v.reset(OpARM64MOVWstoreidx4)
 12605  		v.AddArg4(ptr, idx, val, mem)
 12606  		return true
 12607  	}
 12608  	// match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 12609  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
 12610  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
 12611  	for {
 12612  		off1 := auxIntToInt32(v.AuxInt)
 12613  		sym1 := auxToSym(v.Aux)
 12614  		if v_0.Op != OpARM64MOVDaddr {
 12615  			break
 12616  		}
 12617  		off2 := auxIntToInt32(v_0.AuxInt)
 12618  		sym2 := auxToSym(v_0.Aux)
 12619  		ptr := v_0.Args[0]
 12620  		val := v_1
 12621  		mem := v_2
 12622  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
 12623  			break
 12624  		}
 12625  		v.reset(OpARM64MOVWstore)
 12626  		v.AuxInt = int32ToAuxInt(off1 + off2)
 12627  		v.Aux = symToAux(mergeSym(sym1, sym2))
 12628  		v.AddArg3(ptr, val, mem)
 12629  		return true
 12630  	}
 12631  	// match: (MOVWstore [off] {sym} ptr (MOVDconst [0]) mem)
 12632  	// result: (MOVWstorezero [off] {sym} ptr mem)
 12633  	for {
 12634  		off := auxIntToInt32(v.AuxInt)
 12635  		sym := auxToSym(v.Aux)
 12636  		ptr := v_0
 12637  		if v_1.Op != OpARM64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
 12638  			break
 12639  		}
 12640  		mem := v_2
 12641  		v.reset(OpARM64MOVWstorezero)
 12642  		v.AuxInt = int32ToAuxInt(off)
 12643  		v.Aux = symToAux(sym)
 12644  		v.AddArg2(ptr, mem)
 12645  		return true
 12646  	}
 12647  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
 12648  	// result: (MOVWstore [off] {sym} ptr x mem)
 12649  	for {
 12650  		off := auxIntToInt32(v.AuxInt)
 12651  		sym := auxToSym(v.Aux)
 12652  		ptr := v_0
 12653  		if v_1.Op != OpARM64MOVWreg {
 12654  			break
 12655  		}
 12656  		x := v_1.Args[0]
 12657  		mem := v_2
 12658  		v.reset(OpARM64MOVWstore)
 12659  		v.AuxInt = int32ToAuxInt(off)
 12660  		v.Aux = symToAux(sym)
 12661  		v.AddArg3(ptr, x, mem)
 12662  		return true
 12663  	}
 12664  	// match: (MOVWstore [off] {sym} ptr (MOVWUreg x) mem)
 12665  	// result: (MOVWstore [off] {sym} ptr x mem)
 12666  	for {
 12667  		off := auxIntToInt32(v.AuxInt)
 12668  		sym := auxToSym(v.Aux)
 12669  		ptr := v_0
 12670  		if v_1.Op != OpARM64MOVWUreg {
 12671  			break
 12672  		}
 12673  		x := v_1.Args[0]
 12674  		mem := v_2
 12675  		v.reset(OpARM64MOVWstore)
 12676  		v.AuxInt = int32ToAuxInt(off)
 12677  		v.Aux = symToAux(sym)
 12678  		v.AddArg3(ptr, x, mem)
 12679  		return true
 12680  	}
 12681  	// match: (MOVWstore [i] {s} ptr0 (SRLconst [32] w) x:(MOVWstore [i-4] {s} ptr1 w mem))
 12682  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
 12683  	// result: (MOVDstore [i-4] {s} ptr0 w mem)
 12684  	for {
 12685  		i := auxIntToInt32(v.AuxInt)
 12686  		s := auxToSym(v.Aux)
 12687  		ptr0 := v_0
 12688  		if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 32 {
 12689  			break
 12690  		}
 12691  		w := v_1.Args[0]
 12692  		x := v_2
 12693  		if x.Op != OpARM64MOVWstore || auxIntToInt32(x.AuxInt) != i-4 || auxToSym(x.Aux) != s {
 12694  			break
 12695  		}
 12696  		mem := x.Args[2]
 12697  		ptr1 := x.Args[0]
 12698  		if w != x.Args[1] || !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
 12699  			break
 12700  		}
 12701  		v.reset(OpARM64MOVDstore)
 12702  		v.AuxInt = int32ToAuxInt(i - 4)
 12703  		v.Aux = symToAux(s)
 12704  		v.AddArg3(ptr0, w, mem)
 12705  		return true
 12706  	}
 12707  	// match: (MOVWstore [4] {s} (ADD ptr0 idx0) (SRLconst [32] w) x:(MOVWstoreidx ptr1 idx1 w mem))
 12708  	// cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
 12709  	// result: (MOVDstoreidx ptr1 idx1 w mem)
 12710  	for {
 12711  		if auxIntToInt32(v.AuxInt) != 4 {
 12712  			break
 12713  		}
 12714  		s := auxToSym(v.Aux)
 12715  		if v_0.Op != OpARM64ADD {
 12716  			break
 12717  		}
 12718  		_ = v_0.Args[1]
 12719  		v_0_0 := v_0.Args[0]
 12720  		v_0_1 := v_0.Args[1]
 12721  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 12722  			ptr0 := v_0_0
 12723  			idx0 := v_0_1
 12724  			if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 32 {
 12725  				continue
 12726  			}
 12727  			w := v_1.Args[0]
 12728  			x := v_2
 12729  			if x.Op != OpARM64MOVWstoreidx {
 12730  				continue
 12731  			}
 12732  			mem := x.Args[3]
 12733  			ptr1 := x.Args[0]
 12734  			idx1 := x.Args[1]
 12735  			if w != x.Args[2] || !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
 12736  				continue
 12737  			}
 12738  			v.reset(OpARM64MOVDstoreidx)
 12739  			v.AddArg4(ptr1, idx1, w, mem)
 12740  			return true
 12741  		}
 12742  		break
 12743  	}
 12744  	// match: (MOVWstore [4] {s} (ADDshiftLL [2] ptr0 idx0) (SRLconst [32] w) x:(MOVWstoreidx4 ptr1 idx1 w mem))
 12745  	// cond: x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)
 12746  	// result: (MOVDstoreidx ptr1 (SLLconst <idx1.Type> [2] idx1) w mem)
 12747  	for {
 12748  		if auxIntToInt32(v.AuxInt) != 4 {
 12749  			break
 12750  		}
 12751  		s := auxToSym(v.Aux)
 12752  		if v_0.Op != OpARM64ADDshiftLL || auxIntToInt64(v_0.AuxInt) != 2 {
 12753  			break
 12754  		}
 12755  		idx0 := v_0.Args[1]
 12756  		ptr0 := v_0.Args[0]
 12757  		if v_1.Op != OpARM64SRLconst || auxIntToInt64(v_1.AuxInt) != 32 {
 12758  			break
 12759  		}
 12760  		w := v_1.Args[0]
 12761  		x := v_2
 12762  		if x.Op != OpARM64MOVWstoreidx4 {
 12763  			break
 12764  		}
 12765  		mem := x.Args[3]
 12766  		ptr1 := x.Args[0]
 12767  		idx1 := x.Args[1]
 12768  		if w != x.Args[2] || !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
 12769  			break
 12770  		}
 12771  		v.reset(OpARM64MOVDstoreidx)
 12772  		v0 := b.NewValue0(v.Pos, OpARM64SLLconst, idx1.Type)
 12773  		v0.AuxInt = int64ToAuxInt(2)
 12774  		v0.AddArg(idx1)
 12775  		v.AddArg4(ptr1, v0, w, mem)
 12776  		return true
 12777  	}
 12778  	// match: (MOVWstore [i] {s} ptr0 (SRLconst [j] w) x:(MOVWstore [i-4] {s} ptr1 w0:(SRLconst [j-32] w) mem))
 12779  	// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
 12780  	// result: (MOVDstore [i-4] {s} ptr0 w0 mem)
 12781  	for {