1 // Copyright 2018 The Go Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style
3 // license that can be found in the LICENSE file.
4
5 TEXT errors(SB),$0
6 AND $1, RSP // ERROR "illegal source register"
7 ANDS $1, R0, RSP // ERROR "illegal combination"
8 ADDSW R7->32, R14, R13 // ERROR "shift amount out of range 0 to 31"
9 ADD R1.UXTB<<5, R2, R3 // ERROR "shift amount out of range 0 to 4"
10 ADDS R1.UXTX<<7, R2, R3 // ERROR "shift amount out of range 0 to 4"
11 ADDS R5, R6, RSP // ERROR "illegal destination register"
12 SUBS R5, R6, RSP // ERROR "illegal destination register"
13 ADDSW R5, R6, RSP // ERROR "illegal destination register"
14 SUBSW R5, R6, RSP // ERROR "illegal destination register"
15 ADDS $0xff, R6, RSP // ERROR "illegal destination register"
16 ADDS $0xffff0, R6, RSP // ERROR "illegal destination register"
17 ADDS $0x1000100010001000, R6, RSP // ERROR "illegal destination register"
18 ADDS $0x10001000100011, R6, RSP // ERROR "illegal destination register"
19 ADDSW $0xff, R6, RSP // ERROR "illegal destination register"
20 ADDSW $0xffff0, R6, RSP // ERROR "illegal destination register"
21 ADDSW $0x1000100010001000, R6, RSP // ERROR "illegal destination register"
22 ADDSW $0x10001000100011, R6, RSP // ERROR "illegal destination register"
23 SUBS $0xff, R6, RSP // ERROR "illegal destination register"
24 SUBS $0xffff0, R6, RSP // ERROR "illegal destination register"
25 SUBS $0x1000100010001000, R6, RSP // ERROR "illegal destination register"
26 SUBS $0x10001000100011, R6, RSP // ERROR "illegal destination register"
27 SUBSW $0xff, R6, RSP // ERROR "illegal destination register"
28 SUBSW $0xffff0, R6, RSP // ERROR "illegal destination register"
29 SUBSW $0x1000100010001000, R6, RSP // ERROR "illegal destination register"
30 SUBSW $0x10001000100011, R6, RSP // ERROR "illegal destination register"
31 AND $0x22220000, R2, RSP // ERROR "illegal combination"
32 ANDS $0x22220000, R2, RSP // ERROR "illegal combination"
33 ADD R1, R2, R3, R4 // ERROR "illegal combination"
34 BICW R7@>33, R5, R16 // ERROR "shift amount out of range 0 to 31"
35 NEGW R7<<33, R5 // ERROR "shift amount out of range 0 to 31"
36 NEGSW R7<<33, R5 // ERROR "shift amount out of range 0 to 31"
37 ADD R7@>2, R5, R16 // ERROR "unsupported shift operator"
38 ADDW R7@>2, R5, R16 // ERROR "unsupported shift operator"
39 ADDS R7@>2, R5, R16 // ERROR "unsupported shift operator"
40 ADDSW R7@>2, R5, R16 // ERROR "unsupported shift operator"
41 SUB R7@>2, R5, R16 // ERROR "unsupported shift operator"
42 SUBW R7@>2, R5, R16 // ERROR "unsupported shift operator"
43 SUBS R7@>2, R5, R16 // ERROR "unsupported shift operator"
44 SUBSW R7@>2, R5, R16 // ERROR "unsupported shift operator"
45 CMP R7@>2, R5 // ERROR "unsupported shift operator"
46 CMPW R7@>2, R5 // ERROR "unsupported shift operator"
47 CMN R7@>2, R5 // ERROR "unsupported shift operator"
48 CMNW R7@>2, R5 // ERROR "unsupported shift operator"
49 NEG R7@>2, R5 // ERROR "unsupported shift operator"
50 NEGW R7@>2, R5 // ERROR "unsupported shift operator"
51 NEGS R7@>2, R5 // ERROR "unsupported shift operator"
52 NEGSW R7@>2, R5 // ERROR "unsupported shift operator"
53 CINC CS, R2, R3, R4 // ERROR "illegal combination"
54 CSEL LT, R1, R2 // ERROR "illegal combination"
55 CINC AL, R2, R3 // ERROR "invalid condition"
56 CINC NV, R2, R3 // ERROR "invalid condition"
57 CINVW AL, R2, R3 // ERROR "invalid condition"
58 CINV NV, R2, R3 // ERROR "invalid condition"
59 CNEG AL, R2, R3 // ERROR "invalid condition"
60 CNEGW NV, R2, R3 // ERROR "invalid condition"
61 CSET AL, R2 // ERROR "invalid condition"
62 CSET NV, R2 // ERROR "invalid condition"
63 CSETMW AL, R2 // ERROR "invalid condition"
64 CSETM NV, R2 // ERROR "invalid condition"
65 LDP.P 8(R2), (R2, R3) // ERROR "constrained unpredictable behavior"
66 LDP.W 8(R3), (R2, R3) // ERROR "constrained unpredictable behavior"
67 LDP (R1), (R2, R2) // ERROR "constrained unpredictable behavior"
68 LDP (R0), (F0, F1) // ERROR "invalid register pair"
69 LDXPW (RSP), (R2, R2) // ERROR "constrained unpredictable behavior"
70 LDAXPW (R5), (R2, R2) // ERROR "constrained unpredictable behavior"
71 MOVD.P 300(R2), R3 // ERROR "offset out of range [-256,255]"
72 MOVD.P R3, 344(R2) // ERROR "offset out of range [-256,255]"
73 MOVD (R3)(R7.SXTX<<2), R8 // ERROR "invalid index shift amount"
74 MOVWU (R5)(R4.UXTW<<3), R10 // ERROR "invalid index shift amount"
75 MOVWU (R5)(R4<<1), R10 // ERROR "invalid index shift amount"
76 MOVB (R5)(R4.SXTW<<5), R10 // ERROR "invalid index shift amount"
77 MOVH R5, (R6)(R2<<3) // ERROR "invalid index shift amount"
78 MADD R1, R2, R3 // ERROR "illegal combination"
79 MOVD.P R1, 8(R1) // ERROR "constrained unpredictable behavior"
80 MOVD.W 16(R2), R2 // ERROR "constrained unpredictable behavior"
81 STP (F2, F3), (R0) // ERROR "invalid register pair"
82 STP.W (R1, R2), 8(R1) // ERROR "constrained unpredictable behavior"
83 STP.P (R1, R2), 8(R2) // ERROR "constrained unpredictable behavior"
84 STLXP (R6, R11), (RSP), R6 // ERROR "constrained unpredictable behavior"
85 STXP (R6, R11), (R2), R2 // ERROR "constrained unpredictable behavior"
86 STLXR R3, (RSP), R3 // ERROR "constrained unpredictable behavior"
87 STXR R3, (R4), R4 // ERROR "constrained unpredictable behavior"
88 STLXRB R2, (R5), R5 // ERROR "constrained unpredictable behavior"
89 VLD1 (R8)(R13), [V2.B16] // ERROR "illegal combination"
90 VLD1 8(R9), [V2.B16] // ERROR "illegal combination"
91 VST1 [V1.B16], (R8)(R13) // ERROR "illegal combination"
92 VST1 [V1.B16], 9(R2) // ERROR "illegal combination"
93 VLD1 8(R8)(R13), [V2.B16] // ERROR "illegal combination"
94 VMOV V8.D[2], V12.D[1] // ERROR "register element index out of range 0 to 1"
95 VMOV V8.S[4], V12.S[1] // ERROR "register element index out of range 0 to 3"
96 VMOV V8.H[8], V12.H[1] // ERROR "register element index out of range 0 to 7"
97 VMOV V8.B[16], V12.B[1] // ERROR "register element index out of range 0 to 15"
98 VMOV V8.D[0], V12.S[1] // ERROR "operand mismatch"
99 VMOV V8.D[0], V12.H[1] // ERROR "operand mismatch"
100 VMOV V8.D[0], V12.B[1] // ERROR "operand mismatch"
101 VMOV V8.S[0], V12.H[1] // ERROR "operand mismatch"
102 VMOV V8.S[0], V12.B[1] // ERROR "operand mismatch"
103 VMOV V8.H[0], V12.B[1] // ERROR "operand mismatch"
104 VMOV V8.B[16], R3 // ERROR "register element index out of range 0 to 15"
105 VMOV V8.H[9], R3 // ERROR "register element index out of range 0 to 7"
106 VMOV V8.S[4], R3 // ERROR "register element index out of range 0 to 3"
107 VMOV V8.D[2], R3 // ERROR "register element index out of range 0 to 1"
108 VDUP V8.B[16], V3.B16 // ERROR "register element index out of range 0 to 15"
109 VDUP V8.B[17], V3.B8 // ERROR "register element index out of range 0 to 15"
110 VDUP V8.H[9], V3.H4 // ERROR "register element index out of range 0 to 7"
111 VDUP V8.H[9], V3.H8 // ERROR "register element index out of range 0 to 7"
112 VDUP V8.S[4], V3.S2 // ERROR "register element index out of range 0 to 3"
113 VDUP V8.S[4], V3.S4 // ERROR "register element index out of range 0 to 3"
114 VDUP V8.D[2], V3.D2 // ERROR "register element index out of range 0 to 1"
115 VFMLA V1.D2, V12.D2, V3.S2 // ERROR "operand mismatch"
116 VFMLA V1.S2, V12.S2, V3.D2 // ERROR "operand mismatch"
117 VFMLA V1.S4, V12.S2, V3.D2 // ERROR "operand mismatch"
118 VFMLA V1.H4, V12.H4, V3.D2 // ERROR "operand mismatch"
119 VFMLS V1.S2, V12.S2, V3.S4 // ERROR "operand mismatch"
120 VFMLS V1.S2, V12.D2, V3.S4 // ERROR "operand mismatch"
121 VFMLS V1.S2, V12.S4, V3.D2 // ERROR "operand mismatch"
122 VFMLA V1.B8, V12.B8, V3.B8 // ERROR "invalid arrangement"
123 VFMLA V1.B16, V12.B16, V3.B16 // ERROR "invalid arrangement"
124 VFMLA V1.H4, V12.H4, V3.H4 // ERROR "invalid arrangement"
125 VFMLA V1.H8, V12.H8, V3.H8 // ERROR "invalid arrangement"
126 VFMLA V1.H4, V12.H4, V3.H4 // ERROR "invalid arrangement"
127 VFMLS V1.B8, V12.B8, V3.B8 // ERROR "invalid arrangement"
128 VFMLS V1.B16, V12.B16, V3.B16 // ERROR "invalid arrangement"
129 VFMLS V1.H4, V12.H4, V3.H4 // ERROR "invalid arrangement"
130 VFMLS V1.H8, V12.H8, V3.H8 // ERROR "invalid arrangement"
131 VFMLS V1.H4, V12.H4, V3.H4 // ERROR "invalid arrangement"
132 VST1.P [V4.S4,V5.S4], 48(R1) // ERROR "invalid post-increment offset"
133 VST1.P [V4.S4], 8(R1) // ERROR "invalid post-increment offset"
134 VLD1.P 32(R1), [V8.S4, V9.S4, V10.S4] // ERROR "invalid post-increment offset"
135 VLD1.P 48(R1), [V7.S4, V8.S4, V9.S4, V10.S4] // ERROR "invalid post-increment offset"
136 VPMULL V1.D1, V2.H4, V3.Q1 // ERROR "invalid arrangement"
137 VPMULL V1.H4, V2.H4, V3.Q1 // ERROR "operand mismatch"
138 VPMULL V1.D2, V2.D2, V3.Q1 // ERROR "operand mismatch"
139 VPMULL V1.B16, V2.B16, V3.H8 // ERROR "operand mismatch"
140 VPMULL2 V1.D2, V2.H4, V3.Q1 // ERROR "invalid arrangement"
141 VPMULL2 V1.H4, V2.H4, V3.Q1 // ERROR "operand mismatch"
142 VPMULL2 V1.D1, V2.D1, V3.Q1 // ERROR "operand mismatch"
143 VPMULL2 V1.B8, V2.B8, V3.H8 // ERROR "operand mismatch"
144 VEXT $8, V1.B16, V2.B8, V2.B16 // ERROR "invalid arrangement"
145 VEXT $8, V1.H8, V2.H8, V2.H8 // ERROR "invalid arrangement"
146 VRBIT V1.B16, V2.B8 // ERROR "invalid arrangement"
147 VRBIT V1.H4, V2.H4 // ERROR "invalid arrangement"
148 VUSHR $56, V1.D2, V2.H4 // ERROR "invalid arrangement"
149 VUSHR $127, V1.D2, V2.D2 // ERROR "shift out of range"
150 VLD1.P (R8)(R9.SXTX<<2), [V2.B16] // ERROR "invalid extended register"
151 VLD1.P (R8)(R9<<2), [V2.B16] // ERROR "invalid extended register"
152 VST1.P [V1.B16], (R8)(R9.UXTW) // ERROR "invalid extended register"
153 VST1.P [V1.B16], (R8)(R9<<1) // ERROR "invalid extended register"
154 VREV64 V1.H4, V2.H8 // ERROR "invalid arrangement"
155 VREV64 V1.D1, V2.D1 // ERROR "invalid arrangement"
156 VREV16 V1.D1, V2.D1 // ERROR "invalid arrangement"
157 VREV16 V1.B8, V2.B16 // ERROR "invalid arrangement"
158 VREV16 V1.H4, V2.H4 // ERROR "invalid arrangement"
159 FLDPQ (R0), (R1, R2) // ERROR "invalid register pair"
160 FLDPQ (R1), (F2, F2) // ERROR "constrained unpredictable behavior"
161 FSTPQ (R1, R2), (R0) // ERROR "invalid register pair"
162 FLDPD (R0), (R1, R2) // ERROR "invalid register pair"
163 FLDPD (R1), (F2, F2) // ERROR "constrained unpredictable behavior"
164 FLDPS (R2), (F3, F3) // ERROR "constrained unpredictable behavior"
165 FSTPD (R1, R2), (R0) // ERROR "invalid register pair"
166 FMOVS (F2), F0 // ERROR "illegal combination"
167 FMOVD F0, (F1) // ERROR "illegal combination"
168 LDADDAD R5, (R6), RSP // ERROR "illegal combination"
169 LDADDAW R5, (R6), RSP // ERROR "illegal combination"
170 LDADDAH R5, (R6), RSP // ERROR "illegal combination"
171 LDADDAB R5, (R6), RSP // ERROR "illegal combination"
172 LDADDALD R5, (R6), RSP // ERROR "illegal combination"
173 LDADDALW R5, (R6), RSP // ERROR "illegal combination"
174 LDADDALH R5, (R6), RSP // ERROR "illegal combination"
175 LDADDALB R5, (R6), RSP // ERROR "illegal combination"
176 LDADDD R5, (R6), RSP // ERROR "illegal combination"
177 LDADDW R5, (R6), RSP // ERROR "illegal combination"
178 LDADDH R5, (R6), RSP // ERROR "illegal combination"
179 LDADDB R5, (R6), RSP // ERROR "illegal combination"
180 LDADDLD R5, (R6), RSP // ERROR "illegal combination"
181 LDADDLW R5, (R6), RSP // ERROR "illegal combination"
182 LDADDLH R5, (R6), RSP // ERROR "illegal combination"
183 LDADDLB R5, (R6), RSP // ERROR "illegal combination"
184 LDCLRAD R5, (R6), RSP // ERROR "illegal combination"
185 LDCLRAW R5, (R6), RSP // ERROR "illegal combination"
186 LDCLRAH R5, (R6), RSP // ERROR "illegal combination"
187 LDCLRAB R5, (R6), RSP // ERROR "illegal combination"
188 LDCLRALD R5, (R6), RSP // ERROR "illegal combination"
189 LDCLRALW R5, (R6), RSP // ERROR "illegal combination"
190 LDCLRALH R5, (R6), RSP // ERROR "illegal combination"
191 LDCLRALB R5, (R6), RSP // ERROR "illegal combination"
192 LDCLRD R5, (R6), RSP // ERROR "illegal combination"
193 LDCLRW R5, (R6), RSP // ERROR "illegal combination"
194 LDCLRH R5, (R6), RSP // ERROR "illegal combination"
195 LDCLRB R5, (R6), RSP // ERROR "illegal combination"
196 LDCLRLD R5, (R6), RSP // ERROR "illegal combination"
197 LDCLRLW R5, (R6), RSP // ERROR "illegal combination"
198 LDCLRLH R5, (R6), RSP // ERROR "illegal combination"
199 LDCLRLB R5, (R6), RSP // ERROR "illegal combination"
200 LDEORAD R5, (R6), RSP // ERROR "illegal combination"
201 LDEORAW R5, (R6), RSP // ERROR "illegal combination"
202 LDEORAH R5, (R6), RSP // ERROR "illegal combination"
203 LDEORAB R5, (R6), RSP // ERROR "illegal combination"
204 LDEORALD R5, (R6), RSP // ERROR "illegal combination"
205 LDEORALW R5, (R6), RSP // ERROR "illegal combination"
206 LDEORALH R5, (R6), RSP // ERROR "illegal combination"
207 LDEORALB R5, (R6), RSP // ERROR "illegal combination"
208 LDEORD R5, (R6), RSP // ERROR "illegal combination"
209 LDEORW R5, (R6), RSP // ERROR "illegal combination"
210 LDEORH R5, (R6), RSP // ERROR "illegal combination"
211 LDEORB R5, (R6), RSP // ERROR "illegal combination"
212 LDEORLD R5, (R6), RSP // ERROR "illegal combination"
213 LDEORLW R5, (R6), RSP // ERROR "illegal combination"
214 LDEORLH R5, (R6), RSP // ERROR "illegal combination"
215 LDEORLB R5, (R6), RSP // ERROR "illegal combination"
216 LDORAD R5, (R6), RSP // ERROR "illegal combination"
217 LDORAW R5, (R6), RSP // ERROR "illegal combination"
218 LDORAH R5, (R6), RSP // ERROR "illegal combination"
219 LDORAB R5, (R6), RSP // ERROR "illegal combination"
220 LDORALD R5, (R6), RSP // ERROR "illegal combination"
221 LDORALW R5, (R6), RSP // ERROR "illegal combination"
222 LDORALH R5, (R6), RSP // ERROR "illegal combination"
223 LDORALB R5, (R6), RSP // ERROR "illegal combination"
224 LDORD R5, (R6), RSP // ERROR "illegal combination"
225 LDORW R5, (R6), RSP // ERROR "illegal combination"
226 LDORH R5, (R6), RSP // ERROR "illegal combination"
227 LDORB R5, (R6), RSP // ERROR "illegal combination"
228 LDORLD R5, (R6), RSP // ERROR "illegal combination"
229 LDORLW R5, (R6), RSP // ERROR "illegal combination"
230 LDORLH R5, (R6), RSP // ERROR "illegal combination"
231 LDORLB R5, (R6), RSP // ERROR "illegal combination"
232 SWPAD R5, (R6), RSP // ERROR "illegal combination"
233 SWPAW R5, (R6), RSP // ERROR "illegal combination"
234 SWPAH R5, (R6), RSP // ERROR "illegal combination"
235 SWPAB R5, (R6), RSP // ERROR "illegal combination"
236 SWPALD R5, (R6), RSP // ERROR "illegal combination"
237 SWPALW R5, (R6), RSP // ERROR "illegal combination"
238 SWPALH R5, (R6), RSP // ERROR "illegal combination"
239 SWPALB R5, (R6), RSP // ERROR "illegal combination"
240 SWPD R5, (R6), RSP // ERROR "illegal combination"
241 SWPW R5, (R6), RSP // ERROR "illegal combination"
242 SWPH R5, (R6), RSP // ERROR "illegal combination"
243 SWPB R5, (R6), RSP // ERROR "illegal combination"
244 SWPLD R5, (R6), RSP // ERROR "illegal combination"
245 SWPLW R5, (R6), RSP // ERROR "illegal combination"
246 SWPLH R5, (R6), RSP // ERROR "illegal combination"
247 SWPLB R5, (R6), RSP // ERROR "illegal combination"
248 STXR R5, (R6), RSP // ERROR "illegal combination"
249 STXRW R5, (R6), RSP // ERROR "illegal combination"
250 STLXR R5, (R6), RSP // ERROR "illegal combination"
251 STLXRW R5, (R6), RSP // ERROR "illegal combination"
252 STXP (R5, R7), (R6), RSP // ERROR "illegal combination"
253 STXPW (R5, R7), (R6), RSP // ERROR "illegal combination"
254 STLXP (R5, R7), (R6), RSP // ERROR "illegal combination"
255 STLXP (R5, R7), (R6), RSP // ERROR "illegal combination"
256 MSR OSLAR_EL1, R5 // ERROR "illegal combination"
257 MRS R11, AIDR_EL1 // ERROR "illegal combination"
258 MSR R6, AIDR_EL1 // ERROR "system register is not writable"
259 MSR R6, AMCFGR_EL0 // ERROR "system register is not writable"
260 MSR R6, AMCGCR_EL0 // ERROR "system register is not writable"
261 MSR R6, AMEVTYPER00_EL0 // ERROR "system register is not writable"
262 MSR R6, AMEVTYPER01_EL0 // ERROR "system register is not writable"
263 MSR R6, AMEVTYPER02_EL0 // ERROR "system register is not writable"
264 MSR R6, AMEVTYPER03_EL0 // ERROR "system register is not writable"
265 MSR R6, AMEVTYPER04_EL0 // ERROR "system register is not writable"
266 MSR R6, AMEVTYPER05_EL0 // ERROR "system register is not writable"
267 MSR R6, AMEVTYPER06_EL0 // ERROR "system register is not writable"
268 MSR R6, AMEVTYPER07_EL0 // ERROR "system register is not writable"
269 MSR R6, AMEVTYPER08_EL0 // ERROR "system register is not writable"
270 MSR R6, AMEVTYPER09_EL0 // ERROR "system register is not writable"
271 MSR R6, AMEVTYPER010_EL0 // ERROR "system register is not writable"
272 MSR R6, AMEVTYPER011_EL0 // ERROR "system register is not writable"
273 MSR R6, AMEVTYPER012_EL0 // ERROR "system register is not writable"
274 MSR R6, AMEVTYPER013_EL0 // ERROR "system register is not writable"
275 MSR R6, AMEVTYPER014_EL0 // ERROR "system register is not writable"
276 MSR R6, AMEVTYPER015_EL0 // ERROR "system register is not writable"
277 MSR R6, CCSIDR2_EL1 // ERROR "system register is not writable"
278 MSR R6, CCSIDR_EL1 // ERROR "system register is not writable"
279 MSR R6, CLIDR_EL1 // ERROR "system register is not writable"
280 MSR R6, CNTPCT_EL0 // ERROR "system register is not writable"
281 MSR R6, CNTVCT_EL0 // ERROR "system register is not writable"
282 MSR R6, CTR_EL0 // ERROR "system register is not writable"
283 MSR R6, CurrentEL // ERROR "system register is not writable"
284 MSR R6, DBGAUTHSTATUS_EL1 // ERROR "system register is not writable"
285 MSR R6, DBGDTRRX_EL0 // ERROR "system register is not writable"
286 MSR R6, DCZID_EL0 // ERROR "system register is not writable"
287 MSR R6, ERRIDR_EL1 // ERROR "system register is not writable"
288 MSR R6, ERXFR_EL1 // ERROR "system register is not writable"
289 MSR R6, ERXPFGF_EL1 // ERROR "system register is not writable"
290 MSR R6, GMID_EL1 // ERROR "system register is not writable"
291 MSR R6, ICC_HPPIR0_EL1 // ERROR "system register is not writable"
292 MSR R6, ICC_HPPIR1_EL1 // ERROR "system register is not writable"
293 MSR R6, ICC_IAR0_EL1 // ERROR "system register is not writable"
294 MSR R6, ICC_IAR1_EL1 // ERROR "system register is not writable"
295 MSR R6, ICC_RPR_EL1 // ERROR "system register is not writable"
296 MSR R6, ICV_HPPIR0_EL1 // ERROR "system register is not writable"
297 MSR R6, ICV_HPPIR1_EL1 // ERROR "system register is not writable"
298 MSR R6, ICV_IAR0_EL1 // ERROR "system register is not writable"
299 MSR R6, ICV_IAR1_EL1 // ERROR "system register is not writable"
300 MSR R6, ICV_RPR_EL1 // ERROR "system register is not writable"
301 MSR R6, ID_AA64AFR0_EL1 // ERROR "system register is not writable"
302 MSR R6, ID_AA64AFR1_EL1 // ERROR "system register is not writable"
303 MSR R6, ID_AA64DFR0_EL1 // ERROR "system register is not writable"
304 MSR R6, ID_AA64DFR1_EL1 // ERROR "system register is not writable"
305 MSR R6, ID_AA64ISAR0_EL1 // ERROR "system register is not writable"
306 MSR R6, ID_AA64ISAR1_EL1 // ERROR "system register is not writable"
307 MSR R6, ID_AA64MMFR0_EL1 // ERROR "system register is not writable"
308 MSR R6, ID_AA64MMFR1_EL1 // ERROR "system register is not writable"
309 MSR R6, ID_AA64MMFR2_EL1 // ERROR "system register is not writable"
310 MSR R6, ID_AA64PFR0_EL1 // ERROR "system register is not writable"
311 MSR R6, ID_AA64PFR1_EL1 // ERROR "system register is not writable"
312 MSR R6, ID_AA64ZFR0_EL1 // ERROR "system register is not writable"
313 MSR R6, ID_AFR0_EL1 // ERROR "system register is not writable"
314 MSR R6, ID_DFR0_EL1 // ERROR "system register is not writable"
315 MSR R6, ID_ISAR0_EL1 // ERROR "system register is not writable"
316 MSR R6, ID_ISAR1_EL1 // ERROR "system register is not writable"
317 MSR R6, ID_ISAR2_EL1 // ERROR "system register is not writable"
318 MSR R6, ID_ISAR3_EL1 // ERROR "system register is not writable"
319 MSR R6, ID_ISAR4_EL1 // ERROR "system register is not writable"
320 MSR R6, ID_ISAR5_EL1 // ERROR "system register is not writable"
321 MSR R6, ID_ISAR6_EL1 // ERROR "system register is not writable"
322 MSR R6, ID_MMFR0_EL1 // ERROR "system register is not writable"
323 MSR R6, ID_MMFR1_EL1 // ERROR "system register is not writable"
324 MSR R6, ID_MMFR2_EL1 // ERROR "system register is not writable"
325 MSR R6, ID_MMFR3_EL1 // ERROR "system register is not writable"
326 MSR R6, ID_MMFR4_EL1 // ERROR "system register is not writable"
327 MSR R6, ID_PFR0_EL1 // ERROR "system register is not writable"
328 MSR R6, ID_PFR1_EL1 // ERROR "system register is not writable"
329 MSR R6, ID_PFR2_EL1 // ERROR "system register is not writable"
330 MSR R6, ISR_EL1 // ERROR "system register is not writable"
331 MSR R6, LORID_EL1 // ERROR "system register is not writable"
332 MSR R6, MDCCSR_EL0 // ERROR "system register is not writable"
333 MSR R6, MDRAR_EL1 // ERROR "system register is not writable"
334 MSR R6, MIDR_EL1 // ERROR "system register is not writable"
335 MSR R6, MPAMIDR_EL1 // ERROR "system register is not writable"
336 MSR R6, MPIDR_EL1 // ERROR "system register is not writable"
337 MSR R6, MVFR0_EL1 // ERROR "system register is not writable"
338 MSR R6, MVFR1_EL1 // ERROR "system register is not writable"
339 MSR R6, MVFR2_EL1 // ERROR "system register is not writable"
340 MSR R6, OSLSR_EL1 // ERROR "system register is not writable"
341 MSR R6, PMBIDR_EL1 // ERROR "system register is not writable"
342 MSR R6, PMCEID0_EL0 // ERROR "system register is not writable"
343 MSR R6, PMCEID1_EL0 // ERROR "system register is not writable"
344 MSR R6, PMMIR_EL1 // ERROR "system register is not writable"
345 MSR R6, PMSIDR_EL1 // ERROR "system register is not writable"
346 MSR R6, REVIDR_EL1 // ERROR "system register is not writable"
347 MSR R6, RNDR // ERROR "system register is not writable"
348 MRS DBGDTRTX_EL0, R5 // ERROR "system register is not readable"
349 MRS ICV_DIR_EL1, R5 // ERROR "system register is not readable"
350 MRS ICC_SGI1R_EL1, R5 // ERROR "system register is not readable"
351 MRS ICC_SGI0R_EL1, R5 // ERROR "system register is not readable"
352 MRS ICC_EOIR1_EL1, R5 // ERROR "system register is not readable"
353 MRS ICC_EOIR0_EL1, R5 // ERROR "system register is not readable"
354 MRS ICC_DIR_EL1, R5 // ERROR "system register is not readable"
355 MRS ICC_ASGI1R_EL1, R5 // ERROR "system register is not readable"
356 MRS ICV_EOIR0_EL1, R3 // ERROR "system register is not readable"
357 MRS ICV_EOIR1_EL1, R3 // ERROR "system register is not readable"
358 MRS PMSWINC_EL0, R3 // ERROR "system register is not readable"
359 MRS OSLAR_EL1, R3 // ERROR "system register is not readable"
360 VLD3R.P 24(R15), [V15.H4,V16.H4,V17.H4] // ERROR "invalid post-increment offset"
361 VBIT V1.H4, V12.H4, V3.H4 // ERROR "invalid arrangement"
362 VBSL V1.D2, V12.D2, V3.D2 // ERROR "invalid arrangement"
363 VUXTL V30.D2, V30.H8 // ERROR "operand mismatch"
364 VUXTL2 V20.B8, V21.H8 // ERROR "operand mismatch"
365 VUXTL V3.D2, V4.B8 // ERROR "operand mismatch"
366 VUZP1 V0.B8, V30.B8, V1.B16 // ERROR "operand mismatch"
367 VUZP2 V0.Q1, V30.Q1, V1.Q1 // ERROR "invalid arrangement"
368 VUSHLL $0, V30.D2, V30.H8 // ERROR "operand mismatch"
369 VUSHLL2 $0, V20.B8, V21.H8 // ERROR "operand mismatch"
370 VUSHLL $8, V30.B8, V30.H8 // ERROR "shift amount out of range"
371 VUSHLL2 $32, V30.S4, V2.D2 // ERROR "shift amount out of range"
372 VBIF V0.B8, V1.B8, V2.B16 // ERROR "operand mismatch"
373 VBIF V0.D2, V1.D2, V2.D2 // ERROR "invalid arrangement"
374 VUADDW V9.B8, V12.H8, V14.B8 // ERROR "invalid arrangement"
375 VUADDW2 V9.B8, V12.S4, V14.S4 // ERROR "operand mismatch"
376 VUMAX V1.D2, V2.D2, V3.D2 // ERROR "invalid arrangement"
377 VUMIN V1.D2, V2.D2, V3.D2 // ERROR "invalid arrangement"
378 VUMAX V1.B8, V2.B8, V3.B16 // ERROR "operand mismatch"
379 VUMIN V1.H4, V2.S4, V3.H4 // ERROR "operand mismatch"
380 VSLI $64, V7.D2, V8.D2 // ERROR "shift out of range"
381 VUSRA $0, V7.D2, V8.D2 // ERROR "shift out of range"
382 CASPD (R3, R4), (R2), (R8, R9) // ERROR "source register pair must start from even register"
383 CASPD (R2, R3), (R2), (R9, R10) // ERROR "destination register pair must start from even register"
384 CASPD (R2, R4), (R2), (R8, R9) // ERROR "source register pair must be contiguous"
385 CASPD (R2, R3), (R2), (R8, R10) // ERROR "destination register pair must be contiguous"
386 ADD R1>>2, RSP, R3 // ERROR "illegal combination"
387 ADDS R2<<3, R3, RSP // ERROR "illegal destination register"
388 CMP R1<<5, RSP // ERROR "shift amount out of range 0 to 4"
389 MOVD.P y+8(FP), R1 // ERROR "illegal combination"
390 MOVD.W x-8(SP), R1 // ERROR "illegal combination"
391 LDP.P x+8(FP), (R0, R1) // ERROR "illegal combination"
392 LDP.W x+8(SP), (R0, R1) // ERROR "illegal combination"
393 ADD $0x1234567, R27, R3 // ERROR "cannot use REGTMP as source"
394 ADD $0x3fffffffc000, R27, R5 // ERROR "cannot use REGTMP as source"
395 AND $0x22220000, R27, R4 // ERROR "cannot use REGTMP as source"
396 ANDW $0x6006000060060, R27, R5 // ERROR "cannot use REGTMP as source"
397 STP (R3, R4), 0x1234567(R27) // ERROR "REGTMP used in large offset store"
398 LDP 0x1234567(R27), (R3, R4) // ERROR "REGTMP used in large offset load"
399 STP (R26, R27), 700(R2) // ERROR "cannot use REGTMP as source"
400 MOVK $0, R10 // ERROR "zero shifts cannot be handled correctly"
401 MOVK $(0<<32), R10 // ERROR "zero shifts cannot be handled correctly"
402 TLBI PLDL1KEEP // ERROR "illegal argument"
403 TLBI VMALLE1IS, R0 // ERROR "extraneous register at operand 2"
404 TLBI ALLE3OS, ZR // ERROR "extraneous register at operand 2"
405 TLBI VAE1IS // ERROR "missing register at operand 2"
406 TLBI RVALE3 // ERROR "missing register at operand 2"
407 DC PLDL1KEEP // ERROR "illegal argument"
408 DC VMALLE1IS // ERROR "illegal argument"
409 DC VAE1IS // ERROR "illegal argument"
410 DC VAE1IS, R0 // ERROR "illegal argument"
411 DC IVAC // ERROR "missing register at operand 2"
412 AESD V1.B8, V2.B8 // ERROR "invalid arrangement"
413 AESE V1.D2, V2.D2 // ERROR "invalid arrangement"
414 AESIMC V1.S4, V2.S4 // ERROR "invalid arrangement"
415 SHA1SU1 V1.B16, V2.B16 // ERROR "invalid arrangement"
416 SHA256SU1 V1.B16, V2.B16, V3.B16 // ERROR "invalid arrangement"
417 SHA512SU1 V1.S4, V2.S4, V3.S4 // ERROR "invalid arrangement"
418 SHA256H V1.D2, V2, V3 // ERROR "invalid arrangement"
419 SHA512H V1.S4, V2, V3 // ERROR "invalid arrangement"
420 AESE V1.B16, V2.B8 // ERROR "invalid arrangement"
421 SHA256SU1 V1.S4, V2.B16, V3.S4 // ERROR "invalid arrangement"
422 SHA1H V1.B16, V2.B16 // ERROR "invalid operands"
423 RET
424
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