Text file src/cmd/asm/internal/asm/testdata/amd64error.s

     1  // Copyright 2016 The Go Authors. All rights reserved.
     2  // Use of this source code is governed by a BSD-style
     3  // license that can be found in the LICENSE file.
     4  
     5  TEXT errors(SB),$0
     6  	MOVL	foo<>(SB)(AX), AX	// ERROR "invalid instruction"
     7  	MOVL	(AX)(SP*1), AX		// ERROR "invalid instruction"
     8  	EXTRACTPS $4, X2, (BX)          // ERROR "invalid instruction"
     9  	EXTRACTPS $-1, X2, (BX)         // ERROR "invalid instruction"
    10  	// VSIB addressing does not permit non-vector (X/Y)
    11  	// scaled index register.
    12  	VPGATHERDQ X12,(R13)(AX*2), X11 // ERROR "invalid instruction"
    13  	VPGATHERDQ X2, 664(BX*1), X1    // ERROR "invalid instruction"
    14  	VPGATHERDQ Y2, (BP)(AX*2), Y1   // ERROR "invalid instruction"
    15  	VPGATHERDQ Y5, 664(DX*8), Y6    // ERROR "invalid instruction"
    16  	VPGATHERDQ Y5, (DX), Y0         // ERROR "invalid instruction"
    17  	// VM/X rejects Y index register.
    18  	VPGATHERDQ Y5, 664(Y14*8), Y6   // ERROR "invalid instruction"
    19  	VPGATHERQQ X2, (BP)(Y7*2), X1   // ERROR "invalid instruction"
    20  	// VM/Y rejects X index register.
    21  	VPGATHERQQ Y2, (BP)(X7*2), Y1   // ERROR "invalid instruction"
    22  	VPGATHERDD Y5, -8(X14*8), Y6    // ERROR "invalid instruction"
    23  	// No VSIB for legacy instructions.
    24  	MOVL (AX)(X0*1), AX             // ERROR "invalid instruction"
    25  	MOVL (AX)(Y0*1), AX             // ERROR "invalid instruction"
    26  	// VSIB/VM is invalid without vector index.
    27  	// TODO(quasilyte): improve error message (#21860).
    28  	// "invalid VSIB address (missing vector index)"
    29  	VPGATHERQQ Y2, (BP), Y1         // ERROR "invalid instruction"
    30  	// AVX2GATHER mask/index/dest #UD cases.
    31  	VPGATHERQQ Y2, (BP)(X2*2), Y2   // ERROR "mask, index, and destination registers should be distinct"
    32  	VPGATHERQQ Y2, (BP)(X2*2), Y7   // ERROR "mask, index, and destination registers should be distinct"
    33  	VPGATHERQQ Y2, (BP)(X7*2), Y2   // ERROR "mask, index, and destination registers should be distinct"
    34  	VPGATHERQQ Y7, (BP)(X2*2), Y2   // ERROR "mask, index, and destination registers should be distinct"
    35  	VPGATHERDQ X2, 664(X2*8), X2    // ERROR "mask, index, and destination registers should be distinct"
    36  	VPGATHERDQ X2, 664(X2*8), X7    // ERROR "mask, index, and destination registers should be distinct"
    37  	VPGATHERDQ X2, 664(X7*8), X2    // ERROR "mask, index, and destination registers should be distinct"
    38  	VPGATHERDQ X7, 664(X2*8), X2    // ERROR "mask, index, and destination registers should be distinct"
    39  	// Non-X0 for Yxr0 should produce an error
    40  	BLENDVPD X1, (BX), X2           // ERROR "invalid instruction"
    41  	// Check offset overflow. Must fit in int32.
    42  	MOVQ 2147483647+1(AX), AX       // ERROR "offset too large"
    43  	MOVQ 3395469782(R10), R8        // ERROR "offset too large"
    44  	LEAQ 3395469782(AX), AX         // ERROR "offset too large"
    45  	ADDQ 3395469782(AX), AX         // ERROR "offset too large"
    46  	ADDL 3395469782(AX), AX         // ERROR "offset too large"
    47  	ADDW 3395469782(AX), AX         // ERROR "offset too large"
    48  	LEAQ 433954697820(AX), AX       // ERROR "offset too large"
    49  	ADDQ 433954697820(AX), AX       // ERROR "offset too large"
    50  	ADDL 433954697820(AX), AX       // ERROR "offset too large"
    51  	ADDW 433954697820(AX), AX       // ERROR "offset too large"
    52  	// Pseudo-registers should not be used as scaled index.
    53  	CALL (AX)(PC*1)                 // ERROR "invalid instruction"
    54  	CALL (AX)(SB*1)                 // ERROR "invalid instruction"
    55  	CALL (AX)(FP*1)                 // ERROR "invalid instruction"
    56  	// Forbid memory operands for MOV CR/DR. See #24981.
    57  	MOVQ CR0, (AX)                  // ERROR "invalid instruction"
    58  	MOVQ CR2, (AX)                  // ERROR "invalid instruction"
    59  	MOVQ CR3, (AX)                  // ERROR "invalid instruction"
    60  	MOVQ CR4, (AX)                  // ERROR "invalid instruction"
    61  	MOVQ CR8, (AX)                  // ERROR "invalid instruction"
    62  	MOVQ (AX), CR0                  // ERROR "invalid instruction"
    63  	MOVQ (AX), CR2                  // ERROR "invalid instruction"
    64  	MOVQ (AX), CR3                  // ERROR "invalid instruction"
    65  	MOVQ (AX), CR4                  // ERROR "invalid instruction"
    66  	MOVQ (AX), CR8                  // ERROR "invalid instruction"
    67  	MOVQ DR0, (AX)                  // ERROR "invalid instruction"
    68  	MOVQ DR2, (AX)                  // ERROR "invalid instruction"
    69  	MOVQ DR3, (AX)                  // ERROR "invalid instruction"
    70  	MOVQ DR6, (AX)                  // ERROR "invalid instruction"
    71  	MOVQ DR7, (AX)                  // ERROR "invalid instruction"
    72  	MOVQ (AX), DR0                  // ERROR "invalid instruction"
    73  	MOVQ (AX), DR2                  // ERROR "invalid instruction"
    74  	MOVQ (AX), DR3                  // ERROR "invalid instruction"
    75  	MOVQ (AX), DR6                  // ERROR "invalid instruction"
    76  	MOVQ (AX), DR7                  // ERROR "invalid instruction"
    77  	// AVX512GATHER index/index #UD cases.
    78  	VPGATHERQQ (BP)(X2*2), K1, X2   // ERROR "index and destination registers should be distinct"
    79  	VPGATHERQQ (BP)(Y15*2), K1, Y15 // ERROR "index and destination registers should be distinct"
    80  	VPGATHERQQ (BP)(Z20*2), K1, Z20 // ERROR "index and destination registers should be distinct"
    81  	VPGATHERDQ (BP)(X2*2), K1, X2   // ERROR "index and destination registers should be distinct"
    82  	VPGATHERDQ (BP)(X15*2), K1, Y15 // ERROR "index and destination registers should be distinct"
    83  	VPGATHERDQ (BP)(Y20*2), K1, Z20 // ERROR "index and destination registers should be distinct"
    84  	// Instructions without EVEX variant can't use High-16 registers.
    85  	VADDSUBPD X20, X1, X2           // ERROR "invalid instruction"
    86  	VADDSUBPS X0, X20, X2           // ERROR "invalid instruction"
    87  	// Use of K0 for write mask (Yknot0).
    88  	// TODO(quasilyte): improve error message (#21860).
    89  	//                  "K0 can't be used for write mask"
    90  	VADDPD X0, X1, K0, X2           // ERROR "invalid instruction"
    91  	VADDPD Y0, Y1, K0, Y2           // ERROR "invalid instruction"
    92  	VADDPD Z0, Z1, K0, Z2           // ERROR "invalid instruction"
    93  	// VEX-encoded VSIB can't use High-16 registers as index (unlike EVEX).
    94  	// TODO(quasilyte): improve error message (#21860).
    95  	VPGATHERQQ X2, (BP)(X20*2), X3  // ERROR "invalid instruction"
    96  	VPGATHERQQ Y2, (BP)(Y20*2), Y3  // ERROR "invalid instruction"
    97  	// YzrMulti4 expects exactly 4 registers referenced by REG_LIST.
    98  	// TODO(quasilyte): improve error message (#21860).
    99  	V4FMADDPS (AX), [Z0-Z4], K1, Z7  // ERROR "invalid instruction"
   100  	V4FMADDPS (AX), [Z0-Z0], K1, Z7  // ERROR "invalid instruction"
   101  	// Invalid ranges in REG_LIST (low > high).
   102  	// TODO(quasilyte): improve error message (#21860).
   103  	V4FMADDPS (AX), [Z4-Z0], K1, Z7  // ERROR "invalid instruction"
   104  	V4FMADDPS (AX), [Z1-Z0], K1, Z7  // ERROR "invalid instruction"
   105  	// Mismatching registers in a range.
   106  	// TODO(quasilyte): improve error message (#21860).
   107  	V4FMADDPS (AX), [AX-Z3], K1, Z7  // ERROR "invalid instruction"
   108  	V4FMADDPS (AX), [Z0-AX], K1, Z7  // ERROR "invalid instruction"
   109  	// Usage of suffixes for non-EVEX instructions.
   110  	ADCB.Z $7, AL                    // ERROR "invalid instruction"
   111  	ADCB.RU_SAE $7, AL               // ERROR "invalid instruction"
   112  	ADCB.RU_SAE.Z $7, AL             // ERROR "invalid instruction"
   113  	// Usage of rounding with invalid operands.
   114  	VADDPD.RU_SAE X3, X2, K1, X1     // ERROR "unsupported rounding"
   115  	VADDPD.RD_SAE X3, X2, K1, X1     // ERROR "unsupported rounding"
   116  	VADDPD.RZ_SAE X3, X2, K1, X1     // ERROR "unsupported rounding"
   117  	VADDPD.RN_SAE X3, X2, K1, X1     // ERROR "unsupported rounding"
   118  	VADDPD.RU_SAE Y3, Y2, K1, Y1     // ERROR "unsupported rounding"
   119  	VADDPD.RD_SAE Y3, Y2, K1, Y1     // ERROR "unsupported rounding"
   120  	VADDPD.RZ_SAE Y3, Y2, K1, Y1     // ERROR "unsupported rounding"
   121  	VADDPD.RN_SAE Y3, Y2, K1, Y1     // ERROR "unsupported rounding"
   122  	// Unsupported SAE.
   123  	VMAXPD.SAE (AX), Z2, K1, Z1      // ERROR "illegal SAE with memory argument"
   124  	VADDPD.SAE X3, X2, K1, X1        // ERROR "unsupported SAE"
   125  	// Unsupported zeroing.
   126  	VFPCLASSPDX.Z $0, (AX), K2, K1   // ERROR "unsupported zeroing"
   127  	VFPCLASSPDY.Z $0, (AX), K2, K1   // ERROR "unsupported zeroing"
   128  	// Unsupported broadcast.
   129  	VFPCLASSSD.BCST $0, (AX), K2, K1 // ERROR "unsupported broadcast"
   130  	VFPCLASSSS.BCST $0, (AX), K2, K1 // ERROR "unsupported broadcast"
   131  	// Broadcast without memory operand.
   132  	VADDPD.BCST X3, X2, K1, X1       // ERROR "illegal broadcast without memory argument"
   133  	VADDPD.BCST X3, X2, K1, X1       // ERROR "illegal broadcast without memory argument"
   134  	VADDPD.BCST X3, X2, K1, X1       // ERROR "illegal broadcast without memory argument"
   135  	// CLWB instructions:
   136  	CLWB BX                          // ERROR "invalid instruction"
   137  	// CLDEMOTE instructions:
   138  	CLDEMOTE BX                      // ERROR "invalid instruction"
   139  	// WAITPKG instructions:
   140  	TPAUSE (BX)                      // ERROR "invalid instruction"
   141  	UMONITOR (BX)                    // ERROR "invalid instruction"
   142  	UMWAIT (BX)                      // ERROR "invalid instruction"
   143  	// .Z instructions
   144  	VMOVDQA32.Z Z0, Z1               // ERROR "mask register must be specified for .Z instructions"
   145  	VMOVDQA32.Z Z0, K0, Z1           // ERROR "invalid instruction"
   146  	VMOVDQA32.Z Z0, K1, Z1           // ok
   147  
   148  	RDPID (BX)			 // ERROR "invalid instruction"
   149  
   150  	RET
   151  

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