Not sure about the prove pass. Might be easiest in the section where we find length and capacity ops. When you find v=(OR x (CONST c)) add f.update(b, v, c, unsigned, gt|eq).

It might be easier just to do, in generic.rules

(BitLen (OR x (CONST [c]))) && c != 0 => (BitLenNonZero (OR x (CONST [c]))).

But then maybe you also want to handle if x != 0 { ... bits.Len32(x) }. That would require prove pass modifications.

Thanks! Given that this is fairly specialized, doing it all in rewrite rules makes sense.

Implemented. Surprisingly, it made performance worse.

What was your benchmark?

@dr2chase have found this issue from this repo https://github.com/josharian/log10 and probably here is the mentioned benchmark https://github.com/josharian/log10/blob/main/log10_test.go#L114

Thanks, @cristaloleg. That's the benchmark, plus some minor variations that I was experimenting with. (I no longer have the exact code in front of me, but IIRC they are the obvious changes you might toy with trying to get good generated code out of those functions.)

The rules I added to experiment with were in AMD64.rules:

(BitLen32NonZero <t> x) => (ADDQconst [1] (Select0 <t> (BSRQ x)))

and generic.rules:

(BitLen32 x:(Or32 (Const32 [c]) _)) && c != 0 => (BitLen32NonZero x)

This made the generated code shorter, but slower.

I also added these to AMD64.rules, which generated better code, including one or two other places in the standard library:

// Insert ADCQ.
(CMOVQCS x (ADDQconst [1] x) f) && f.Op != OpAMD64InvertFlags => (Select0 (ADCQconst [0] x f))
(Select0 (ADCQconst [0] x f:(InvertFlags g))) => (CMOVQCS x (ADDQconst [1] x) f)

(ADDQconst [c] (Select0 (ADCQconst [d] x f))) && is32Bit(int64(c)+int64(d)) => (Select0 (ADCQconst [int32(c+d)] x f))

(InvertFlags (InvertFlags f)) => f

I didn't mail these because I was frustrated that the failed to capture many of the cases in which we could use ADCQ. The problem is that we canonicalize many CMOVQCS into CMOVQHI for CSE purposes, including pointlessly inserting InvertFlags to do so. But there's no way to absorb an InvertFlags into ADCQ, so we end up having to rip out the ADCQ to avoid having an InvertFlags reach codegen. This is a general problem with doing optimizations like ADCQ and SBBQ and friends on amd64, and I don't see a clear path forward for it.