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Using the VLD1 instruction with a pseudo register such as FP results in an asm: illegal combination.
For instance, when I try and load the [4]float32 as a S4, I get an asm: illegal combination even though the variant using the actual registers works fine.
// func x([4]float32, []float32)
TEXT ·x(SB), $0-40
VLD1 f+0(FP), [V2.S4]
The text was updated successfully, but these errors were encountered:
paultag
changed the title
cmd/asm: ARM64 VLD1 from psuedo-register FP results in asm: illegal combination
cmd/asm: ARM64 VLD1 from pseudo-register FP results in asm: illegal combination
Sep 2, 2020
My workaround for this, for my fellow nerds who stumble upon this, is to change [4]float32 to a *[4]float32, MOVD that to a register, then do a VLD (R1), [V2.S4]. Not ideal, but it beats having to work out how to do this by hand :)
VLD1 instruction doesn't take an offset for the source, so it must be (Rx) instead of something like 16(Rx), also not a symbolic offset like f+0(FP).
You don't have to change the signature of the function. You could MOVD the address of the argument to a register, then VLD1 from there, like MOVD $f+0(FP), R1; VLD1 (R1), [V2.S4].
What version of Go are you using (
go version
)?Does this issue reproduce with the latest release?
Yes
What operating system and processor architecture are you using (
go env
)?go env
OutputWhat did you do?
Using the
VLD1
instruction with a pseudo register such asFP
results in anasm: illegal combination
.For instance, when I try and load the
[4]float32
as aS4
, I get anasm: illegal combination
even though the variant using the actual registers works fine.What did you expect to see?
My data in
V2
as anS4
What did you see instead?
The text was updated successfully, but these errors were encountered: