The supported instruction set is mips32(r1). Illegal instruction you're seeing is likely due to the kernel not handling unaligned loads and stores. Fixing go compiler to not emit such loads and stores is currently in the works and thanks to this issue we could treat it as a fix instead of new feature - so hopefully it can be included in the 1.8 release.

Looks like those devices are:

https://wikidevi.com/wiki/MIPS_24K and
https://wikidevi.com/wiki/MIPS_74K

@vstefanovic, it sounds like you expect those to work?

How much work and how invasive is it? If it only affects mips and nothing else, it might still be acceptable for Go 1.8.

But it would need to be soon regardless.

/cc @ianlancetaylor @cherrymui

I don't think the compiler generate any unaligned loads/stores. @vstefanovic, does it?
The only thing I see is the assembly functions in the runtime that have MOVWL, MOVWR.

I was seeing the same problem ("Illegal instruction") in a TP-Link TL-WR1043ND router running OpenWRT, and after attaching a debugger, I noticed that the problem was that the CPU lacks support for floating point instruction.
Perhaps the OP has the same problem? Also, related: #17984
You'll probably get many similar bug reports in the next month(s) :)

@minux, yes. Want to send a CL? Or @cherrymui?

Also, https://github.com/golang/go/wiki/MinimumRequirements needs to be updated.

CL https://golang.org/cl/33853 mentions this issue.

How can I check if an already compiled and flashed OpenWRT has kernel FPU emulation enabled or not?

Also for GL-AR150, we are using self-compiled images which in the default settings of OpenWRT's make menuconfig suggest FPU emulation is enabled.

If anyone needs online access to any of the devices, I can set them up a permanent tunnel for as long as they need.

Which consumer router meets the requirements of the MIPS 32 support the way it is in Beta 1?

As NeedsFix still stands, ist it right to assume support will be extended to cover devices mentioned under this issue by me and others?

@cherrymui
There are non-8-byte aligned ldc1's and sdc1's for accessing doubles on the stack because $sp is often not 8-byte aligned - the first reason for that is reserving only 4 bytes for $ra on the stack.

@bradfitz
I expect the issue with these two CPUs is kernel not handling unaligned loads and stores.
The patch for compiler not emitting them is not invasive or large, it has a few "if arch == 'mips'" in the common code. It should be ready during the next week.

@CetinSert
If this c code doesn't raise illegal instruction, then your machine can stand FP instructions:

int main(int argc, char** argh) {
asm("add.d $f0,$f0,$f0");
return 0;
}

And this one should tell you if the kernel handles unaligned loads and stores:

int main(int argc, char** argh) {
asm("ldc1 $f0,4($sp)");
return 0;
}

Btw, mips soft float patch is almost ready.

There are non-8-byte aligned ldc1's and sdc1's

Those probably shouldn't be there. Maybe we should make the assembler rewrite MOVD x, F0 to something like MOVF x, F0; MOVF x+4, F1?

The proposed change skips 4 bytes after $ra and places args starting from $sp +8. Then we could keep using ldc1 instead of two lwc1.

These are aligned with
t.Align = uint8(2 * Widthreg)
in case of mips and float64 (in align.go:dowidth()).

Yes, the softfloat code is using runtime/softfloat64.go.

The alignment diffs:
https://go-review.googlesource.com/34073
https://go-review.googlesource.com/34074
https://go-review.googlesource.com/34075
https://go-review.googlesource.com/34076

@vstefanovic, that's a fine comment as an FYI, but we don't track closed issues, so be sure there's an open bug somewhere actually tracking those changes.

@vstefanovic I appreciate continued comments under this issue and would love to learn where to track further development in case you follow the advice of @bradfitz .

For all, why / where does a Hello World binary even touch any floats before it gets to execute any user code (fmt.Println("Hello World!"))?

@randall77, @ianlancetaylor ... thoughts on this? As mips is a new architecture in Go 1.8, what's acceptable to still get in for Go 1.8?

Replacing a ldc1 with two lwc1 would be more than ok for 1.8, especially if we'll be 8-byte aligning arm and 386 too in 1.9. Then we can align them all at the same time.

CL https://golang.org/cl/34193 mentions this issue.

I'm building with go version go1.8beta2 darwin/amd64 for linux/mipsle and still got Illegal instruction on my MIPS router (Lenovo Y1, OpenWrt with musl).

I have the same issue on wndr4300. After kernel FPU emulation is enabled, the binary can run normally. Hoping to help you.

@icexin how did you enable that?

@CetinSert Change directory to openwrt build dir, make kernel_menuconfig， Kernel type ---> MIPS FPU Emulator

@icexin that indeed did the trick! I was not even aware there was a kernel_menuconfig I had beenlooking for that option under menuconfig o__O"

@vstefanovic : you say the "mips soft float patch is almost ready". I wonder, will this patch be merged in Go 1.8?

@pqyptixa
Well, no, the code for 1.8 has been feature-freezed quite a while ago.

@vstefanovic
ah, right... are these patches published somewhere? if they aren't, do you plan to?
thanks a lot for your work.

@pqyptixa
No, not yet, they will be after 1.8 is released.

@vstefanovic any news regarding the mips/FP-emulation patches?

@pqyptixa we've switched to #18162 for the soft-float news; I still expect to submit the code some time next week.