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cmd/compile: unaligned float64 load/store on mips #18140
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The supported instruction set is mips32(r1). Illegal instruction you're seeing is likely due to the kernel not handling unaligned loads and stores. Fixing go compiler to not emit such loads and stores is currently in the works and thanks to this issue we could treat it as a fix instead of new feature - so hopefully it can be included in the 1.8 release. |
Looks like those devices are: https://wikidevi.com/wiki/MIPS_24K and @vstefanovic, it sounds like you expect those to work? How much work and how invasive is it? If it only affects mips and nothing else, it might still be acceptable for Go 1.8. But it would need to be soon regardless. |
I don't think the compiler generate any unaligned loads/stores. @vstefanovic, does it? |
I was seeing the same problem ("Illegal instruction") in a TP-Link TL-WR1043ND router running OpenWRT, and after attaching a debugger, I noticed that the problem was that the CPU lacks support for floating point instruction. |
I think we should mention the mips port requires MIPS32r1 support
and also either native FPU or kernel FPU emulation in the release
docs.
|
@minux, yes. Want to send a CL? Or @cherrymui? Also, https://github.com/golang/go/wiki/MinimumRequirements needs to be updated. |
Sent CL 33853 and updated the MinimumRequirements wiki page.
|
CL https://golang.org/cl/33853 mentions this issue. |
How can I check if an already compiled and flashed OpenWRT has kernel FPU emulation enabled or not? Also for GL-AR150, we are using self-compiled images which in the default settings of OpenWRT's If anyone needs online access to any of the devices, I can set them up a permanent tunnel for as long as they need. Which consumer router meets the requirements of the MIPS 32 support the way it is in Beta 1? As |
@cherrymui @bradfitz @CetinSert int main(int argc, char** argh) { And this one should tell you if the kernel handles unaligned loads and stores: int main(int argc, char** argh) { Btw, mips soft float patch is almost ready. |
Those probably shouldn't be there. Maybe we should make the assembler rewrite |
The proposed change skips 4 bytes after $ra and places args starting from $sp +8. Then we could keep using ldc1 instead of two lwc1. |
Even if we align the SP at function entry, what about unaligned
function float64 arguments such as this case:
func f(uint32, float64, uint32, float64)
No matter how we align the stack pointer, one of the two float64
arguments will be unaligned.
Softfloat change is probably too large for Go 1.8, but I think we
do need to solve the unaligned float64 problem for Go 1.8.
BTW, I hope the upcoming softfloat reuses the runtime/softfloat64.go
code.
|
These are aligned with Yes, the softfloat code is using runtime/softfloat64.go. |
OK, then mips is following is different ABI than all
the other ports. Other 32-bit ports only do max 32-bit
alignment.
|
@vstefanovic, that's a fine comment as an FYI, but we don't track closed issues, so be sure there's an open bug somewhere actually tracking those changes. |
@vstefanovic I appreciate continued comments under this issue and would love to learn where to track further development in case you follow the advice of @bradfitz . |
Let's repurpose this issue to misaligned float64 load/store to keep all
relevant discussions together.
I think making 64-bit types having 64-bit alignment has larger
implications. For Go 1.8, why not adopt @cherrymui's suggestion of using two
lwc1 to load a 64-bit fp values? That should be a minimal change because we
just need to modify cmd/internal/obj/mips to emit 8-byte two-instruction
sequence for ldc1 and stc1.
|
The tracking issue for increasing 64-bit value alignment on 32-bit
architectures is #599.
|
For all, why / where does a Hello World binary even touch any |
Because the runtime uses floating points, e.g. in the garbage collector.
The runtime also checks for proper NaN handling at start up in 'func check()'.
|
@randall77, @ianlancetaylor ... thoughts on this? As mips is a new architecture in Go 1.8, what's acceptable to still get in for Go 1.8? |
Replacing a ldc1 with two lwc1 would be more than ok for 1.8, especially if we'll be 8-byte aligning arm and 386 too in 1.9. Then we can align them all at the same time. |
I have got a simple CL to implement @cherrymui's idea ready for Go 1.8.
|
CL https://golang.org/cl/34193 mentions this issue. |
I'm building with |
The illegal instruction might be FPU instruction.
Please see the revised Go 1.8 release note:
Go now supports 32-bit MIPS on Linux for both big-endian (linux/mips) and
little-endian machines (linux/mipsle) that implement the MIPS32r1
instruction set with FPU or kernel FPU emulation. Note that many common
MIPS-based routers lack an FPU and have firmware that doesn't enable kernel
FPU emulation; Go won't run on such machines.
Anyway, if your cpu matches the requirement (mips32r1+FPU),
and still encounters SIGILL, please file a new issue with details
on which instruction triggered SIGILL.
|
I have the same issue on wndr4300. After kernel FPU emulation is enabled, the binary can run normally. Hoping to help you. |
@icexin how did you enable that? |
@CetinSert Change directory to openwrt build dir, |
@icexin that indeed did the trick! I was not even aware there was a |
@vstefanovic : you say the "mips soft float patch is almost ready". I wonder, will this patch be merged in Go 1.8? |
@pqyptixa |
@vstefanovic |
@pqyptixa |
@vstefanovic any news regarding the mips/FP-emulation patches? |
What version of Go are you using (
go version
)?What operating system and processor architecture are you using (
go env
)?Building on
windows-amd64
forlinux-mips
.What did you do?
Windows PC (
cmd.exe
):MIPS Router:
What did you expect to see?
What did you see instead?
What kind of hardware products does the recent mips support merge target then?
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