Please answer these questions before submitting your issue. Thanks!

1. What version of Go are you using (go version)?
   go version devel +d733cef Tue Mar 29 11:19:31 2016 +0000 linux/ppc64le
2. What operating system and processor architecture are you using (go env)?
   linux ppc64le RHEL7.2
3. What did you do?
   If possible, provide a recipe for reproducing the error.
   A complete runnable program is good.
   A link on play.golang.org is best.
   Trying to write plan9 asm to generate rldicl power asm.
4. What did you expect to see?
   Instructions generated as defined in the Power ISA.
5. What did you see instead?
   Unable to generate rldicl instructions with certain shift counts. The operand for the mask bit is
   being treated as a mask instead, which is inconsistent with the power asm and does not allow
   all possible shift count values.

From the Power ISA:

**rldcl RA,RS,SH,MB

The contents of register RS are rotated64 left the num-
ber of bits specified by (RB)58:63. A mask is generated
having 1-bits from bit MB through bit 63 and 0-bits else-
where. The rotated data are ANDed with the generated
mask and the result is placed into register RA.
**
There is a plan9 asm mnemonic RLDCL (and other similar RLD)
which can generate some of the rld* power asm instructions but
the operand which corresponds to MB as described in the ISA
is not the mask bit but instead is treated as a mask. (There are
no comments describing this, I found out through trial and error.)

The existing asm9.go code also limits this operand to certain values,
otherwise giving the error message: "invalid mask for shift". This
operand should allow 0-63 as values because it is intended to
specify the first bit of the mask to use, up to a value of 63.

I don't see the RLD* plan9 mnemonics being used by any other
platform. I am working on a change to modify the use of this operand
for these plan9 mnemonics so they are consistent with the power asm
description and so they allow the full range of mask bit values.