Descriptionsync/atomic: fix check64
The LDREXD and STREXD instructions require
aligned addresses, and the ARM stack is not
guaranteed to be aligned during the check.
This may cause other problems later (on the ARM
not all 64-bit pointers may be 64-bit aligned)
but at least the check is correct now.
Patch Set 1 #Patch Set 2 : diff -r 73d526d94d1d https://go.googlecode.com/hg #Patch Set 3 : diff -r a76c2f42924d https://go.googlecode.com/hg #Patch Set 4 : diff -r 4bccc451c643 https://go.googlecode.com/hg #MessagesTotal messages: 4
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