On Fri, Feb 25, 2011 at 01:49, <r@golang.org> wrote:
> does/should this affect the implementation of sync?
i wish. in theory we could make sync call these functions,
but the ancient arm systems screw things up.
on arm v5, there was no ll/sc, only a swap.
so when package sync wants to do an atomic op
on the arm v5, it simulates better atomicity using a tiny spin lock,
but that's only good for atomicity against other code that
also knows to use the tiny spin lock.
i intend sync/atomic to be real hw-supported atomic operations,
never simulated ones, so that you can use them to coordinate
with, say, c code. so on the arm the sync/atomic operations
always use the atomic instructions, and if they're not there
on some machine, you get an invalid instruction fault.
if we toss arm v5 away, then sync can call into sync/atomic.
i don't know who cares about arm v5. it is super old.
i will ask.
>
http://codereview.appspot.com/4241041/diff/1002/src/pkg/sync/atomic/doc.go#ne...
> src/pkg/sync/atomic/doc.go:16: //
> i'd like a few words of caution.
suggestions?
russ
On Feb 24, 2011, at 11:02 PM, Russ Cox wrote:
> On Fri, Feb 25, 2011 at 01:49, <r@golang.org> wrote:
>> does/should this affect the implementation of sync?
>
> i wish. in theory we could make sync call these functions,
> but the ancient arm systems screw things up.
> on arm v5, there was no ll/sc, only a swap.
> so when package sync wants to do an atomic op
> on the arm v5, it simulates better atomicity using a tiny spin lock,
> but that's only good for atomicity against other code that
> also knows to use the tiny spin lock.
>
> i intend sync/atomic to be real hw-supported atomic operations,
> never simulated ones, so that you can use them to coordinate
> with, say, c code. so on the arm the sync/atomic operations
> always use the atomic instructions, and if they're not there
> on some machine, you get an invalid instruction fault.
>
> if we toss arm v5 away, then sync can call into sync/atomic.
> i don't know who cares about arm v5. it is super old.
> i will ask.
>
>>
http://codereview.appspot.com/4241041/diff/1002/src/pkg/sync/atomic/doc.go#ne...
>> src/pkg/sync/atomic/doc.go:16: //
>> i'd like a few words of caution.
>
> suggestions?
These functions require great care to be used safely. Except for special,
low-level
applications synchronization is better done with channels or the facilities of
the
sync package. Share memory by communicating; don't communicate by sharing
memory.
-rob
I incorporated Rob's suggested comment, though I
changed safely to correctly: this package is type-safe
and memory-safe no matter how it is used.
I changed the ARM routines to be OS-specific, and
on Linux (the only ARM we have) they call the kernel-provided
functions at magic addresses.
I will update package sync in a separate CL.
Russ
> http://codereview.appspot.com/4241041/diff/12/src/pkg/sync/atomic/asm_linux_arm.s#newcode15 > src/pkg/sync/atomic/asm_linux_arm.s:15: TEXT cas<>(SB),7,$0 > i don't remember what <> means. it means ...
On Feb 25, 2011, at 10:10 AM, Russ Cox wrote: >> http://codereview.appspot.com/4241041/diff/12/src/pkg/sync/atomic/asm_linux_arm.s#newcode15 >> src/pkg/sync/atomic/asm_linux_arm.s:15: TEXT ...
http://codereview.appspot.com/4241041/diff/1002/src/pkg/sync/atomic/asm_amd64.s
File src/pkg/sync/atomic/asm_amd64.s (right):
http://codereview.appspot.com/4241041/diff/1002/src/pkg/sync/atomic/asm_amd64...
src/pkg/sync/atomic/asm_amd64.s:6: JMP ·CompareAndSwapUint32(SB)
On 2011/02/25 18:50:41, gri wrote:
> I guess there's no "fallthrough" (two entry points at the same address?) in
this
> assembler?
No. The linker can reorder functions anyway.
It has enough information to rewrite direct calls,
though I don't know whether it does. In any
event the locked bus transaction is orders of
magnitude more expensive than the jump.
http://codereview.appspot.com/4241041/diff/1002/src/pkg/sync/atomic/asm_amd64...
src/pkg/sync/atomic/asm_amd64.s:14: JZ 3(PC)
On 2011/02/25 18:50:41, gri wrote:
> Couldn't you use a conditional move here and avoid the branch? (Cond. moves
are
> not available on all machines, but you already have restrictions in that
> respect).
>
> If the result were in a carry bit, one could use an ADC. Not sure if there's
> another easy way to get the Z flag into a register.
Rewrote using SETEQ (SETE).
http://codereview.appspot.com/4241041/diff/1002/src/pkg/sync/atomic/asm_amd64...
src/pkg/sync/atomic/asm_amd64.s:64: MOVQ CX, ret+8(FP)
On 2011/02/25 18:50:41, gri wrote:
> +8? (not +16?)
Thanks. Changed the tests to check return value of AddUint64
and fixed.
PTAL http://codereview.appspot.com/4241041/diff/1002/src/pkg/sync/atomic/atomic_test.go File src/pkg/sync/atomic/atomic_test.go (right): http://codereview.appspot.com/4241041/diff/1002/src/pkg/sync/atomic/atomic_test.go#newcode23 src/pkg/sync/atomic/atomic_test.go:23: // extend past the full word size. On ...
http://codereview.appspot.com/4241041/diff/1002/src/pkg/sync/atomic/doc.go File src/pkg/sync/atomic/doc.go (right): http://codereview.appspot.com/4241041/diff/1002/src/pkg/sync/atomic/doc.go#newcode8 src/pkg/sync/atomic/doc.go:8: // The compare-and-swap operation, implemented by the CompareAndSwap* On ...
LGTM http://codereview.appspot.com/4241041/diff/3008/src/pkg/sync/atomic/atomic_test.go File src/pkg/sync/atomic/atomic_test.go (right): http://codereview.appspot.com/4241041/diff/3008/src/pkg/sync/atomic/atomic_test.go#newcode22 src/pkg/sync/atomic/atomic_test.go:22: // The struct field x.o checks that the ...
Issue 4241041: code review 4241041: sync/atomic: new package
(Closed)
Created 14 years ago by rsc
Modified 14 years ago
Reviewers:
Base URL:
Comments: 25